Ignore:
Timestamp:
Sep 18, 1997, 4:01:52 PM (24 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
8f367d6b
Parents:
a72e3dd
Message:

Merged changes from Eric Norum:

Enable 68360 watchdog. The watchdog control register is a
`write-once' register, so the watchdog has to be enabled in the boot
roms if it is to be used at all. To make the change transparent I
added a default feed of the watchdog to the clock interrupt handler.
This can be overridden if the application wants to handle the
watchdog. The only difficulty with this change is that an
application has to either include the clock driver or handle the
watchdog explicitely. I don't think this is much of a problem since
I am pretty sure that almost every application includes the clock
driver.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/m68k/gen68360/startup/init68360.c

    ra72e3dd r6b4ca31  
    7070        /*
    7171         * Step 8: Initialize system protection
    72          *      Disable watchdog FIXME: Should use watchdog!!!!
    73          *      Watchdog causes system reset
    74          *      Slowest watchdog timeout
    75          *      Disable double bus fault monitor
    76          *      Enable bus monitor external
    77          *      1024 clocks for external timeout
    78          */
    79         m360.sypcr = 0x74;
     72         *      Enable watchdog
     73         *      Watchdog causes system reset
     74         *      Next-to-slowest watchdog timeout
     75         *          (21 seconds with 25 MHz oscillator)
     76         *      Enable double bus fault monitor
     77         *      Enable bus monitor for external cycles
     78         *      1024 clocks for external timeout
     79         */
     80         m360.sypcr = 0xEC;
    8081
    8182        /*
     
    369370        /*
    370371         * Step 8: Initialize system protection
    371          *      Disable watchdog FIXME: Should use watchdog!!!!
    372          *      Watchdog causes system reset
    373          *      Slowest watchdog timeout
    374          *      Enable double bus fault monitor
    375          *      Enable bus monitor external
    376          *      128 clocks for external timeout
    377          */
    378         m360.sypcr = 0x7F;
     372         *      Enable watchdog
     373         *      Watchdog causes system reset
     374         *      Next-to-slowest watchdog timeout
     375         *          (21 seconds with 25 MHz oscillator)
     376         *      Enable double bus fault monitor
     377         *      Enable bus monitor for external cycles
     378         *      1024 clocks for external timeout
     379         */
     380         m360.sypcr = 0xEC;
    379381
    380382        /*
     
    498500         * Step 14: More system initialization
    499501         * SDCR (Serial DMA configuration register)
    500          *      Disable SDMA during FREEZE
     502         *      Enable SDMA during FREEZE
    501503         *      Give SDMA priority over all interrupt handlers
    502504         *      Set DMA arbiration level to 4
     
    511513         *      SCCs priority grouped at top of table
    512514         */
    513         m360.sdcr = M360_SDMA_FREEZE | M360_SDMA_SISM_7 | M360_SDMA_SAID_4;
     515        m360.sdcr = M360_SDMA_SISM_7 | M360_SDMA_SAID_4;
    514516        m360.cicr = (3 << 22) | (2 << 20) | (1 << 18) | (0 << 16) |
    515517                                                (4 << 13) | (0x1F << 8) | (128);
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