Changeset 6b4ca31 in rtems

Timestamp:

09/18/97 16:01:52 (26 years ago)

Author:

Joel Sherrill <joel.sherrill@…>

Branches:

4.10, 4.11, 4.8, 4.9, 5, master

Children:

8f367d6b

Parents:

a72e3dd

Message:

Merged changes from Eric Norum:

Enable 68360 watchdog. The watchdog control register is a
`write-once' register, so the watchdog has to be enabled in the boot
roms if it is to be used at all. To make the change transparent I
added a default feed of the watchdog to the clock interrupt handler.
This can be overridden if the application wants to handle the
watchdog. The only difficulty with this change is that an
application has to either include the clock driver or handle the
watchdog explicitely. I don't think this is much of a problem since
I am pretty sure that almost every application includes the clock
driver.

Location:

c/src/lib/libbsp/m68k/gen68360

Files:

• clock/ckinit.c (modified) (2 diffs)
• include/bsp.h (modified) (1 diff)
• startup/init68360.c (modified) (4 diffs)

c/src/lib/libbsp/m68k/gen68360/clock/ckinit.c

@@ -52 +52 @@
 rtems_device_minor_number rtems_clock_minor;
 
+char M360DefaultWatchdogFeeder = 1;
+
 /*
  * Periodic interval timer interrupt handler
  */
+
 rtems_isr
 Clock_isr (rtems_vector_number vector)
@@ -63 +66 @@
          */
         m360.dpram0[0];
+
+        /*
+         * Feed the watchdog
+         * Application code can override this by
+         * setting M360DefaultWatchdogFeeder to zero.
+         */
+        if (M360DefaultWatchdogFeeder) {
+                m360.swsr = 0x55;
+                m360.swsr = 0xAA;
+        }
 
         /*

c/src/lib/libbsp/m68k/gen68360/include/bsp.h

@@ -122 +122 @@
 void *M360AllocateBufferDescriptors( int count );
 void *M360AllocateRiscTimers( int count );
+extern char M360DefaultWatchdogFeeder;
 
 m68k_isr_entry set_vector(

c/src/lib/libbsp/m68k/gen68360/startup/init68360.c

@@ -70 +70 @@
         /*
          * Step 8: Initialize system protection
-         *      Disable watchdog FIXME: Should use watchdog!!!!
-         *      Watchdog causes system reset
-         *      Slowest watchdog timeout
-         *      Disable double bus fault monitor
-         *      Enable bus monitor external
-         *      1024 clocks for external timeout
-         */
-        m360.sypcr = 0x74;
+         *      Enable watchdog
+         *      Watchdog causes system reset
+         *      Next-to-slowest watchdog timeout
+         *          (21 seconds with 25 MHz oscillator)
+         *      Enable double bus fault monitor
+         *      Enable bus monitor for external cycles
+         *      1024 clocks for external timeout
+         */
+         m360.sypcr = 0xEC;
 
         /*
@@ -369 +370 @@
         /*
          * Step 8: Initialize system protection
-         *      Disable watchdog FIXME: Should use watchdog!!!!
-         *      Watchdog causes system reset
-         *      Slowest watchdog timeout
-         *      Enable double bus fault monitor
-         *      Enable bus monitor external
-         *      128 clocks for external timeout
-         */
-        m360.sypcr = 0x7F;
+         *      Enable watchdog
+         *      Watchdog causes system reset
+         *      Next-to-slowest watchdog timeout
+         *          (21 seconds with 25 MHz oscillator)
+         *      Enable double bus fault monitor
+         *      Enable bus monitor for external cycles
+         *      1024 clocks for external timeout
+         */
+         m360.sypcr = 0xEC;
 
         /*
@@ -498 +500 @@
          * Step 14: More system initialization
          * SDCR (Serial DMA configuration register)
-         *      Disable SDMA during FREEZE
+         *      Enable SDMA during FREEZE
          *      Give SDMA priority over all interrupt handlers
          *      Set DMA arbiration level to 4
@@ -511 +513 @@
          *      SCCs priority grouped at top of table
          */
-        m360.sdcr = M360_SDMA_FREEZE | M360_SDMA_SISM_7 | M360_SDMA_SAID_4;
+        m360.sdcr = M360_SDMA_SISM_7 | M360_SDMA_SAID_4;
         m360.cicr = (3 << 22) | (2 << 20) | (1 << 18) | (0 << 16) |
                                                 (4 << 13) | (0x1F << 8) | (128);