Changeset 6a740c2 in rtems


Ignore:
Timestamp:
May 23, 2014, 1:52:16 PM (5 years ago)
Author:
Daniel Hellstrom <daniel@…>
Branches:
4.11, master
Children:
5c123985
Parents:
434e7f7
git-author:
Daniel Hellstrom <daniel@…> (05/23/14 13:52:16)
git-committer:
Joel Sherrill <joel.sherrill@…> (05/23/14 14:14:15)
Message:

SPARC: add syscall 1 (exit) function entry point

The exit SPARC system call doesn't have a function entry
point like the others do. This is probably why people use
TA 0x0 instruction directly for shutting down the system.

Files:
2 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libcpu/sparc/syscall/syscall.S

    r434e7f7 r6a740c2  
    3030         *    l2 = npc
    3131         *    g1 = system call id
     32         *
     33         *  System Call 1 (exit):
     34         *    g2 = additional exit code 1
     35         *    g3 = additional exit code 2
    3236         */
    3337
     
    7175         ta     0
    7276
     77        PUBLIC(sparc_syscall_exit)
     78
     79SYM(sparc_syscall_exit):
     80
     81        mov     SYS_exit, %g1
     82        mov     %o0, %g2        ! Additional exit code 1
     83        mov     %o1, %g3        ! Additional exit code 2
     84        ta      0
     85
    7386/* end of file */
  • cpukit/score/cpu/sparc/rtems/score/sparc.h

    r434e7f7 r6a740c2  
    267267
    268268/**
     269 * @brief SPARC exit through system call 1
     270 *
     271 * This method is invoked to go into system error halt. The optional
     272 * arguments can be given to hypervisor, hardware debugger, simulator or
     273 * similar.
     274 *
     275 * System error mode is entered when taking a trap when traps have been
     276 * disabled. What happens when error mode is entered depends on the motherboard.
     277 * In a typical development systems the CPU relingish control to the debugger,
     278 * simulator, hypervisor or similar. The following steps are taken:
     279 *
     280 * 1. Going into system error mode by Software Trap 0
     281 * 2. %g1=1 (syscall 1 - Exit)
     282 * 3. %g2=Primary exit code
     283 * 4. %g3=Secondary exit code. Dependends on %g2 exit type.
     284 *
     285 * This function never returns.
     286 *
     287 * @param[in] exitcode1 Primary exit code stored in CPU g2 register after exit
     288 * @param[in] exitcode2 Primary exit code stored in CPU g3 register after exit
     289 */
     290void sparc_syscall_exit(uint32_t exitcode1, uint32_t exitcode2)
     291  RTEMS_COMPILER_NO_RETURN_ATTRIBUTE;
     292
     293/**
    269294 * @brief SPARC flash processor interrupts.
    270295 *
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