- Timestamp:
- May 14, 2002, 5:10:17 PM (19 years ago)
- Branches:
- 4.10, 4.11, 4.8, 4.9, 5, master
- Children:
- 6a4df9f9
- Parents:
- 3ce2907
- Location:
- c/src/lib/libbsp/powerpc/shared
- Files:
-
- 25 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libbsp/powerpc/shared/ChangeLog
r3ce2907 r69ed59f 1 2001-05-14 Till Straumann <strauman@slac.stanford.edu> 2 3 * bootloader/misc.c, console/Makefile.am, console/console.c, 4 console/consoleIo.h, console/inch.c, console/polled_io.c, 5 console/uart.c, console/uart.h, include/bsp.h, irq/Makefile.am, 6 irq/irq.c, irq/irq.h, irq/irq_init.c, openpic/openpic.c, 7 openpic/openpic.h, pci/Makefile.am, pci/pci.c, pci/pci.h, 8 residual/Makefile.am, start/start.S, startup/bspstart.c, 9 vectors/vectors.S, vectors/vectors.h, vectors/vectors_init.c: 10 Per PR216, "libbsp/powerpc/shared" BSP has been modified considerably 11 with the goal to make it more flexible and reusable by other 12 BSPs. The main strategies were: 13 - eliminate hardcoded base addresses; devices use offsets 14 and a BSP defined base address. 15 - separate functionality into different files (e.g. reboot from 16 inch.c to reboot.c) which can be overridden by a 'derived' BSP. 17 - separate initialization code into separate files (e.g. PCI 18 bridge detection/initialization was separated from the more 19 generic PCI access routines), also to make it easier for 20 'derived' BSPs to substitute their own initialization code. 21 There are also a couple of enhancements and fixes: 22 - IRQ handling code now has a hook for attaching a VME bridge. 23 - OpenPIC is now explicitely initialized (polarities, senses). 1 24 Eliminated the implicit assumption on the presence of an ISA PIC. 2 25 - UART and console driver now supports more than 1 port. The current -
c/src/lib/libbsp/powerpc/shared/bootloader/misc.c
r3ce2907 r69ed59f 234 234 } 235 235 236 static int ticks_per_ms=0; 237 238 /* this is from rtems_bsp_delay from libcpu */ 239 void 240 boot_udelay(unsigned32 _microseconds) 241 { 242 unsigned32 start, ticks, now; 243 244 ticks = _microseconds * ticks_per_ms / 1000; 245 CPU_Get_timebase_low( start ); 246 do { 247 CPU_Get_timebase_low( now ); 248 } while (now - start < ticks); 249 } 250 236 251 void 237 252 setup_hw(void) … … 403 418 break; /* Exit 'timer' loop */ 404 419 } 405 udelay(1000); /* 1 msec */420 boot_udelay(1000); /* 1 msec */ 406 421 } 407 422 *cp = 0; -
c/src/lib/libbsp/powerpc/shared/console/Makefile.am
r3ce2907 r69ed59f 4 4 5 5 6 C_FILES = console.c inch.c polled_io.c uart.c 6 C_FILES = console.c inch.c polled_io.c uart.c reboot.c 7 7 8 8 H_FILES = consoleIo.h keyboard.h uart.h … … 19 19 all-local: $(PREINSTALL_FILES) 20 20 21 EXTRA_DIST = console.c consoleIo.h inch.c keyboard.hpolled_io.c uart.c \22 uart.h21 EXTRA_DIST = console.c inch.c polled_io.c uart.c \ 22 reboot.c console.inl 23 23 24 24 include $(top_srcdir)/../../../../../automake/local.am -
c/src/lib/libbsp/powerpc/shared/console/console.c
r3ce2907 r69ed59f 9 9 * (C) Copyright 1997 - 10 10 * - NavIST Group - Real-Time Distributed Systems and Industrial Automation 11 * 12 * Till Straumann, <strauman@slac.stanford.edu>, 12/20/2001 13 * separate BSP specific stuff from generics... 11 14 * 12 15 * http://pandora.ist.utl.pt … … 35 38 #include <bsp/uart.h> 36 39 #include <bsp/consoleIo.h> 40 #include <rtems/bspIo.h> /* printk */ 37 41 38 42 /* Definitions for BSPConsolePort */ 39 #define BSP_CONSOLE_PORT_CONSOLE (-1)40 #define BSP_CONSOLE_PORT_COM1 (BSP_UART_COM1)41 #define BSP_CONSOLE_PORT_COM2 (BSP_UART_COM2)42 43 /* 43 44 * Possible value for console input/output : … … 46 47 * BSP_UART_COM2 47 48 */ 48 49 int BSPConsolePort = BSP_UART_COM1; 50 51 /* int BSPConsolePort = BSP_UART_COM2; */ 52 int BSPBaseBaud = 115200; 49 int BSPConsolePort = BSP_CONSOLE_PORT; 50 51 int BSPBaseBaud = BSP_UART_BAUD_BASE; 53 52 54 53 /*-------------------------------------------------------------------------+ … … 57 56 58 57 static int conSetAttr(int minor, const struct termios *); 59 static void isr_on(const rtems_irq_connect_data *);60 static void isr_off(const rtems_irq_connect_data *);61 static int isr_is_on(const rtems_irq_connect_data *);62 63 64 static rtems_irq_connect_data console_isr_data = {BSP_ISA_UART_COM1_IRQ,65 BSP_uart_termios_isr_com1,66 isr_on,67 isr_off,68 isr_is_on};69 70 static void71 isr_on(const rtems_irq_connect_data *unused)72 {73 return;74 }75 76 static void77 isr_off(const rtems_irq_connect_data *unused)78 {79 return;80 }81 82 static int83 isr_is_on(const rtems_irq_connect_data *irq)84 {85 return BSP_irq_enabled_at_i8259s(irq->name);86 }87 58 88 59 void __assert (const char *file, int line, const char *msg) … … 113 84 } 114 85 86 typedef struct TtySTblRec_ { 87 char *name; 88 void (*isr)(void); /* STUPID API doesn't pass a parameter :-( */ 89 } TtySTblRec, *TtySTbl; 90 91 static TtySTblRec ttyS[]={ 92 { "/dev/ttyS0", 93 #ifdef BSP_UART_IOBASE_COM1 94 BSP_uart_termios_isr_com1 95 #else 96 0 97 #endif 98 }, 99 { "/dev/ttyS1", 100 #ifdef BSP_UART_IOBASE_COM2 101 BSP_uart_termios_isr_com2 102 #else 103 0 104 #endif 105 }, 106 }; 107 115 108 116 109 /*-------------------------------------------------------------------------+ … … 131 124 */ 132 125 133 134 126 /* 135 127 * Set up TERMIOS … … 140 132 * Do device-specific initialization 141 133 */ 142 143 /* 9600-8-N-1 */ 144 BSP_uart_init(BSPConsolePort, 9600, 0); 145 146 147 /* Set interrupt handler */ 148 if(BSPConsolePort == BSP_UART_COM1) 149 { 150 console_isr_data.name = BSP_ISA_UART_COM1_IRQ; 151 console_isr_data.hdl = BSP_uart_termios_isr_com1; 152 153 } 154 else 155 { 156 assert(BSPConsolePort == BSP_UART_COM2); 157 console_isr_data.name = BSP_ISA_UART_COM2_IRQ; 158 console_isr_data.hdl = BSP_uart_termios_isr_com2; 159 } 160 161 status = BSP_install_rtems_irq_handler(&console_isr_data); 162 163 if (!status){ 164 printk("Error installing serial console interrupt handler!\n"); 165 rtems_fatal_error_occurred(status); 134 135 /* RTEMS calls this routine once with 'minor'==0; loop through 136 * all known instances... 137 */ 138 139 for (minor=0; minor < sizeof(ttyS)/sizeof(ttyS[0]); minor++) { 140 char *nm; 141 /* 142 * Skip ports (possibly not supported by BSP...) we have no ISR for 143 */ 144 if ( ! ttyS[minor].isr ) 145 continue; 146 /* 147 * Register the device 148 */ 149 status = rtems_io_register_name ((nm=ttyS[minor].name), major, minor); 150 if ( RTEMS_SUCCESSFUL==status && BSPConsolePort == minor) 151 { 152 printk("Registering /dev/console as minor %i (==%s)\n", 153 minor, 154 ttyS[minor].name); 155 /* also register an alias */ 156 status = rtems_io_register_name ( 157 (nm="/dev/console"), 158 major, 159 minor); 160 } 161 if (status != RTEMS_SUCCESSFUL) 162 { 163 printk("Error registering %s!\n",nm); 164 rtems_fatal_error_occurred (status); 165 } 166 166 167 } 167 /*168 * Register the device169 */170 status = rtems_io_register_name ("/dev/console", major, 0);171 if (status != RTEMS_SUCCESSFUL)172 {173 printk("Error registering console device!\n");174 rtems_fatal_error_occurred (status);175 }176 177 if(BSPConsolePort == BSP_UART_COM1)178 {179 printk("Initialized console on port COM1 9600-8-N-1\n\n");180 }181 else182 {183 printk("Initialized console on port COM2 9600-8-N-1\n\n");184 }185 168 return RTEMS_SUCCESSFUL; 186 169 } /* console_initialize */ 187 170 171 static int console_first_open(int major, int minor, void *arg) 172 { 173 rtems_status_code status; 174 175 /* must not open a minor device we have no ISR for */ 176 assert( minor>=0 && minor < sizeof(ttyS)/sizeof(ttyS[0]) && ttyS[minor].isr ); 177 178 /* 9600-8-N-1 */ 179 BSP_uart_init(minor, 9600, 0); 180 status = BSP_uart_install_isr(minor, ttyS[minor].isr); 181 if (!status) 182 { 183 printk("Error installing serial console interrupt handler for '%s'!\n", 184 ttyS[minor].name); 185 rtems_fatal_error_occurred(status); 186 } 187 return 0; 188 } 189 188 190 189 191 static int console_last_close(int major, int minor, void *arg) 190 192 { 191 BSP_remove_rtems_irq_handler (&console_isr_data); 192 193 BSP_uart_remove_isr(minor, ttyS[minor].isr); 193 194 return 0; 194 195 } … … 205 206 static rtems_termios_callbacks cb = 206 207 { 207 NULL,/* firstOpen */208 console_last_close, 209 NULL, 210 BSP_uart_termios_write_com 1,/* write */211 conSetAttr, 212 NULL, 213 NULL, 214 1 208 console_first_open, /* firstOpen */ 209 console_last_close, /* lastClose */ 210 NULL, /* pollRead */ 211 BSP_uart_termios_write_com, /* write */ 212 conSetAttr, /* setAttributes */ 213 NULL, /* stopRemoteTx */ 214 NULL, /* startRemoteTx */ 215 1 /* outputUsesInterrupts */ 215 216 }; 216 217 if(BSPConsolePort == BSP_UART_COM2)218 {219 cb.write = BSP_uart_termios_write_com2;220 }221 217 222 218 status = rtems_termios_open (major, minor, arg, &cb); … … 231 227 * Pass data area info down to driver 232 228 */ 233 BSP_uart_termios_set( BSPConsolePort,229 BSP_uart_termios_set(minor, 234 230 ((rtems_libio_open_close_args_t *)arg)->iop->data1); 235 231 /* Enable interrupts on channel */ 236 BSP_uart_intr_ctrl( BSPConsolePort, BSP_UART_INTR_CTRL_TERMIOS);232 BSP_uart_intr_ctrl(minor, BSP_UART_INTR_CTRL_TERMIOS); 237 233 238 234 return RTEMS_SUCCESSFUL; … … 363 359 } 364 360 365 BSP_uart_set_baud( BSPConsolePort, baud);361 BSP_uart_set_baud(minor, baud); 366 362 367 363 return 0; 368 364 } 369 370 371 -
c/src/lib/libbsp/powerpc/shared/console/consoleIo.h
r3ce2907 r69ed59f 27 27 __io_ptr io_base; 28 28 __io_ptr isa_mem_base; 29 __io_ptr pci_mmio_base;30 __io_ptr pci_dma_offset;31 29 } board_memory_map; 32 30 33 31 extern board_memory_map *ptr_mem_map; 34 extern unsigned long ticks_per_ms;35 32 36 33 extern int select_console(ioType t); 37 34 /* extern int printk(const char *, ...) __attribute__((format(printf, 1, 2))); */ 38 extern void udelay(int);39 35 extern void debug_putc(const unsigned char c); 40 36 extern int debug_getc(void); -
c/src/lib/libbsp/powerpc/shared/console/inch.c
r3ce2907 r69ed59f 23 23 #include <bsp/irq.h> 24 24 25 #include "console.inl" 26 25 27 /*-------------------------------------------------------------------------+ 26 28 | Constants 27 29 +--------------------------------------------------------------------------*/ 28 #define KBD_CTL 0x 61 /* -------------------------------- */29 #define KBD_DATA 0x 60 /* Ports for PC keyboard controller */30 #define KBD_STATUS 0x 64 /* -------------------------------- */30 #define KBD_CTL 0x1 /* -------------------------------- */ 31 #define KBD_DATA 0x0 /* Port offsets for PC keyboard controller */ 32 #define KBD_STATUS 0x4 /* -------------------------------- */ 31 33 32 34 #define KBD_BUF_SIZE 256 … … 63 65 64 66 /*-------------------------------------------------------------------------+ 65 | Function: rtemsReboot66 | Description: Reboot the PC.67 | Global Variables: None.68 | Arguments: None.69 | Returns: Nothing.70 +--------------------------------------------------------------------------*/71 void rtemsReboot(void)72 {73 /* shutdown and reboot */74 outport_byte(0x64, 0xFE); /* use keyboard controler to do the job... */75 } /* rtemsReboot */76 77 /*-------------------------------------------------------------------------+78 67 | Function: _IBMPC_scankey 79 68 | Description: This function can be called during a poll for input, or by … … 98 87 99 88 /* Read keyboard controller, toggle enable */ 100 in port_byte(KBD_CTL, inChar);101 outport_byte(KBD_CTL, inChar & ~0x80);102 outport_byte(KBD_CTL, inChar | 0x80);103 outport_byte(KBD_CTL, inChar & ~0x80);89 inChar=kbd_inb(KBD_CTL); 90 kbd_outb(KBD_CTL, inChar & ~0x80); 91 kbd_outb(KBD_CTL, inChar | 0x80); 92 kbd_outb(KBD_CTL, inChar & ~0x80); 104 93 105 94 /* See if it has data */ 106 in port_byte(KBD_STATUS, inChar);95 inChar=kbd_inb(KBD_STATUS); 107 96 if ((inChar & 0x01) == 0) 108 97 return FALSE; 109 98 110 99 /* Read the data. Handle nonsense with shift, control, etc. */ 111 in port_byte(KBD_DATA, inChar);100 inChar=kbd_inb(KBD_DATA); 112 101 113 102 if (extended) -
c/src/lib/libbsp/powerpc/shared/console/polled_io.c
r3ce2907 r69ed59f 21 21 #include <libcpu/page.h> 22 22 #include <libcpu/mmu.h> 23 #include "keyboard.h"24 23 #include <libcpu/io.h> 25 24 #include <string.h> 26 25 #include <stdarg.h> 27 26 #include <bsp/consoleIo.h> 27 #include <bsp.h> 28 28 #include <libcpu/spr.h> 29 30 #ifdef BSP_KBD_IOBASE 31 #define USE_KBD_SUPPORT 32 #endif 33 #ifdef BSP_VGA_IOBASE 34 #define USE_VGA_SUPPORT 35 #endif 36 37 #ifdef USE_KBD_SUPPORT 38 #include "keyboard.h" 39 #endif 40 #include "console.inl" 41 42 #ifdef __BOOT__ 43 extern void boot_udelay(); 44 #endif 29 45 30 46 typedef unsigned long long u64; … … 32 48 typedef unsigned int u32; 33 49 50 #ifdef USE_KBD_SUPPORT 34 51 unsigned short plain_map[NR_KEYS] = { 35 52 0xf200, 0xf01b, 0xf031, 0xf032, 0xf033, 0xf034, 0xf035, 0xf036, … … 297 314 /* These #defines have been copied from drivers/char/pc_keyb.h, by 298 315 * Martin Mares (mj@ucw.cz). 299 */ 300 #define KBD_STATUS_REG 0x64 /* Status register (R) */ 301 #define KBD_CNTL_REG 0x64 /* Controller command register (W) */ 302 #define KBD_DATA_REG 0x60 /* Keyboard data register (R/W) */ 316 * converted to offsets by Till Straumann <strauman@slac.stanford.edu> 317 */ 318 #define KBD_STATUS_REG 0x4 /* Status register (R) */ 319 #define KBD_CNTL_REG 0x4 /* Controller command register (W) */ 320 #define KBD_DATA_REG 0x0 /* Keyboard data register (R/W) */ 303 321 304 322 /* … … 357 375 SPR_RO(PVR) 358 376 377 #endif /* USE_KBD_SUPPORT */ 378 359 379 360 380 /* Early messages after mm init but before console init are kept in log … … 378 398 379 399 static board_memory_map mem_map = { 380 (__io_ptr) 0x80000000, 381 (__io_ptr) 0xc0000000, 382 (__io_ptr) 0xc0000000, 383 (__io_ptr) 0x80000000 400 (__io_ptr) _IO_BASE, /* from libcpu/io.h */ 401 (__io_ptr) _ISA_MEM_BASE, 384 402 }; 385 403 … … 404 422 405 423 extern console_io* curIo; 406 407 unsigned long ticks_per_ms = 1000000; /* Decrementer ticks per ms (true for 601) */408 409 /* The decrementer is present on all processors and the RTC on the 601410 * has the annoying characteristic of jumping from 1e9 to 0, so we411 * use the decrementer.412 */413 void udelay(int us) {414 us = us*ticks_per_ms/1000;415 _write_DEC(us);416 while((int)_read_DEC() >= 0);417 }418 424 419 425 void debug_putc(const u_char c) … … 474 480 #define LSR_ERR 0x80 /* Error */ 475 481 476 #define COM1 0x3F8477 482 478 483 #ifdef STATIC_LOG_ALLOC … … 544 549 } 545 550 551 #ifndef INL_CONSOLE_INB 552 #error "BSP probably didn't define a console port" 553 #endif 554 546 555 void serial_putc(const u_char c) 547 556 { 548 while (( inb(COM1+lsr) & LSR_THRE) == 0) ;549 outb(c, COM1+thr);557 while ((INL_CONSOLE_INB(lsr) & LSR_THRE) == 0) ; 558 INL_CONSOLE_OUTB(thr, c); 550 559 } 551 560 552 561 int serial_getc(void) 553 562 { 554 while (( inb(COM1+lsr) & LSR_DR) == 0) ;555 return ( inb(COM1+rbr));563 while ((INL_CONSOLE_INB(lsr) & LSR_DR) == 0) ; 564 return (INL_CONSOLE_INB(rbr)); 556 565 } 557 566 558 567 int serial_tstc(void) 559 568 { 560 return ((inb(COM1+lsr) & LSR_DR) != 0); 561 } 562 569 return ((INL_CONSOLE_INB(lsr) & LSR_DR) != 0); 570 } 571 572 #ifdef USE_VGA_SUPPORT 563 573 static void scroll(void) 564 574 { … … 580 590 { 581 591 int pos = console_global_data.cols*y + x; 582 outb(14, 0x3D4);583 outb(pos>>8, 0x3D5);584 outb(15, 0x3D4);585 outb(pos, 0x3D5);592 vga_outb(14, 0x14); 593 vga_outb(0x15, pos>>8); 594 vga_outb(0x14, 15); 595 vga_outb(0x15, pos); 586 596 } 587 597 … … 621 631 console_global_data.orig_y = y; 622 632 } 623 633 #endif /* USE_VGA_SUPPORT */ 634 635 #ifdef USE_KBD_SUPPORT 624 636 /* Keyboard support */ 625 637 static int kbd_getc(void) … … 628 640 unsigned code; 629 641 loop: 630 while(( inb(KBD_STATUS_REG) & KBD_STAT_OBF) == 0) ;631 632 dt = inb(KBD_DATA_REG);642 while((kbd_inb(KBD_STATUS_REG) & KBD_STAT_OBF) == 0) ; 643 644 dt = kbd_inb(KBD_DATA_REG); 633 645 634 646 brk = dt & 0x80; /* brk == 1 on key release */ … … 668 680 enter: /* Wait for key up */ 669 681 while (1) { 670 while(( inb(KBD_STATUS_REG) & KBD_STAT_OBF) == 0) ;671 dt = inb(KBD_DATA_REG);682 while((kbd_inb(KBD_STATUS_REG) & KBD_STAT_OBF) == 0) ; 683 dt = kbd_inb(KBD_DATA_REG); 672 684 if (dt & 0x80) /* key up */ break; 673 685 } … … 733 745 int status, data; 734 746 while(1) { 735 status = inb(KBD_STATUS_REG);747 status = kbd_inb(KBD_STATUS_REG); 736 748 if (status & KBD_STAT_OBF) { 737 data = inb(KBD_DATA_REG);749 data = kbd_inb(KBD_DATA_REG); 738 750 if (status & (KBD_STAT_GTO | KBD_STAT_PERR)) 739 751 return -1; … … 742 754 } 743 755 if (--ms < 0) return -1; 744 udelay(1000); 756 #ifdef __BOOT__ 757 boot_udelay(1000); 758 #else 759 rtems_bsp_delay(1000); 760 #endif 745 761 } 746 762 } 747 763 748 764 static void kbd_put(u_char c, int ms, int port) { 749 while ( inb(KBD_STATUS_REG) & KBD_STAT_IBF) {765 while (kbd_inb(KBD_STATUS_REG) & KBD_STAT_IBF) { 750 766 if (--ms < 0) return; 751 udelay(1000); 767 #ifdef __BOOT__ 768 boot_udelay(1000); 769 #else 770 rtems_bsp_delay(1000); 771 #endif 752 772 } 753 outb(c, port);773 kbd_outb(port, c); 754 774 } 755 775 … … 797 817 int kbd_tstc(void) 798 818 { 799 return ((inb(KBD_STATUS_REG) & KBD_STAT_OBF) != 0); 800 } 819 return ((kbd_inb(KBD_STATUS_REG) & KBD_STAT_OBF) != 0); 820 } 821 #endif /* USE_KBD_SUPPORT */ 801 822 802 823 const struct console_io … … 812 833 vacuum_getc, 813 834 vacuum_tstc 814 } ,815 835 } 836 , 816 837 serial_console_functions = { 817 838 serial_putc, 818 839 serial_getc, 819 840 serial_tstc 820 }, 821 841 } 842 #if defined(USE_KBD_SUPPORT) && defined(USE_VGA_SUPPORT) 843 , 822 844 vga_console_functions = { 823 845 vga_putc, 824 846 kbd_getc, 825 847 kbd_tstc 826 }; 848 } 849 #endif 850 ; 827 851 828 852 console_io* curIo = (console_io*) &vacuum_console_functions; … … 835 859 case CONSOLE_LOG : curIo = (console_io*)&log_console_functions; break; 836 860 case CONSOLE_SERIAL : curIo = (console_io*)&serial_console_functions; break; 861 #if defined(USE_KBD_SUPPORT) && defined(USE_VGA_SUPPORT) 837 862 case CONSOLE_VGA : curIo = (console_io*)&vga_console_functions; break; 863 #endif 838 864 default : curIo = (console_io*)&vacuum_console_functions;break; 839 865 } -
c/src/lib/libbsp/powerpc/shared/console/uart.c
r3ce2907 r69ed59f 20 20 struct uart_data 21 21 { 22 unsigned long ioBase; 22 23 int hwFlow; 23 24 int baud; 24 25 }; 25 26 26 static struct uart_data uart_data[2]; 27 27 /* 28 * Initialization of BSP specific data. 29 * The constants are pulled in from a BSP 30 * specific file, whereas all of the code 31 * in this file is generic and makes no 32 * assumptions about addresses, irq vectors 33 * etc... 34 */ 35 36 #define UART_UNSUPP ((unsigned long)(-1)) 37 38 static struct uart_data uart_data[2] = { 39 { 40 #ifdef BSP_UART_IOBASE_COM1 41 BSP_UART_IOBASE_COM1, 42 #else 43 UART_UNSUPP, 44 #endif 45 }, 46 { 47 #ifdef BSP_UART_IOBASE_COM2 48 BSP_UART_IOBASE_COM2, 49 #else 50 UART_UNSUPP, 51 #endif 52 }, 53 }; 54 55 #define MAX_UARTS (sizeof(uart_data)/sizeof(uart_data[0])) 56 #define SANITY_CHECK(uart) \ 57 assert( MAX_UARTS > (unsigned)(uart) && uart_data[(uart)].ioBase != UART_UNSUPP ) 28 58 /* 29 59 * Macros to read/wirte register of uart, if configuration is … … 34 64 uread(int uart, unsigned int reg) 35 65 { 36 register unsigned char val; 37 38 if(uart == 0) 39 { 40 inport_byte(COM1_BASE_IO+reg, val); 41 } 42 else 43 { 44 inport_byte(COM2_BASE_IO+reg, val); 45 } 46 47 return val; 66 67 return in_8((unsigned char*)(uart_data[uart].ioBase + reg)); 68 48 69 } 49 70 … … 51 72 uwrite(int uart, int reg, unsigned int val) 52 73 { 53 if(uart == 0) 54 { 55 outport_byte(COM1_BASE_IO+reg, val); 56 } 57 else 58 { 59 outport_byte(COM2_BASE_IO+reg, val); 60 } 74 out_8((unsigned char*)(uart_data[uart].ioBase + reg), val); 61 75 } 62 76 … … 104 118 105 119 /* Sanity check */ 106 assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2);120 SANITY_CHECK(uart); 107 121 108 122 switch(baud) … … 167 181 168 182 /* Sanity check */ 169 assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2);183 SANITY_CHECK(uart); 170 184 171 185 /* … … 198 212 { 199 213 200 assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2);214 SANITY_CHECK(uart); 201 215 202 216 switch(cmd) … … 261 275 unsigned int mcr; 262 276 263 assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2);277 SANITY_CHECK(uart); 264 278 265 279 if(!uart_data[uart].hwFlow) … … 282 296 unsigned int mcr; 283 297 284 assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2);298 SANITY_CHECK(uart); 285 299 286 300 if(!uart_data[uart].hwFlow) … … 312 326 unsigned char val; 313 327 314 assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2);328 SANITY_CHECK(uart); 315 329 316 330 val = uread(uart, LSR); … … 354 368 355 369 /* Sanity check */ 356 assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2);370 SANITY_CHECK(uart); 357 371 358 372 for(;;) … … 395 409 unsigned char val; 396 410 397 assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2);411 SANITY_CHECK(uart); 398 412 399 413 for(;;) … … 416 430 } 417 431 432 static void 433 uart_noop(const rtems_irq_connect_data *unused) 434 { 435 return; 436 } 437 438 /* note that the IRQ names contain _ISA_ for legacy 439 * reasons. They can be any interrupt, depending 440 * on the particular BSP... 441 */ 442 443 static int 444 uart_isr_is_on(const rtems_irq_connect_data *irq) 445 { 446 int uart = (irq->name == BSP_ISA_UART_COM1_IRQ) ? 447 BSP_UART_COM1 : BSP_UART_COM2; 448 return uread(uart,IER); 449 } 450 451 static int 452 doit(int uart, rtems_irq_hdl handler, int (*p)(const rtems_irq_connect_data*)) 453 { 454 rtems_irq_connect_data d={0}; 455 d.name = (uart == BSP_UART_COM1) ? 456 BSP_ISA_UART_COM1_IRQ : BSP_ISA_UART_COM2_IRQ; 457 d.off = d.on = uart_noop; 458 d.isOn = uart_isr_is_on; 459 d.hdl = handler; 460 return p(&d); 461 } 462 463 int 464 BSP_uart_install_isr(int uart, rtems_irq_hdl handler) 465 { 466 return doit(uart, handler, BSP_install_rtems_irq_handler); 467 } 468 469 int 470 BSP_uart_remove_isr(int uart, rtems_irq_hdl handler) 471 { 472 return doit(uart, handler, BSP_remove_rtems_irq_handler); 473 } 474 418 475 419 476 /* ================ Termios support =================*/ 420 477 421 static volatile int termios_stopped_com1 = 0; 422 static volatile int termios_tx_active_com1 = 0; 423 static void* termios_ttyp_com1 = NULL; 424 static char termios_tx_hold_com1 = 0; 425 static volatile char termios_tx_hold_valid_com1 = 0; 426 427 static volatile int termios_stopped_com2 = 0; 428 static volatile int termios_tx_active_com2 = 0; 429 static void* termios_ttyp_com2 = NULL; 430 static char termios_tx_hold_com2 = 0; 431 static volatile char termios_tx_hold_valid_com2 = 0; 478 static volatile int termios_stopped_com[2] = {0,0}; 479 static volatile int termios_tx_active_com[2] = {0,0}; 480 static void* termios_ttyp_com[2] = {NULL,NULL}; 481 static char termios_tx_hold_com[2] = {0,0}; 482 static volatile char termios_tx_hold_valid_com[2] = {0,0}; 432 483 433 484 /* … … 438 489 { 439 490 unsigned char val; 440 assert(uart == BSP_UART_COM1 || uart == BSP_UART_COM2); 441 442 if(uart == BSP_UART_COM1) 443 { 444 if(uart_data[uart].hwFlow) 445 { 446 val = uread(uart, MSR); 447 448 termios_stopped_com1 = (val & CTS) ? 0 : 1; 449 } 450 else 451 { 452 termios_stopped_com1 = 0; 453 } 454 termios_tx_active_com1 = 0; 455 termios_ttyp_com1 = ttyp; 456 termios_tx_hold_com1 = 0; 457 termios_tx_hold_valid_com1 = 0; 491 SANITY_CHECK(uart); 492 493 if(uart_data[uart].hwFlow) 494 { 495 val = uread(uart, MSR); 496 497 termios_stopped_com[uart] = (val & CTS) ? 0 : 1; 458 498 } 459 499 else 460 { 461 if(uart_data[uart].hwFlow) 462 { 463 val = uread(uart, MSR); 464 465 termios_stopped_com2 = (val & CTS) ? 0 : 1; 466 } 467 else 468 { 469 termios_stopped_com2 = 0; 470 } 471 termios_tx_active_com2 = 0; 472 termios_ttyp_com2 = ttyp; 473 termios_tx_hold_com2 = 0; 474 termios_tx_hold_valid_com2 = 0; 475 } 500 { 501 termios_stopped_com[uart] = 0; 502 } 503 termios_tx_active_com[uart] = 0; 504 termios_ttyp_com[uart] = ttyp; 505 termios_tx_hold_com[uart] = 0; 506 termios_tx_hold_valid_com[uart] = 0; 476 507 477 508 return; … … 479 510 480 511 int 481 BSP_uart_termios_write_com1(int minor, const char *buf, int len) 482 { 512 BSP_uart_termios_write_com(int minor, const char *buf, int len) 513 { 514 int uart=minor; /* could differ, theoretically */ 483 515 assert(buf != NULL); 484 516 … … 492 524 493 525 494 if(termios_stopped_com 1)526 if(termios_stopped_com[uart]) 495 527 { 496 528 /* CTS low */ 497 termios_tx_hold_com 1= *buf;498 termios_tx_hold_valid_com 1= 1;529 termios_tx_hold_com[uart] = *buf; 530 termios_tx_hold_valid_com[uart] = 1; 499 531 return 0; 500 532 } 501 533 502 534 /* Write character */ 503 uwrite( BSP_UART_COM1, THR, *buf & 0xff);535 uwrite(uart, THR, *buf & 0xff); 504 536 505 537 /* Enable interrupts if necessary */ 506 if(!termios_tx_active_com 1 && uart_data[BSP_UART_COM1].hwFlow)507 { 508 termios_tx_active_com 1= 1;509 uwrite( BSP_UART_COM1, IER,538 if(!termios_tx_active_com[uart] && uart_data[uart].hwFlow) 539 { 540 termios_tx_active_com[uart] = 1; 541 uwrite(uart, IER, 510 542 (RECEIVE_ENABLE | 511 543 TRANSMIT_ENABLE | … … 515 547 ); 516 548 } 517 else if(!termios_tx_active_com 1)518 { 519 termios_tx_active_com 1= 1;520 uwrite( BSP_UART_COM1, IER,549 else if(!termios_tx_active_com[uart]) 550 { 551 termios_tx_active_com[uart] = 1; 552 uwrite(uart, IER, 521 553 (RECEIVE_ENABLE | 522 554 TRANSMIT_ENABLE | … … 529 561 } 530 562 531 int 532 BSP_uart_termios_write_com2(int minor, const char *buf, int len) 533 { 534 assert(buf != NULL); 535 536 if(len <= 0) 537 { 538 return 0; 539 } 540 541 542 /* If there TX buffer is busy - something is royally screwed up */ 543 assert((uread(BSP_UART_COM2, LSR) & THRE) != 0); 544 545 if(termios_stopped_com2) 546 { 547 /* CTS low */ 548 termios_tx_hold_com2 = *buf; 549 termios_tx_hold_valid_com2 = 1; 550 return 0; 551 } 552 553 /* Write character */ 554 555 uwrite(BSP_UART_COM2, THR, *buf & 0xff); 556 557 /* Enable interrupts if necessary */ 558 if(!termios_tx_active_com2 && uart_data[BSP_UART_COM2].hwFlow) 559 { 560 termios_tx_active_com2 = 1; 561 uwrite(BSP_UART_COM2, IER, 562 (RECEIVE_ENABLE | 563 TRANSMIT_ENABLE | 564 RECEIVER_LINE_ST_ENABLE | 565 MODEM_ENABLE 566 ) 567 ); 568 } 569 else if(!termios_tx_active_com2) 570 { 571 termios_tx_active_com2 = 1; 572 uwrite(BSP_UART_COM2, IER, 573 (RECEIVE_ENABLE | 574 TRANSMIT_ENABLE | 575 RECEIVER_LINE_ST_ENABLE 576 ) 577 ); 578 } 579 580 return 0; 581 } 582 583 584 void 585 BSP_uart_termios_isr_com1(void) 563 static void 564 BSP_uart_termios_isr_com(int uart) 586 565 { 587 566 unsigned char buf[40]; … … 593 572 for(;;) 594 573 { 595 vect = uread( BSP_UART_COM1, IIR) & 0xf;574 vect = uread(uart, IIR) & 0xf; 596 575 597 576 switch(vect) 598 577 { 599 578 case MODEM_STATUS : 600 val = uread( BSP_UART_COM1, MSR);601 if(uart_data[ BSP_UART_COM1].hwFlow)579 val = uread(uart, MSR); 580 if(uart_data[uart].hwFlow) 602 581 { 603 582 if(val & CTS) 604 583 { 605 584 /* CTS high */ 606 termios_stopped_com 1= 0;607 if(termios_tx_hold_valid_com 1)585 termios_stopped_com[uart] = 0; 586 if(termios_tx_hold_valid_com[uart]) 608 587 { 609 termios_tx_hold_valid_com 1= 0;610 BSP_uart_termios_write_com 1(0, &termios_tx_hold_com1,588 termios_tx_hold_valid_com[uart] = 0; 589 BSP_uart_termios_write_com(uart, &termios_tx_hold_com[uart], 611 590 1); 612 591 } … … 615 594 { 616 595 /* CTS low */ 617 termios_stopped_com 1= 1;596 termios_stopped_com[uart] = 1; 618 597 } 619 598 } … … 624 603 { 625 604 /* Update rx buffer */ 626 rtems_termios_enqueue_raw_characters(termios_ttyp_com 1,605 rtems_termios_enqueue_raw_characters(termios_ttyp_com[uart], 627 606 (char *)buf, 628 607 off); … … 635 614 */ 636 615 637 ret = rtems_termios_dequeue_characters(termios_ttyp_com 1, 1);616 ret = rtems_termios_dequeue_characters(termios_ttyp_com[uart], 1); 638 617 639 618 /* If nothing else to send disable interrupts */ 640 if(ret == 0 && uart_data[ BSP_UART_COM1].hwFlow)619 if(ret == 0 && uart_data[uart].hwFlow) 641 620 { 642 uwrite( BSP_UART_COM1, IER,621 uwrite(uart, IER, 643 622 (RECEIVE_ENABLE | 644 623 RECEIVER_LINE_ST_ENABLE | … … 646 625 ) 647 626 ); 648 termios_tx_active_com 1= 0;627 termios_tx_active_com[uart] = 0; 649 628 } 650 629 else if(ret == 0) 651 630 { 652 uwrite( BSP_UART_COM1, IER,631 uwrite(uart, IER, 653 632 (RECEIVE_ENABLE | 654 633 RECEIVER_LINE_ST_ENABLE 655 634 ) 656 635 ); 657 termios_tx_active_com 1= 0;636 termios_tx_active_com[uart] = 0; 658 637 } 659 638 break; … … 662 641 /* RX data ready */ 663 642 assert(off < sizeof(buf)); 664 buf[off++] = uread( BSP_UART_COM1, RBR);643 buf[off++] = uread(uart, RBR); 665 644 break; 666 645 case RECEIVER_ERROR: 667 646 /* RX error: eat character */ 668 uartError( BSP_UART_COM1);647 uartError(uart); 669 648 break; 670 649 default: … … 677 656 678 657 void 679 BSP_uart_termios_isr_com2() 680 { 681 unsigned char buf[40]; 682 unsigned char val; 683 int off, ret, vect; 684 685 off = 0; 686 687 for(;;) 688 { 689 vect = uread(BSP_UART_COM2, IIR) & 0xf; 690 691 switch(vect) 692 { 693 case MODEM_STATUS : 694 val = uread(BSP_UART_COM2, MSR); 695 if(uart_data[BSP_UART_COM2].hwFlow) 696 { 697 if(val & CTS) 698 { 699 /* CTS high */ 700 termios_stopped_com2 = 0; 701 if(termios_tx_hold_valid_com2) 702 { 703 termios_tx_hold_valid_com2 = 0; 704 BSP_uart_termios_write_com2(0, &termios_tx_hold_com2, 705 1); 706 } 707 } 708 else 709 { 710 /* CTS low */ 711 termios_stopped_com2 = 1; 712 } 713 } 714 break; 715 case NO_MORE_INTR : 716 /* No more interrupts */ 717 if(off != 0) 718 { 719 /* Update rx buffer */ 720 rtems_termios_enqueue_raw_characters(termios_ttyp_com2, 721 (char *)buf, 722 off); 723 } 724 return; 725 case TRANSMITTER_HODING_REGISTER_EMPTY : 726 /* 727 * TX holding empty: we have to disable these interrupts 728 * if there is nothing more to send. 729 */ 730 731 ret = rtems_termios_dequeue_characters(termios_ttyp_com2, 1); 732 733 /* If nothing else to send disable interrupts */ 734 if(ret == 0 && uart_data[BSP_UART_COM2].hwFlow) 735 { 736 uwrite(BSP_UART_COM2, IER, 737 (RECEIVE_ENABLE | 738 RECEIVER_LINE_ST_ENABLE | 739 MODEM_ENABLE 740 ) 741 ); 742 termios_tx_active_com2 = 0; 743 } 744 else if(ret == 0) 745 { 746 uwrite(BSP_UART_COM2, IER, 747 (RECEIVE_ENABLE | 748 RECEIVER_LINE_ST_ENABLE 749 ) 750 ); 751 termios_tx_active_com2 = 0; 752 } 753 break; 754 case RECEIVER_DATA_AVAIL : 755 case CHARACTER_TIMEOUT_INDICATION: 756 /* RX data ready */ 757 assert(off < sizeof(buf)); 758 buf[off++] = uread(BSP_UART_COM2, RBR); 759 break; 760 case RECEIVER_ERROR: 761 /* RX error: eat character */ 762 uartError(BSP_UART_COM2); 763 break; 764 default: 765 /* Should not happen */ 766 assert(0); 767 return; 768 } 769 } 770 } 771 772 773 774 775 776 777 778 658 BSP_uart_termios_isr_com1(void) 659 { 660 BSP_uart_termios_isr_com(BSP_UART_COM1); 661 } 662 663 void 664 BSP_uart_termios_isr_com2(void) 665 { 666 BSP_uart_termios_isr_com(BSP_UART_COM2); 667 } 668 -
c/src/lib/libbsp/powerpc/shared/console/uart.h
r3ce2907 r69ed59f 11 11 #define _BSPUART_H 12 12 13 #include <bsp/irq.h> 14 13 15 void BSP_uart_init(int uart, int baud, int hwFlow); 14 16 void BSP_uart_set_baud(int aurt, int baud); … … 20 22 int BSP_uart_polled_read(int uart); 21 23 void BSP_uart_termios_set(int uart, void *ttyp); 22 int BSP_uart_termios_write_com1(int minor, const char *buf, int len); 23 int BSP_uart_termios_write_com2(int minor, const char *buf, int len); 24 int BSP_uart_termios_write_com(int minor, const char *buf, int len); 24 25 void BSP_uart_termios_isr_com1(); 25 26 void BSP_uart_termios_isr_com2(); 26 27 void BSP_uart_dbgisr_com1(void); 27 28 void BSP_uart_dbgisr_com2(void); 29 int BSP_uart_install_isr(int uart, rtems_irq_hdl handler); 30 int BSP_uart_remove_isr(int uart, rtems_irq_hdl handler); 31 28 32 extern unsigned BSP_poll_char_via_serial(void); 29 33 extern void BSP_output_char_via_serial(int val); … … 49 53 #define BSP_UART_COM1 (0) 50 54 #define BSP_UART_COM2 (1) 51 52 /*53 * Base IO for UART54 */55 56 #define COM1_BASE_IO 0x3F857 #define COM2_BASE_IO 0x2F858 55 59 56 /* -
c/src/lib/libbsp/powerpc/shared/include/bsp.h
r3ce2907 r69ed59f 27 27 */ 28 28 29 /* #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 */ 29 #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 30 30 #define CONFIGURE_INTERRUPT_STACK_MEMORY (16 * 1024) 31 32 /* fundamental addresses for this BSP (PREPxxx are from libcpu/io.h) */ 33 #define _IO_BASE PREP_ISA_IO_BASE 34 #define _ISA_MEM_BASE PREP_ISA_MEM_BASE 35 /* address of our ram on the PCI bus */ 36 #define PCI_DRAM_OFFSET PREP_PCI_DRAM_OFFSET 37 /* offset of pci memory as seen from the CPU */ 38 #define PCI_MEM_BASE PREP_ISA_MEM_BASE 39 40 /* 41 * base address definitions for several devices 42 * 43 */ 44 #define BSP_UART_IOBASE_COM1 ((_IO_BASE)+0x3f8) 45 #define BSP_UART_IOBASE_COM2 ((_IO_BASE)+0x2f8) 46 #define BSP_KBD_IOBASE ((_IO_BASE)+0x60) 47 #define BSP_VGA_IOBASE ((_IO_BASE)+0x3c0) 48 49 #define BSP_CONSOLE_PORT BSP_UART_COM1 50 #define BSP_UART_BAUD_BASE 115200 31 51 52 #include <bsp/openpic.h> 53 #define BSP_PIC_DO_EOI openpic_eoi(0) 54 55 32 56 #ifndef ASM 33 57 #define outport_byte(port,value) outb(value,port) -
c/src/lib/libbsp/powerpc/shared/irq/Makefile.am
r3ce2907 r69ed59f 22 22 all-local: $(PREINSTALL_FILES) 23 23 24 EXTRA_DIST = i8259.c irq.c irq .h irq_asm.S irq_init.c24 EXTRA_DIST = i8259.c irq.c irq_asm.S irq_init.c 25 25 26 26 include $(top_srcdir)/../../../../../automake/local.am -
c/src/lib/libbsp/powerpc/shared/irq/irq.c
r3ce2907 r69ed59f 21 21 #include <bsp/vectors.h> 22 22 23 #include <rtems/bspIo.h> /* for printk */ 23 24 #define RAVEN_INTR_ACK_REG 0xfeff0030 24 25 … … 125 126 126 127 if (!isValidInterrupt(irq->name)) { 128 printk("Invalid interrupt vector %i\n",irq->name); 127 129 return 0; 128 130 } … … 135 137 */ 136 138 if (rtems_hdl_tbl[irq->name].hdl != default_rtems_entry.hdl) { 139 printk("IRQ vector %i already connected\n",irq->name); 137 140 return 0; 138 141 } … … 373 376 } 374 377 else { 375 openpic_eoi(0); 378 #ifdef BSP_PCI_VME_BRIDGE_DOES_EOI 379 /* leave it to the VME bridge to do EOI, so 380 * it can re-enable the openpic while handling 381 * VME interrupts (-> VME priorities in software) 382 */ 383 if (BSP_PCI_VME_BRIDGE_IRQ!=irq) 384 #endif 385 openpic_eoi(0); 376 386 } 377 387 } -
c/src/lib/libbsp/powerpc/shared/irq/irq.h
r3ce2907 r69ed59f 88 88 BSP_PROCESSOR_IRQ_LOWEST_OFFSET = BSP_PCI_IRQ_MAX_OFFSET + 1, 89 89 BSP_PROCESSOR_IRQ_MAX_OFFSET = BSP_PROCESSOR_IRQ_LOWEST_OFFSET + BSP_PROCESSOR_IRQ_NUMBER - 1, 90 /* Misc vectors for OPENPIC irqs (IPI, timers) 91 */ 92 BSP_MISC_IRQ_NUMBER = 8, 93 BSP_MISC_IRQ_LOWEST_OFFSET = BSP_PROCESSOR_IRQ_MAX_OFFSET + 1, 94 BSP_MISC_IRQ_MAX_OFFSET = BSP_MISC_IRQ_LOWEST_OFFSET + BSP_MISC_IRQ_NUMBER - 1, 90 95 /* 91 96 * Summary 92 97 */ 93 BSP_IRQ_NUMBER = BSP_ PROCESSOR_IRQ_MAX_OFFSET + 1,98 BSP_IRQ_NUMBER = BSP_MISC_IRQ_MAX_OFFSET + 1, 94 99 BSP_LOWEST_OFFSET = BSP_ISA_IRQ_LOWEST_OFFSET, 95 BSP_MAX_OFFSET = BSP_ PROCESSOR_IRQ_MAX_OFFSET,100 BSP_MAX_OFFSET = BSP_MISC_IRQ_MAX_OFFSET, 96 101 /* 97 102 * Some ISA IRQ symbolic name definition -
c/src/lib/libbsp/powerpc/shared/irq/irq_init.c
r3ce2907 r69ed59f 8 8 * Enhanced by Jay Kulpinski <jskulpin@eng01.gdds.com> 9 9 * to make it valid for MVME2300 Motorola boards. 10 * 11 * Till Straumann <strauman@slac.stanford.edu>, 12/20/2001: 12 * Use the new interface to openpic_init 10 13 * 11 14 * The license and distribution terms for this file may be … … 88 91 */ 89 92 0 93 }; 94 95 static unsigned char mcp750_openpic_initpolarities[16] = { 96 1, /* 8259 cascade */ 97 0, /* all the rest of them */ 90 98 }; 91 99 … … 227 235 * First initialize the Interrupt management hardware 228 236 */ 229 OpenPIC_InitSenses = mcp750_openpic_initsenses;230 OpenPIC_NumInitSenses = sizeof(mcp750_openpic_initsenses) / sizeof(char);231 237 #ifdef TRACE_IRQ_INIT 232 238 printk("Going to initialize raven interrupt controller (openpic compliant)\n"); 233 239 #endif 234 openpic_init(1 );240 openpic_init(1, mcp750_openpic_initsenses, mcp750_openpic_initpolarities); 235 241 #ifdef TRACE_IRQ_INIT 236 242 printk("Going to initialize the PCI/ISA bridge IRQ related setting (VIA 82C586)\n"); -
c/src/lib/libbsp/powerpc/shared/openpic/openpic.c
r3ce2907 r69ed59f 27 27 #include <libcpu/byteorder.h> 28 28 #include <bsp.h> 29 29 #include <rtems/bspIo.h> 30 31 #ifndef NULL 30 32 #define NULL 0 33 #endif 31 34 #define REGISTER_DEBUG 32 35 #undef REGISTER_DEBUG … … 34 37 35 38 volatile struct OpenPIC *OpenPIC = NULL; 36 unsigned int OpenPIC_NumInitSenses = 0;37 unsigned char *OpenPIC_InitSenses = NULL;38 39 39 40 static unsigned int NumProcessors; … … 158 159 * report vendor and device id, and gets the wrong number of interrupts. 159 160 * (Motorola did a great job on that one!) 160 */ 161 162 void openpic_init(int main_pic) 161 * 162 * T. Straumann, 12/20/2001: polarities and senses are now passed as 163 * parameters, eliminated global vars. 164 * IRQ0 is no longer treated specially. 165 */ 166 167 void openpic_init(int main_pic, unsigned char *polarities, unsigned char *senses) 163 168 { 164 169 unsigned int t, i; … … 251 256 /* Processor 0 */ 252 257 openpic_mapirq(0, 1<<0); 253 for (i = 1; i < NumSources; i++) {258 for (i = 0; i < NumSources; i++) { 254 259 /* Enabled, Priority 8 */ 255 openpic_initirq(i, 8, OPENPIC_VEC_SOURCE+i, 0, 256 i < OpenPIC_NumInitSenses ? OpenPIC_InitSenses[i] : 1); 260 openpic_initirq(i, 8, OPENPIC_VEC_SOURCE+i, 261 polarities ? polarities[i] : 0, 262 senses ? senses[i] : 1); 257 263 /* Processor 0 */ 258 264 openpic_mapirq(i, 1<<0); -
c/src/lib/libbsp/powerpc/shared/openpic/openpic.h
r3ce2907 r69ed59f 192 192 193 193 extern volatile struct OpenPIC *OpenPIC; 194 extern unsigned int OpenPIC_NumInitSenses;195 extern unsigned char *OpenPIC_InitSenses;196 194 197 195 … … 310 308 311 309 /* Global Operations */ 312 extern void openpic_init(int );310 extern void openpic_init(int,unsigned char *, unsigned char *); 313 311 extern void openpic_reset(void); 314 312 extern void openpic_enable_8259_pass_through(void); -
c/src/lib/libbsp/powerpc/shared/pci/Makefile.am
r3ce2907 r69ed59f 4 4 5 5 6 C_FILES = pci.c 6 C_FILES = pci.c detect_raven_bridge.c pcifinddevice.c 7 7 8 8 H_FILES = pci.h … … 19 19 all-local: $(PREINSTALL_FILES) 20 20 21 EXTRA_DIST = pci.c pci.h 21 EXTRA_DIST = pci.c pci.h detect_raven_bridge.c pcifinddevice.c 22 22 23 23 include $(top_srcdir)/../../../../../automake/local.am -
c/src/lib/libbsp/powerpc/shared/pci/pci.c
r3ce2907 r69ed59f 15 15 * 16 16 * $Id$ 17 * 18 * Till Straumann, <strauman@slac.stanford.edu>, 1/2002 19 * - separated bridge detection code out of this file 17 20 */ 18 21 19 #include <bsp/consoleIo.h>20 22 #include <libcpu/io.h> 21 23 #include <bsp/pci.h> 22 #include <bsp/residual.h> 23 #include <bsp/openpic.h> 24 #include <bsp.h> 25 24 25 /* allow for overriding these definitions */ 26 #ifndef PCI_CONFIG_ADDR 26 27 #define PCI_CONFIG_ADDR 0xcf8 28 #endif 29 #ifndef PCI_CONFIG_DATA 27 30 #define PCI_CONFIG_DATA 0xcfc 31 #endif 32 28 33 #define PCI_INVALID_VENDORDEVICEID 0xffffffff 29 34 #define PCI_MULTI_FUNCTION 0x80 30 #define RAVEN_MPIC_IOSPACE_ENABLE 0x1 31 #define RAVEN_MPIC_MEMSPACE_ENABLE 0x2 32 #define RAVEN_MASTER_ENABLE 0x4 33 #define RAVEN_PARITY_CHECK_ENABLE 0x40 34 #define RAVEN_SYSTEM_ERROR_ENABLE 0x100 35 #define RAVEN_CLEAR_EVENTS_MASK 0xf9000000 36 35 36 /* define a shortcut */ 37 #define pci BSP_pci_configuration 37 38 38 39 /* … … 107 108 } 108 109 109 static const pci_config_access_functionsindirect_functions = {110 const pci_config_access_functions pci_indirect_functions = { 110 111 indirect_pci_read_config_byte, 111 112 indirect_pci_read_config_word, … … 116 117 }; 117 118 118 pci_config pci= {(volatile unsigned char*)PCI_CONFIG_ADDR,119 pci_config BSP_pci_configuration = {(volatile unsigned char*)PCI_CONFIG_ADDR, 119 120 (volatile unsigned char*)PCI_CONFIG_DATA, 120 & indirect_functions};121 &pci_indirect_functions}; 121 122 122 123 static int … … 206 207 } 207 208 208 static const pci_config_access_functionsdirect_functions = {209 const pci_config_access_functions pci_direct_functions = { 209 210 direct_pci_read_config_byte, 210 211 direct_pci_read_config_word, … … 216 217 217 218 218 void detect_host_bridge()219 {220 PPC_DEVICE *hostbridge;221 unsigned int id0;222 unsigned int tmp;223 224 /*225 * This code assumes that the host bridge is located at226 * bus 0, dev 0, func 0 AND that the old pre PCI 2.1227 * standart devices detection mecahnism that was used on PC228 * (still used in BSD source code) works.229 */230 hostbridge=residual_find_device(&residualCopy, PROCESSORDEVICE, NULL,231 BridgeController,232 PCIBridge, -1, 0);233 if (hostbridge) {234 if (hostbridge->DeviceId.Interface==PCIBridgeIndirect) {235 pci.pci_functions=&indirect_functions;236 /* Should be extracted from residual data,237 * indeed MPC106 in CHRP mode is different,238 * but we should not use residual data in239 * this case anyway.240 */241 pci.pci_config_addr = ((volatile unsigned char *)242 (ptr_mem_map->io_base+0xcf8));243 pci.pci_config_data = ptr_mem_map->io_base+0xcfc;244 } else if(hostbridge->DeviceId.Interface==PCIBridgeDirect) {245 pci.pci_functions=&direct_functions;246 pci.pci_config_data=(unsigned char *) 0x80800000;247 } else {248 }249 } else {250 /* Let us try by experimentation at our own risk! */251 pci.pci_functions = &direct_functions;252 /* On all direct bridges I know the host bridge itself253 * appears as device 0 function 0.254 */255 pci_read_config_dword(0, 0, 0, PCI_VENDOR_ID, &id0);256 if (id0==~0U) {257 pci.pci_functions = &indirect_functions;258 pci.pci_config_addr = ((volatile unsigned char*)259 (ptr_mem_map->io_base+0xcf8));260 pci.pci_config_data = ((volatile unsigned char*)ptr_mem_map->io_base+0xcfc);261 }262 /* Here we should check that the host bridge is actually263 * present, but if it not, we are in such a desperate264 * situation, that we probably can't even tell it.265 */266 }267 pci_read_config_dword(0, 0, 0, 0, &id0);268 if(id0 == PCI_VENDOR_ID_MOTOROLA +269 (PCI_DEVICE_ID_MOTOROLA_RAVEN<<16)) {270 /*271 * We have a Raven bridge. We will get information about its settings272 */273 pci_read_config_dword(0, 0, 0, PCI_COMMAND, &id0);274 #ifdef SHOW_RAVEN_SETTING275 printk("RAVEN PCI command register = %x\n",id0);276 #endif277 id0 |= RAVEN_CLEAR_EVENTS_MASK;278 pci_write_config_dword(0, 0, 0, PCI_COMMAND, id0);279 pci_read_config_dword(0, 0, 0, PCI_COMMAND, &id0);280 #ifdef SHOW_RAVEN_SETTING281 printk("After error clearing RAVEN PCI command register = %x\n",id0);282 #endif283 284 if (id0 & RAVEN_MPIC_IOSPACE_ENABLE) {285 pci_read_config_dword(0, 0, 0,PCI_BASE_ADDRESS_0, &tmp);286 #ifdef SHOW_RAVEN_SETTING287 printk("Raven MPIC is accessed via IO Space Access at address : %x\n",(tmp & ~0x1));288 #endif289 }290 if (id0 & RAVEN_MPIC_MEMSPACE_ENABLE) {291 pci_read_config_dword(0, 0, 0,PCI_BASE_ADDRESS_1, &tmp);292 #ifdef SHOW_RAVEN_SETTING293 printk("Raven MPIC is accessed via memory Space Access at address : %x\n", tmp);294 #endif295 OpenPIC=(volatile struct OpenPIC *) (tmp + PREP_ISA_MEM_BASE);296 printk("OpenPIC found at %p.\n",297 OpenPIC);298 }299 }300 if (OpenPIC == (volatile struct OpenPIC *)0) {301 BSP_panic("OpenPic Not found\n");302 }303 304 }305 306 219 /* 307 220 * This routine determines the maximum bus number in the system … … 309 222 void InitializePCI() 310 223 { 224 extern void detect_host_bridge(); 311 225 unsigned char ucSlotNumber, ucFnNumber, ucNumFuncs; 312 226 unsigned char ucHeader; -
c/src/lib/libbsp/powerpc/shared/pci/pci.h
r3ce2907 r69ed59f 1083 1083 #define PCIBIOS_BUFFER_TOO_SMALL 0x89 1084 1084 1085 #define PCI_MAX_DEVICES 16 1085 /* T. Straumann, 7/31/2001: increased to 32 - PMC slots are not 1086 * scanned on mvme2306 otherwise 1087 */ 1088 #define PCI_MAX_DEVICES 32 1086 1089 #define PCI_MAX_FUNCTIONS 8 1087 1090 … … 1104 1107 volatile unsigned char* pci_config_addr; 1105 1108 volatile unsigned char* pci_config_data; 1106 pci_config_access_functions* pci_functions;1109 const pci_config_access_functions* pci_functions; 1107 1110 } pci_config; 1108 1111 1109 extern pci_config pci;1112 extern pci_config BSP_pci_configuration; 1110 1113 1111 1114 extern inline int 1112 1115 pci_read_config_byte(unsigned char bus, unsigned char slot, unsigned char function, 1113 1116 unsigned char where, unsigned char * val) { 1114 return pci.pci_functions->read_config_byte(bus, slot, function, where, val);1117 return BSP_pci_configuration.pci_functions->read_config_byte(bus, slot, function, where, val); 1115 1118 } 1116 1119 … … 1118 1121 pci_read_config_word(unsigned char bus, unsigned char slot, unsigned char function, 1119 1122 unsigned char where, unsigned short * val) { 1120 return pci.pci_functions->read_config_word(bus, slot, function, where, val);1123 return BSP_pci_configuration.pci_functions->read_config_word(bus, slot, function, where, val); 1121 1124 } 1122 1125 … … 1124 1127 pci_read_config_dword(unsigned char bus, unsigned char slot, unsigned char function, 1125 1128 unsigned char where, unsigned int * val) { 1126 return pci.pci_functions->read_config_dword(bus, slot, function, where, val);1129 return BSP_pci_configuration.pci_functions->read_config_dword(bus, slot, function, where, val); 1127 1130 } 1128 1131 … … 1130 1133 pci_write_config_byte(unsigned char bus, unsigned char slot, unsigned char function, 1131 1134 unsigned char where, unsigned char val) { 1132 return pci.pci_functions->write_config_byte(bus, slot, function, where, val);1135 return BSP_pci_configuration.pci_functions->write_config_byte(bus, slot, function, where, val); 1133 1136 } 1134 1137 … … 1136 1139 pci_write_config_word(unsigned char bus, unsigned char slot, unsigned char function, 1137 1140 unsigned char where, unsigned short val) { 1138 return pci.pci_functions->write_config_word(bus, slot, function, where, val);1141 return BSP_pci_configuration.pci_functions->write_config_word(bus, slot, function, where, val); 1139 1142 } 1140 1143 … … 1142 1145 pci_write_config_dword(unsigned char bus, unsigned char slot, unsigned char function, 1143 1146 unsigned char where, unsigned int val) { 1144 return pci.pci_functions->write_config_dword(bus, slot, function, where, val);1147 return BSP_pci_configuration.pci_functions->write_config_dword(bus, slot, function, where, val); 1145 1148 } 1146 1149 … … 1151 1154 extern void InitializePCI(); 1152 1155 1156 /* scan for a specific device */ 1157 /* find a particular PCI device 1158 * (currently, only bus0 is scanned for device/fun0) 1159 * 1160 * RETURNS: zero on success, bus/dev/fun in *pbus / *pdev / *pfun 1161 */ 1162 int 1163 BSP_pciFindDevice(unsigned short vendorid, unsigned short deviceid, 1164 int instance, int *pbus, int *pdev, int *pfun); 1165 1153 1166 #endif /* RTEMS_PCI_H */ -
c/src/lib/libbsp/powerpc/shared/residual/Makefile.am
r3ce2907 r69ed59f 19 19 all-local: $(PREINSTALL_FILES) 20 20 21 EXTRA_DIST = pnp.h residual.c residual.h21 EXTRA_DIST = residual.c 22 22 23 23 include $(top_srcdir)/../../../../../automake/local.am -
c/src/lib/libbsp/powerpc/shared/start/start.S
r3ce2907 r69ed59f 193 193 1: addic. r20, r20, -0x1000 194 194 tlbie r20 195 b lt 1b195 bgt 1b 196 196 sync 197 197 blr -
c/src/lib/libbsp/powerpc/shared/startup/bspstart.c
r3ce2907 r69ed59f 201 201 */ 202 202 stack = ((unsigned char*) &__rtems_end) + INIT_STACK_SIZE - CPU_MINIMUM_STACK_FRAME_SIZE; 203 204 /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */ 205 *((unsigned32 *)stack) = 0; 206 203 207 /* 204 208 * Initialize the interrupt related settings … … 210 214 */ 211 215 intrStack = ((unsigned char*) &__rtems_end) + INIT_STACK_SIZE + INTR_STACK_SIZE - CPU_MINIMUM_STACK_FRAME_SIZE; 216 217 /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */ 218 *((unsigned32 *)intrStack) = 0; 219 212 220 asm volatile ("mtspr 273, %0" : "=r" (intrStack) : "0" (intrStack)); 213 221 asm volatile ("mtspr 272, %0" : "=r" (intrNestingLevel) : "0" (intrNestingLevel)); … … 229 237 * provided by the RAVEN 230 238 */ 231 setdbat(2, 0xc0000000, 0xc0000000, 0x08000000, IO_PAGE); 239 /* T. Straumann: give more PCI address space */ 240 setdbat(2, 0xc0000000, 0xc0000000, 0x10000000, IO_PAGE); 232 241 /* 233 242 * Must have acces to open pic PCI ACK registers -
c/src/lib/libbsp/powerpc/shared/vectors/vectors.S
r3ce2907 r69ed59f 86 86 mfxer r28 87 87 stw r28, EXC_XER_OFFSET(r1) 88 mfmsr r28 89 stw r28, EXC_MSR_OFFSET(r1) 90 mfdar r28 91 stw r28, EXC_DAR_OFFSET(r1) 88 92 /* 89 93 * compute SP at exception entry -
c/src/lib/libbsp/powerpc/shared/vectors/vectors.h
r3ce2907 r69ed59f 61 61 #define EXC_XER_OFFSET 156 62 62 #define EXC_LR_OFFSET 160 63 #define EXC_DAR_OFFSET 164 63 #define EXC_MSR_OFFSET 164 64 #define EXC_DAR_OFFSET 168 64 65 /* 65 66 * maintain the EABI requested 8 bytes aligment -
c/src/lib/libbsp/powerpc/shared/vectors/vectors_init.c
r3ce2907 r69ed59f 23 23 24 24 exception_handler_t globalExceptHdl; 25 26 /* T. Straumann: provide a stack trace 27 * <strauman@slac.stanford.edu>, 6/26/2001 28 */ 29 typedef struct LRFrameRec_ { 30 struct LRFrameRec_ *frameLink; 31 unsigned long *lr; 32 } LRFrameRec, *LRFrame; 33 34 #define STACK_CLAMP 50 /* in case we have a corrupted bottom */ 35 36 void 37 BSP_printStackTrace(BSP_Exception_frame* excPtr) 38 { 39 LRFrame f; 40 int i; 41 42 printk("Stack Trace: "); 43 printk(" IP: 0x%08x, LR: 0x%08x\n", 44 excPtr->EXC_SRR0, excPtr->EXC_LR); 45 for (f=(LRFrame)excPtr->GPR1, i=0; f->frameLink && i<STACK_CLAMP; f=f->frameLink) { 46 printk("--^ 0x%08x", (long)(f->frameLink->lr)); 47 if (!(++i%5)) 48 printk("\n"); 49 } 50 if (i>=STACK_CLAMP) { 51 printk("Too many stack frames (stack possibly corrupted), giving up...\n"); 52 } else { 53 if (i%5) 54 printk("\n"); 55 } 56 } 25 57 26 58 void C_exception_handler(BSP_Exception_frame* excPtr) … … 67 99 printk("\t XER = %x\n", excPtr->EXC_XER); 68 100 printk("\t LR = %x\n", excPtr->EXC_LR); 69 printk("\t MSR = %x\n", excPtr->EXC_MSR); 101 printk("\t DAR = %x\n", excPtr->EXC_DAR); 102 103 BSP_printStackTrace(excPtr); 104 70 105 if (excPtr->_EXC_number == ASM_DEC_VECTOR) 71 106 recoverable = 1;
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