Changeset 68920e7f in rtems


Ignore:
Timestamp:
Sep 12, 2018, 8:43:02 AM (10 months ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
master
Children:
d22147e
Parents:
53fb03fe
git-author:
Sebastian Huber <sebastian.huber@…> (09/12/18 08:43:02)
git-committer:
Sebastian Huber <sebastian.huber@…> (09/17/18 06:56:32)
Message:

bsp/tqm8xx: Move DMA support to channel descriptor

Update #3513.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • bsps/powerpc/tqm8xx/console/console.c

    r53fb03fe r68920e7f  
    115115 * Interrupt-driven callback
    116116 */
    117 static int m8xx_scc_mode[CONS_CHN_CNT];
    118 static void *sccttyp[CONS_CHN_CNT];
    119117typedef struct m8xx_console_chan_desc_s {
     118  void *tty;
     119  volatile m8xxBufferDescriptor_t *sccFrstRxBd;
     120  volatile m8xxBufferDescriptor_t *sccCurrRxBd;
     121  volatile m8xxBufferDescriptor_t *sccFrstTxBd;
     122  volatile m8xxBufferDescriptor_t *sccPrepTxBd;
     123  volatile m8xxBufferDescriptor_t *sccDequTxBd;
    120124  bool is_scc;                  /* true for SCC */
    121125  struct {
     
    127131    volatile m8xxSMCRegisters_t *smcr;
    128132  } regs;
     133  int chan;
     134  rtems_termios_device_mode mode;
    129135  rtems_vector_number ivec_src;
    130136  int cr_chan_code;
     
    138144   .parms = {(m8xxSCCparms_t *)&(m8xx.scc1p),NULL},
    139145   .regs = {&(m8xx.scc1),NULL},
     146   .chan = CONS_CHN_SCC1,
    140147   .ivec_src = BSP_CPM_IRQ_SCC1,
    141148   .cr_chan_code = M8xx_CR_CHAN_SCC1,
     
    145152   .parms = {&(m8xx.scc2p),NULL},
    146153   .regs = {&(m8xx.scc2),NULL},
     154   .chan = CONS_CHN_SCC2,
    147155   .ivec_src = BSP_CPM_IRQ_SCC2,
    148156   .cr_chan_code = M8xx_CR_CHAN_SCC2,
     
    152160   .parms = {&(m8xx.scc3p),NULL},
    153161   .regs = {&(m8xx.scc3),NULL},
     162   .chan = CONS_CHN_SCC3,
    154163   .ivec_src = BSP_CPM_IRQ_SCC3,
    155164   .cr_chan_code = M8xx_CR_CHAN_SCC3,
     
    159168   .parms = {&(m8xx.scc4p),NULL},
    160169   .regs = {&(m8xx.scc4),NULL},
     170   .chan = CONS_CHN_SCC4,
    161171   .ivec_src = BSP_CPM_IRQ_SCC4,
    162172   .cr_chan_code = M8xx_CR_CHAN_SCC4,
     
    166176   .parms = {NULL,&(m8xx.smc1p)},
    167177   .regs = {NULL,&(m8xx.smc1)},
     178   .chan = CONS_CHN_SMC1,
    168179   .ivec_src = BSP_CPM_IRQ_SMC1,
    169180   .cr_chan_code = M8xx_CR_CHAN_SMC1,
     
    173184   .parms = {NULL,&(m8xx.smc2p)},
    174185   .regs = {NULL,&(m8xx.smc2)},
     186   .chan = CONS_CHN_SMC2,
    175187   .ivec_src = BSP_CPM_IRQ_SMC2_OR_PIP,
    176188   .cr_chan_code = M8xx_CR_CHAN_SMC2,
    177189   .brg_used = -1}};
    178190
    179 #define CHN_PARAM_GET(chan,param)                       \
    180   (m8xx_console_chan_desc[chan].is_scc                  \
    181    ? m8xx_console_chan_desc[chan].parms.sccp->param     \
    182    : m8xx_console_chan_desc[chan].parms.smcp->param)
    183 
    184 #define CHN_PARAM_SET(chan,param,value)                         \
    185   do {if (m8xx_console_chan_desc[chan].is_scc)                  \
    186       m8xx_console_chan_desc[chan].parms.sccp->param = value;   \
    187     else                                                        \
    188       m8xx_console_chan_desc[chan].parms.smcp->param = value;   \
     191#define CHN_PARAM_GET(cd,param) \
     192  (cd->is_scc                   \
     193   ? cd->parms.sccp->param      \
     194   : cd->parms.smcp->param)
     195
     196#define CHN_PARAM_SET(cd,param,value)   \
     197  do {if (cd->is_scc)                   \
     198      cd->parms.sccp->param = value;    \
     199    else                                \
     200      cd->parms.smcp->param = value;    \
    189201  } while (0)
    190202
    191 #define CHN_EVENT_GET(chan)                             \
    192   (m8xx_console_chan_desc[chan].is_scc                  \
    193    ? m8xx_console_chan_desc[chan].regs.sccr->scce       \
    194    : m8xx_console_chan_desc[chan].regs.smcr->smce)
    195 
    196 #define CHN_EVENT_CLR(chan,mask)                                \
    197   do {                                                          \
    198     if (m8xx_console_chan_desc[chan].is_scc)                    \
    199       m8xx_console_chan_desc[chan].regs.sccr->scce = (mask);    \
    200     else                                                        \
    201       m8xx_console_chan_desc[chan].regs.smcr->smce = (mask);    \
     203#define CHN_EVENT_GET(cd)       \
     204  (cd->is_scc                   \
     205   ? cd->regs.sccr->scce        \
     206   : cd->regs.smcr->smce)
     207
     208#define CHN_EVENT_CLR(cd,mask)          \
     209  do {                                  \
     210    if (cd->is_scc)                     \
     211      cd->regs.sccr->scce = (mask);     \
     212    else                                \
     213      cd->regs.smcr->smce = (mask);     \
    202214  }while (0)
    203215
    204 #define CHN_MASK_GET(chan)                              \
    205   (m8xx_console_chan_desc[chan].is_scc                  \
    206    ? m8xx_console_chan_desc[chan].regs.sccr->sccm       \
    207    : m8xx_console_chan_desc[chan].regs.smcr->smcm)
    208 
    209 #define CHN_MASK_SET(chan,mask)                                 \
    210   do {                                                          \
    211     if (m8xx_console_chan_desc[chan].is_scc)                    \
    212       m8xx_console_chan_desc[chan].regs.sccr->sccm = (mask);    \
    213     else                                                        \
    214       m8xx_console_chan_desc[chan].regs.smcr->smcm = (mask);    \
     216#define CHN_MASK_GET(cd)        \
     217  (cd->is_scc                   \
     218   ? cd->regs.sccr->sccm        \
     219   : cd->regs.smcr->smcm)
     220
     221#define CHN_MASK_SET(cd,mask)           \
     222  do {                                  \
     223    if (cd->is_scc)                     \
     224      cd->regs.sccr->sccm = (mask);     \
     225    else                                \
     226      cd->regs.smcr->smcm = (mask);     \
    215227  }while (0)
    216 
    217 
    218 static volatile m8xxBufferDescriptor_t *sccFrstRxBd[CONS_CHN_CNT];
    219 static volatile m8xxBufferDescriptor_t *sccCurrRxBd[CONS_CHN_CNT];
    220 static volatile m8xxBufferDescriptor_t *sccFrstTxBd[CONS_CHN_CNT];
    221 static volatile m8xxBufferDescriptor_t *sccPrepTxBd[CONS_CHN_CNT];
    222 static volatile m8xxBufferDescriptor_t *sccDequTxBd[CONS_CHN_CNT];
    223228
    224229/*
     
    286291 */
    287292
    288 static int sccBRGalloc(int chan,int baud)
     293static int sccBRGalloc(m8xx_console_chan_desc_t *cd,int baud)
    289294{
    290295  rtems_interrupt_level level;
    291   m8xx_console_chan_desc_t *chan_desc = &(m8xx_console_chan_desc[chan]);
    292296  uint32_t reg_val;
    293297  int old_brg;
     
    299303#endif
    300304
    301   old_brg = chan_desc->brg_used;
     305  old_brg = cd->brg_used;
    302306  /* compute brg register contents needed */
    303307  reg_val = sccBRGval(baud);
     
    364368  /* connect to scc/smc */
    365369  if (new_brg >= 0) {
    366     m8xx_console_chan_desc[chan].brg_used = new_brg;
     370    cd->brg_used = new_brg;
    367371    /*
    368372     * Put SCC in NMSI mode, connect SCC to BRG or CLKx
    369373     */
    370     if (m8xx_console_chan_desc[chan].is_scc) {
    371       m8xx.sicr = ((m8xx.sicr & ~(M8xx_SICR_SCCRX_MSK(chan) |
    372                                   M8xx_SICR_SCCTX_MSK(chan))) |
    373                    M8xx_SICR_SCCRX(chan,new_brg)|
    374                    M8xx_SICR_SCCTX(chan,new_brg));
     374    if (cd->is_scc) {
     375      m8xx.sicr = ((m8xx.sicr & ~(M8xx_SICR_SCCRX_MSK(cd->chan) |
     376                                  M8xx_SICR_SCCTX_MSK(cd->chan))) |
     377                   M8xx_SICR_SCCRX(cd->chan,new_brg)|
     378                   M8xx_SICR_SCCTX(cd->chan,new_brg));
    375379    }
    376380    else {
    377381      /* connect SMC to BRGx or CLKx... */
    378       m8xx.simode = ((m8xx.simode & ~(M8xx_SIMODE_SMCCS_MSK(chan - CONS_CHN_SMC1)))|
    379                      M8xx_SIMODE_SMCCS(chan - CONS_CHN_SMC1,new_brg));
     382      m8xx.simode = ((m8xx.simode & ~(M8xx_SIMODE_SMCCS_MSK(cd->chan - CONS_CHN_SMC1)))|
     383                     M8xx_SIMODE_SMCCS(cd->chan - CONS_CHN_SMC1,new_brg));
    380384    }
    381385  }
     
    390394sccSetAttributes (int minor, const struct termios *t)
    391395{
     396  m8xx_console_chan_desc_t *cd = &m8xx_console_chan_desc[minor];
    392397  int baud;
    393398
     
    414419  case B460800: baud = 460800;  break;
    415420  }
    416   return sccBRGalloc(minor,baud);
     421  return sccBRGalloc(cd,baud);
    417422  return 0;
    418423}
     
    424429sccInterruptHandler (void *arg)
    425430{
    426   int chan = (int)arg;
     431  m8xx_console_chan_desc_t *cd = arg;
    427432
    428433  /*
    429434   * Buffer received?
    430435   */
    431   if (CHN_EVENT_GET(chan) & 0x1) {
     436  if (CHN_EVENT_GET(cd) & 0x1) {
    432437    /*
    433438     * clear SCC event flag
    434439     */
    435     CHN_EVENT_CLR(chan,0x01);
     440    CHN_EVENT_CLR(cd,0x01);
    436441    /*
    437442     * process event
    438443     */
    439     while ((sccCurrRxBd[chan]->status & M8xx_BD_EMPTY) == 0) {
    440       if (sccttyp[chan] != NULL) {
    441         rtems_cache_invalidate_multiple_data_lines((void *)sccCurrRxBd[chan]->buffer,
    442                                                    sccCurrRxBd[chan]->length);
    443         rtems_termios_enqueue_raw_characters (sccttyp[chan],
    444                                               (char *)sccCurrRxBd[chan]->buffer,
    445                                               sccCurrRxBd[chan]->length);
     444    while ((cd->sccCurrRxBd->status & M8xx_BD_EMPTY) == 0) {
     445      if (cd->tty != NULL) {
     446        rtems_cache_invalidate_multiple_data_lines((void *)cd->sccCurrRxBd->buffer,
     447                                                   cd->sccCurrRxBd->length);
     448        rtems_termios_enqueue_raw_characters (cd->tty,
     449                                              (char *)cd->sccCurrRxBd->buffer,
     450                                              cd->sccCurrRxBd->length);
    446451      }
    447452      /*
    448453       * clear status
    449454       */
    450       sccCurrRxBd[chan]->status =
    451         (sccCurrRxBd[chan]->status
     455      cd->sccCurrRxBd->status =
     456        (cd->sccCurrRxBd->status
    452457         & (M8xx_BD_WRAP | M8xx_BD_INTERRUPT))
    453458        | M8xx_BD_EMPTY;
     
    455460       * advance to next BD
    456461       */
    457       if ((sccCurrRxBd[chan]->status & M8xx_BD_WRAP) != 0) {
    458         sccCurrRxBd[chan] = sccFrstRxBd[chan];
     462      if ((cd->sccCurrRxBd->status & M8xx_BD_WRAP) != 0) {
     463        cd->sccCurrRxBd = cd->sccFrstRxBd;
    459464      }
    460465      else {
    461         sccCurrRxBd[chan]++;
     466        cd->sccCurrRxBd++;
    462467      }
    463468    }
     
    466471   * Buffer transmitted?
    467472   */
    468   if (CHN_EVENT_GET(chan) & 0x2) {
     473  if (CHN_EVENT_GET(cd) & 0x2) {
    469474    /*
    470475     * then clear interrupt event bit
    471476     */
    472     CHN_EVENT_CLR(chan,0x2);
     477    CHN_EVENT_CLR(cd,0x2);
    473478    /*
    474479     * and signal successful transmit to termios
     
    477482     * FIXME: multiple dequeue calls for multiple buffers
    478483     */
    479     while((sccDequTxBd[chan] != sccPrepTxBd[chan]) &&
    480           ((sccDequTxBd[chan]->status & M8xx_BD_READY) == 0)) {
    481       if (sccttyp[chan] != NULL) {
    482         rtems_termios_dequeue_characters (sccttyp[chan],
    483                                           sccDequTxBd[chan]->length);
     484    while((cd->sccDequTxBd != cd->sccPrepTxBd) &&
     485          ((cd->sccDequTxBd->status & M8xx_BD_READY) == 0)) {
     486      if (cd->tty != NULL) {
     487        rtems_termios_dequeue_characters (cd->tty,
     488                                          cd->sccDequTxBd->length);
    484489      }
    485490      /*
    486491       * advance to next BD
    487492       */
    488       if ((sccDequTxBd[chan]->status & M8xx_BD_WRAP) != 0) {
    489         sccDequTxBd[chan] = sccFrstTxBd[chan];
     493      if ((cd->sccDequTxBd->status & M8xx_BD_WRAP) != 0) {
     494        cd->sccDequTxBd = cd->sccFrstTxBd;
    490495      }
    491496      else {
    492         sccDequTxBd[chan]++;
     497        cd->sccDequTxBd++;
    493498      }
    494499    }
     
    497502
    498503static void
    499 mpc8xx_console_irq_on(int chan)
    500 {
    501     CHN_MASK_SET(chan, 3);      /* Enable TX and RX interrupts */
     504mpc8xx_console_irq_on(m8xx_console_chan_desc_t *cd)
     505{
     506    CHN_MASK_SET(cd, 3);        /* Enable TX and RX interrupts */
    502507}
    503508
    504509static void
    505 sccInitialize (m8xx_console_chan_desc_t *cd, int chan)
     510sccInitialize (m8xx_console_chan_desc_t *cd)
    506511{
    507512  int i;
     
    518523   * Allocate buffer descriptors
    519524   */
    520   sccCurrRxBd[chan] =
    521     sccFrstRxBd[chan] = m8xx_bd_allocate(SCC_RXBD_CNT);
    522   sccPrepTxBd[chan] =
    523     sccDequTxBd[chan] =
    524     sccFrstTxBd[chan] = m8xx_bd_allocate(SCC_TXBD_CNT);
    525   switch(chan) {
     525  cd->sccCurrRxBd =
     526    cd->sccFrstRxBd = m8xx_bd_allocate(SCC_RXBD_CNT);
     527  cd->sccPrepTxBd =
     528    cd->sccDequTxBd =
     529    cd->sccFrstTxBd = m8xx_bd_allocate(SCC_TXBD_CNT);
     530  switch(cd->chan) {
    526531  case CONS_CHN_SCC1:
    527532    /*
     
    606611   * allocate and connect BRG
    607612   */
    608   sccBRGalloc(chan,9600);
     613  sccBRGalloc(cd,9600);
    609614
    610615
     
    612617   * Set up SCCx parameter RAM common to all protocols
    613618   */
    614   CHN_PARAM_SET(chan,rbase,(char *)sccFrstRxBd[chan] - (char *)&m8xx);
    615   CHN_PARAM_SET(chan,tbase,(char *)sccFrstTxBd[chan] - (char *)&m8xx);
    616   CHN_PARAM_SET(chan,rfcr ,M8xx_RFCR_MOT | M8xx_RFCR_DMA_SPACE(0));
    617   CHN_PARAM_SET(chan,tfcr ,M8xx_TFCR_MOT | M8xx_TFCR_DMA_SPACE(0));
    618   if (m8xx_scc_mode[chan] != TERMIOS_POLLED)
    619     CHN_PARAM_SET(chan,mrblr,RXBUFSIZE);
     619  CHN_PARAM_SET(cd,rbase,(char *)cd->sccFrstRxBd - (char *)&m8xx);
     620  CHN_PARAM_SET(cd,tbase,(char *)cd->sccFrstTxBd - (char *)&m8xx);
     621  CHN_PARAM_SET(cd,rfcr ,M8xx_RFCR_MOT | M8xx_RFCR_DMA_SPACE(0));
     622  CHN_PARAM_SET(cd,tfcr ,M8xx_TFCR_MOT | M8xx_TFCR_DMA_SPACE(0));
     623  if (cd->mode != TERMIOS_POLLED)
     624    CHN_PARAM_SET(cd,mrblr,RXBUFSIZE);
    620625  else
    621     CHN_PARAM_SET(chan,mrblr,1);
     626    CHN_PARAM_SET(cd,mrblr,1);
    622627
    623628  /*
    624629   * Set up SCCx parameter RAM UART-specific parameters
    625630   */
    626   CHN_PARAM_SET(chan,un.uart.max_idl ,MAX_IDL_DEFAULT);
    627   CHN_PARAM_SET(chan,un.uart.brkln   ,0);
    628   CHN_PARAM_SET(chan,un.uart.brkec   ,0);
    629   CHN_PARAM_SET(chan,un.uart.brkcr   ,0);
    630   if (m8xx_console_chan_desc[chan].is_scc) {
    631     m8xx_console_chan_desc[chan].parms.sccp->un.uart.character[0]=0x8000; /* no char filter */
    632     m8xx_console_chan_desc[chan].parms.sccp->un.uart.rccm=0x80FF; /* control character mask */
     631  CHN_PARAM_SET(cd,un.uart.max_idl ,MAX_IDL_DEFAULT);
     632  CHN_PARAM_SET(cd,un.uart.brkln   ,0);
     633  CHN_PARAM_SET(cd,un.uart.brkec   ,0);
     634  CHN_PARAM_SET(cd,un.uart.brkcr   ,0);
     635  if (cd->is_scc) {
     636    cd->parms.sccp->un.uart.character[0]=0x8000; /* no char filter */
     637    cd->parms.sccp->un.uart.rccm=0x80FF; /* control character mask */
    633638  }
    634639
     
    637642   */
    638643  for (i = 0;i < SCC_RXBD_CNT;i++) {
    639     sccFrstRxBd[chan][i].status = M8xx_BD_EMPTY | M8xx_BD_INTERRUPT;
     644    cd->sccFrstRxBd[i].status = M8xx_BD_EMPTY | M8xx_BD_INTERRUPT;
    640645    if (i == SCC_RXBD_CNT-1) {
    641       sccFrstRxBd[chan][i].status |= M8xx_BD_WRAP;
    642     }
    643     sccFrstRxBd[chan][i].length = 0;
    644     sccFrstRxBd[chan][i].buffer = (*cd->rxBuf)[i];
     646      cd->sccFrstRxBd[i].status |= M8xx_BD_WRAP;
     647    }
     648    cd->sccFrstRxBd[i].length = 0;
     649    cd->sccFrstRxBd[i].buffer = (*cd->rxBuf)[i];
    645650  }
    646651  /*
     
    648653   */
    649654  for (i = 0;i < SCC_TXBD_CNT;i++) {
    650     sccFrstTxBd[chan][i].status = M8xx_BD_INTERRUPT;
     655    cd->sccFrstTxBd[i].status = M8xx_BD_INTERRUPT;
    651656    if (i == SCC_TXBD_CNT-1) {
    652       sccFrstTxBd[chan][i].status |= M8xx_BD_WRAP;
    653     }
    654     sccFrstTxBd[chan][i].length = 0;
    655     sccFrstTxBd[chan][i].buffer = NULL;
     657      cd->sccFrstTxBd[i].status |= M8xx_BD_WRAP;
     658    }
     659    cd->sccFrstTxBd[i].length = 0;
     660    cd->sccFrstTxBd[i].buffer = NULL;
    656661  }
    657662
     
    659664   * Set up SCC general and protocol-specific mode registers
    660665   */
    661   CHN_EVENT_CLR(chan,~0);       /* Clear any pending events */
    662   CHN_MASK_SET(chan,0);         /* Mask all interrupt/event sources */
    663 
    664   if (m8xx_console_chan_desc[chan].is_scc) {
    665     m8xx_console_chan_desc[chan].regs.sccr->psmr = 0xb000; /* 8N1, CTS flow control */
    666     m8xx_console_chan_desc[chan].regs.sccr->gsmr_h = 0x00000000;
    667     m8xx_console_chan_desc[chan].regs.sccr->gsmr_l = 0x00028004; /* UART mode */
     666  CHN_EVENT_CLR(cd,~0); /* Clear any pending events */
     667  CHN_MASK_SET(cd,0);           /* Mask all interrupt/event sources */
     668
     669  if (cd->is_scc) {
     670    cd->regs.sccr->psmr = 0xb000; /* 8N1, CTS flow control */
     671    cd->regs.sccr->gsmr_h = 0x00000000;
     672    cd->regs.sccr->gsmr_l = 0x00028004; /* UART mode */
    668673  }
    669674  else {
    670     m8xx_console_chan_desc[chan].regs.smcr->smcmr = 0x4820;
     675    cd->regs.smcr->smcmr = 0x4820;
    671676  }
    672677  /*
    673678   * Send "Init parameters" command
    674679   */
    675   m8xx_cp_execute_cmd(M8xx_CR_OP_INIT_RX_TX
    676                       | m8xx_console_chan_desc[chan].cr_chan_code);
     680  m8xx_cp_execute_cmd(M8xx_CR_OP_INIT_RX_TX | cd->cr_chan_code);
    677681
    678682  /*
    679683   * Enable receiver and transmitter
    680684   */
    681   if (m8xx_console_chan_desc[chan].is_scc) {
    682     m8xx_console_chan_desc[chan].regs.sccr->gsmr_l |= 0x00000030;
     685  if (cd->is_scc) {
     686    cd->regs.sccr->gsmr_l |= 0x00000030;
    683687  }
    684688  else {
    685     m8xx_console_chan_desc[chan].regs.smcr->smcmr |= 0x0003;
    686   }
    687 
    688   if (m8xx_scc_mode[chan] != TERMIOS_POLLED) {
     689    cd->regs.smcr->smcmr |= 0x0003;
     690  }
     691
     692  if (cd->mode != TERMIOS_POLLED) {
    689693    rtems_status_code sc;
    690694
    691695    sc = rtems_interrupt_handler_install(
    692       m8xx_console_chan_desc[chan].ivec_src,
     696      cd->ivec_src,
    693697      "SCC",
    694698      RTEMS_INTERRUPT_UNIQUE,
    695699      sccInterruptHandler,
    696       (void *)chan
     700      cd
    697701    );
    698702    if (sc != RTEMS_SUCCESSFUL) {
    699703      rtems_panic("console: cannot install IRQ handler");
    700704    }
    701     mpc8xx_console_irq_on(chan);
     705    mpc8xx_console_irq_on(cd);
    702706  }
    703707}
     
    709713sccPollRead (int minor)
    710714{
     715  m8xx_console_chan_desc_t *cd = &m8xx_console_chan_desc[minor];
    711716  int c = -1;
    712   int chan = minor;
    713717
    714718  while(1) {
    715     if ((sccCurrRxBd[chan]->status & M8xx_BD_EMPTY) != 0) {
     719    if ((cd->sccCurrRxBd->status & M8xx_BD_EMPTY) != 0) {
    716720      return -1;
    717721    }
    718722
    719     if (0 == (sccCurrRxBd[chan]->status & (M8xx_BD_OVERRUN
     723    if (0 == (cd->sccCurrRxBd->status & (M8xx_BD_OVERRUN
    720724                                           | M8xx_BD_PARITY_ERROR
    721725                                           | M8xx_BD_FRAMING_ERROR
     
    723727                                           | M8xx_BD_IDLE))) {
    724728      /* character received and no error detected */
    725       rtems_cache_invalidate_multiple_data_lines((void *)sccCurrRxBd[chan]->buffer,
    726                                                  sccCurrRxBd[chan]->length);
    727       c = (unsigned)*((char *)sccCurrRxBd[chan]->buffer);
     729      rtems_cache_invalidate_multiple_data_lines((void *)cd->sccCurrRxBd->buffer,
     730                                                 cd->sccCurrRxBd->length);
     731      c = (unsigned)*((char *)cd->sccCurrRxBd->buffer);
    728732      /*
    729733       * clear status
    730734       */
    731735    }
    732     sccCurrRxBd[chan]->status =
    733       (sccCurrRxBd[chan]->status
     736    cd->sccCurrRxBd->status =
     737      (cd->sccCurrRxBd->status
    734738       & (M8xx_BD_WRAP | M8xx_BD_INTERRUPT))
    735739      | M8xx_BD_EMPTY;
     
    737741     * advance to next BD
    738742     */
    739     if ((sccCurrRxBd[chan]->status & M8xx_BD_WRAP) != 0) {
    740       sccCurrRxBd[chan] = sccFrstRxBd[chan];
     743    if ((cd->sccCurrRxBd->status & M8xx_BD_WRAP) != 0) {
     744      cd->sccCurrRxBd = cd->sccFrstRxBd;
    741745    }
    742746    else {
    743       sccCurrRxBd[chan]++;
     747      cd->sccCurrRxBd++;
    744748    }
    745749    if (c >= 0) {
     
    761765{
    762766  if (len > 0) {
    763     int chan = minor;
    764 
    765     if ((sccPrepTxBd[chan]->status & M8xx_BD_READY) == 0) {
    766       sccPrepTxBd[chan]->buffer = (char *)buf;
    767       sccPrepTxBd[chan]->length = len;
     767    m8xx_console_chan_desc_t *cd = &m8xx_console_chan_desc[minor];
     768    if ((cd->sccPrepTxBd->status & M8xx_BD_READY) == 0) {
     769      cd->sccPrepTxBd->buffer = (char *)buf;
     770      cd->sccPrepTxBd->length = len;
    768771      rtems_cache_flush_multiple_data_lines((const void *)buf,len);
    769772      /*
    770773       * clear status, set ready bit
    771774       */
    772       sccPrepTxBd[chan]->status =
    773         (sccPrepTxBd[chan]->status
     775      cd->sccPrepTxBd->status =
     776        (cd->sccPrepTxBd->status
    774777         & M8xx_BD_WRAP)
    775778        | M8xx_BD_READY | M8xx_BD_INTERRUPT;
    776       if ((sccPrepTxBd[chan]->status & M8xx_BD_WRAP) != 0) {
    777         sccPrepTxBd[chan] = sccFrstTxBd[chan];
     779      if ((cd->sccPrepTxBd->status & M8xx_BD_WRAP) != 0) {
     780        cd->sccPrepTxBd = cd->sccFrstTxBd;
    778781      }
    779782      else {
    780         sccPrepTxBd[chan]++;
     783        cd->sccPrepTxBd++;
    781784      }
    782785    }
     
    789792sccPollWrite (int minor, const char *buf, size_t len)
    790793{
     794  m8xx_console_chan_desc_t *cd = &m8xx_console_chan_desc[minor];
    791795  static char txBuf[CONS_CHN_CNT][SCC_TXBD_CNT];
    792   int chan = minor;
     796  int chan = cd->chan;
    793797  int bd_used;
    794798  size_t retval = len;
    795799
    796800  while (len--) {
    797     while (sccPrepTxBd[chan]->status & M8xx_BD_READY)
     801    while (cd->sccPrepTxBd->status & M8xx_BD_READY)
    798802      continue;
    799     bd_used = sccPrepTxBd[chan]-sccFrstTxBd[chan];
     803    bd_used = cd->sccPrepTxBd - cd->sccFrstTxBd;
    800804    txBuf[chan][bd_used] = *buf++;
    801805      rtems_cache_flush_multiple_data_lines((const void *)&txBuf[chan][bd_used],
    802806                                            sizeof(txBuf[chan][bd_used]));
    803     sccPrepTxBd[chan]->buffer = &(txBuf[chan][bd_used]);
    804     sccPrepTxBd[chan]->length = 1;
    805     sccPrepTxBd[chan]->status =
    806       (sccPrepTxBd[chan]->status
     807    cd->sccPrepTxBd->buffer = &(txBuf[chan][bd_used]);
     808    cd->sccPrepTxBd->length = 1;
     809    cd->sccPrepTxBd->status =
     810      (cd->sccPrepTxBd->status
    807811       & M8xx_BD_WRAP)
    808812      | M8xx_BD_READY;
    809     if ((sccPrepTxBd[chan]->status & M8xx_BD_WRAP) != 0) {
    810       sccPrepTxBd[chan] = sccFrstTxBd[chan];
     813    if ((cd->sccPrepTxBd->status & M8xx_BD_WRAP) != 0) {
     814      cd->sccPrepTxBd = cd->sccFrstTxBd;
    811815    }
    812816    else {
    813       sccPrepTxBd[chan]++;
     817      cd->sccPrepTxBd++;
    814818    }
    815819  }
     
    866870{
    867871  rtems_status_code status = RTEMS_SUCCESSFUL;
    868   int chan,entry,ttynum;
     872  int entry,ttynum;
    869873  char tty_name[] = "/dev/tty00";
    870874
     
    883887       entry++) {
    884888    if (channel_list[entry].driver_mode != CONS_MODE_UNUSED) {
     889      m8xx_console_chan_desc_t *cd =
     890        &m8xx_console_chan_desc[channel_list[entry].driver_mode];
    885891      /*
    886892       * Do device-specific initialization
    887893       */
    888       chan = channel_list[entry].minor;
    889       m8xx_scc_mode[chan] = channel_list[entry].driver_mode;
    890       sccInitialize (&m8xx_console_chan_desc[chan], chan);
     894      cd->mode = channel_list[entry].driver_mode;
     895      sccInitialize (cd);
    891896
    892897      /*
     
    932937                                 )
    933938{
     939  m8xx_console_chan_desc_t *cd = &m8xx_console_chan_desc[minor];
    934940  rtems_status_code status;
    935941  int chan = minor;
     
    956962  };
    957963
    958   if (m8xx_scc_mode[chan] == TERMIOS_IRQ_DRIVEN) {
     964  if (cd->mode == TERMIOS_IRQ_DRIVEN) {
    959965    status = rtems_termios_open (major, minor, arg, &interruptCallbacks);
    960     sccttyp[chan] = args->iop->data1;
     966    m8xx_console_chan_desc[chan].tty = args->iop->data1;
    961967  }
    962968  else {
    963969    status = rtems_termios_open (major, minor, arg, &pollCallbacks);
    964     sccttyp[chan] = args->iop->data1;
     970    m8xx_console_chan_desc[chan].tty = args->iop->data1;
    965971  }
    966972  return status;
     
    979985
    980986  rc = rtems_termios_close (arg);
    981   sccttyp[minor] = NULL;
     987  m8xx_console_chan_desc[minor].tty = NULL;
    982988
    983989  return rc;
Note: See TracChangeset for help on using the changeset viewer.