Changeset 6869321 in rtems


Ignore:
Timestamp:
Aug 13, 2018, 10:50:38 AM (15 months ago)
Author:
Amaan Cheval <amaan.cheval@…>
Branches:
master
Children:
bc731313
Parents:
4544749e
git-author:
Amaan Cheval <amaan.cheval@…> (08/13/18 10:50:38)
git-committer:
Joel Sherrill <joel@…> (08/13/18 15:48:20)
Message:

bsps/x86_64: Add support for RTEMS interrupts

Updates #2898.

Files:
4 added
8 edited

Legend:

Unmodified
Added
Removed
  • bsps/x86_64/amd64/start/bspstart.c

    r4544749e r6869321  
    2828#include <bsp/bootcard.h>
    2929#include <libcpu/page.h>
     30#include <bsp/irq-generic.h>
    3031
    3132void bsp_start(void)
    3233{
    3334  paging_init();
     35  bsp_interrupt_initialize();
    3436}
  • bsps/x86_64/headers.am

    r4544749e r6869321  
    11## This file was generated by "./boostrap -H".
     2
     3include_bspdir = $(includedir)/bsp
     4include_bsp_HEADERS =
     5include_bsp_HEADERS += ../../../../../bsps/x86_64/include/bsp/irq.h
    26
    37include_libcpudir = $(includedir)/libcpu
  • c/src/lib/libbsp/x86_64/amd64/Makefile.am

    r4544749e r6869321  
    2828librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/dev/getentropy/getentropy-cpucounter.c
    2929librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/start/bspreset-empty.c
     30librtemsbsp_a_SOURCES += ../../../../../../bsps/x86_64/amd64/interrupts/idt.c
     31librtemsbsp_a_SOURCES += ../../../../../../bsps/x86_64/amd64/interrupts/isr_handler.S
     32librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/irq/irq-default-handler.c
    3033# clock
    3134librtemsbsp_a_SOURCES += ../../../../../../bsps/shared/dev/clock/clock-simidle.c
     
    4043
    4144include $(top_srcdir)/../../../../automake/local.am
     45include $(srcdir)/../../../../../../bsps/shared/irq-sources.am
    4246include $(srcdir)/../../../../../../bsps/shared/shared-sources.am
    4347include $(srcdir)/../../../../../../bsps/x86_64/amd64/headers.am
  • cpukit/score/cpu/x86_64/cpu.c

    r4544749e r6869321  
    3939
    4040#include <rtems/system.h>
     41#include <rtems/score/idt.h>
    4142#include <rtems/score/isr.h>
    4243#include <rtems/score/wkspace.h>
     
    5354}
    5455
    55 uint32_t _CPU_ISR_Get_level(void)
    56 {
    57   return 0;
    58 }
    59 
    6056void _CPU_ISR_install_raw_handler(
    6157  uint32_t    vector,
     
    6460)
    6561{
     62  amd64_install_raw_interrupt(
     63    vector,
     64    (uintptr_t) new_handler,
     65    (uintptr_t*) old_handler
     66  );
    6667}
    6768
     
    7475}
    7576
    76 void _CPU_Install_interrupt_stack(void)
    77 {
    78 }
    79 
    8077void *_CPU_Thread_Idle_body(uintptr_t ignored)
    8178{
    82   for( ; ; ) { }
     79  for ( ; ; ) { }
    8380}
  • cpukit/score/cpu/x86_64/headers.am

    r4544749e r6869321  
    1515include_rtems_score_HEADERS += include/rtems/score/cpuatomic.h
    1616include_rtems_score_HEADERS += include/rtems/score/cpuimpl.h
     17include_rtems_score_HEADERS += include/rtems/score/idt.h
    1718include_rtems_score_HEADERS += include/rtems/score/x86_64.h
  • cpukit/score/cpu/x86_64/include/rtems/score/cpu.h

    r4544749e r6869321  
    102102} Context_Control_fp;
    103103
     104/*
     105 * Caller-saved registers for interrupt frames
     106 */
    104107typedef struct {
    105     uint32_t   special_interrupt_register;
     108  /**
     109   * @note: rdi is a caller-saved register too, but it's used in function calls
     110   * and is hence saved separately on the stack;
     111   *
     112   * @see DISTINCT_INTERRUPT_ENTRY
     113   * @see _ISR_Handler
     114   */
     115
     116  uint64_t rax;
     117  uint64_t rcx;
     118  uint64_t rdx;
     119  uint64_t rsi;
     120  uint64_t r8;
     121  uint64_t r9;
     122  uint64_t r10;
     123  uint64_t r11;
     124
     125  /*
     126   * This holds the rsp just before _ISR_Handler is called; it's needed because
     127   * in the handler, we align the stack to make further calls, and we're not
     128   * sure how alignment may move the stack-pointer around, leaving no way to get
     129   * back to the stack, and therefore the interrupt frame.
     130   */
     131  uint64_t saved_rsp;
     132
     133  /* XXX:
     134   * - FS segment selector for TLS
     135   * - x87 status word?
     136   * - MMX?
     137   * - XMM?
     138   */
    106139} CPU_Interrupt_frame;
    107140
    108141#endif /* !ASM */
    109142
     143#define CPU_INTERRUPT_FRAME_SIZE 72
     144
     145/*
     146 * When SMP is enabled, percpuasm.c has a similar assert, but since we use the
     147 * interrupt frame regardless of SMP, we'll confirm it here.
     148 */
     149#ifndef ASM
     150  RTEMS_STATIC_ASSERT(
     151    sizeof(CPU_Interrupt_frame) == CPU_INTERRUPT_FRAME_SIZE,
     152    CPU_INTERRUPT_FRAME_SIZE
     153  );
     154#endif
    110155
    111156#define CPU_CONTEXT_FP_SIZE sizeof( Context_Control_fp )
     
    127172#define _CPU_Initialize_vectors()
    128173
    129 // XXX: For RTEMS critical sections
    130 #define _CPU_ISR_Disable( _isr_cookie ) \
    131   { \
    132     (_isr_cookie) = 0;   /* do something to prevent warnings */ \
    133   }
    134 
    135 #define _CPU_ISR_Enable( _isr_cookie )  \
    136   { \
    137     (void) (_isr_cookie);   /* prevent warnings from -Wunused-but-set-variable */ \
    138   }
    139 
    140 #define _CPU_ISR_Flash( _isr_cookie ) \
    141   { \
    142   }
    143 
    144 RTEMS_INLINE_ROUTINE bool _CPU_ISR_Is_enabled( uint32_t level )
     174#define _CPU_ISR_Enable(_level)                             \
     175{                                                           \
     176  amd64_enable_interrupts();                                \
     177  _level = 0;                                               \
     178  (void) _level; /* Prevent -Wunused-but-set-variable */    \
     179}
     180
     181#define _CPU_ISR_Disable(_level)                            \
     182{                                                           \
     183  amd64_enable_interrupts();                                \
     184  _level = 1;                                               \
     185  (void) _level; /* Prevent -Wunused-but-set-variable */    \
     186}
     187
     188#define _CPU_ISR_Flash(_level)                              \
     189{                                                           \
     190  amd64_enable_interrupts();                                \
     191  amd64_disable_interrupts();                               \
     192  _level = 1;                                               \
     193  (void) _level; /* Prevent -Wunused-but-set-variable */    \
     194}
     195
     196RTEMS_INLINE_ROUTINE bool _CPU_ISR_Is_enabled(uint32_t level)
    145197{
    146   return false;
    147 }
    148 
    149 #define _CPU_ISR_Set_level( new_level ) \
    150   { \
    151   }
    152 
    153 uint32_t   _CPU_ISR_Get_level( void );
     198  return (level & EFLAGS_INTR_ENABLE) != 0;
     199}
     200
     201RTEMS_INLINE_ROUTINE void _CPU_ISR_Set_level(uint32_t new_level)
     202{
     203  if ( new_level ) {
     204    amd64_disable_interrupts();
     205  }
     206  else {
     207    amd64_enable_interrupts();
     208  }
     209}
     210
     211RTEMS_INLINE_ROUTINE uint32_t _CPU_ISR_Get_level(void)
     212{
     213  uint64_t rflags;
     214
     215  __asm__ volatile ( "pushf; \
     216                      popq %0"
     217                     : "=rm" (rflags)
     218  );
     219
     220  uint32_t level = (rflags & EFLAGS_INTR_ENABLE) ? 0 : 1;
     221  return level;
     222}
    154223
    155224/* end of ISR handler macros */
     
    229298);
    230299
    231 void _CPU_Install_interrupt_stack( void );
    232 
    233300void *_CPU_Thread_Idle_body( uintptr_t ignored );
    234301
  • cpukit/score/cpu/x86_64/include/rtems/score/cpu_asm.h

    r4544749e r6869321  
    4646}
    4747
     48RTEMS_INLINE_ROUTINE uint16_t amd64_get_cs(void)
     49{
     50  uint16_t segment = 0;
     51
     52  __asm__ volatile ( "movw %%cs, %0" : "=r" (segment) : "0" (segment) );
     53
     54  return segment;
     55}
    4856
    4957RTEMS_INLINE_ROUTINE void amd64_set_cr3(uint64_t segment)
     
    5967                     : "a" (code) );
    6068}
     69
     70RTEMS_INLINE_ROUTINE void amd64_enable_interrupts(void)
     71{
     72  __asm__ volatile ( "sti" );
     73}
     74
     75RTEMS_INLINE_ROUTINE void amd64_disable_interrupts(void)
     76{
     77  __asm__ volatile ( "cli" );
     78}
    6179#endif /* !ASM */
    6280
  • cpukit/score/cpu/x86_64/x86_64-context-initialize.c

    r4544749e r6869321  
    7777
    7878  // XXX: Should be used in the future
    79   (void) new_level;
    8079  (void) tls_area;
    8180
    82   // XXX: Leaving interrupts off regardless of `new_level` for now
    83   the_context->rflags = CPU_EFLAGS_INTERRUPTS_OFF;
     81  if ( new_level ) {
     82    the_context->rflags = CPU_EFLAGS_INTERRUPTS_OFF;
     83  }
     84  else {
     85    the_context->rflags = CPU_EFLAGS_INTERRUPTS_ON;
     86  }
    8487
    8588  _stack  = ((uintptr_t) stack_area_begin) + stack_area_size;
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