Changeset 66c373bf in rtems for c/src/lib/libcpu/powerpc/shared
- Timestamp:
- Mar 31, 2004, 2:04:00 AM (17 years ago)
- Branches:
- 4.10, 4.11, 4.8, 4.9, 5, master
- Children:
- 3d04f8b
- Parents:
- 35f97010
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libcpu/powerpc/shared/src/cache.c
r35f97010 r66c373bf 48 48 void ) 49 49 { 50 u nsigned32value;50 uint32_t value; 51 51 PPC_Get_HID0( value ); 52 52 value |= 0x00004000; /* set DCE bit */ … … 57 57 void ) 58 58 { 59 u nsigned32value;59 uint32_t value; 60 60 PPC_Get_HID0( value ); 61 61 value &= 0xFFFFBFFF; /* clear DCE bit */ … … 66 66 void ) 67 67 { 68 u nsigned32value;68 uint32_t value; 69 69 PPC_Get_HID0( value ); 70 70 value |= 0x00008000; /* Set ICE bit */ … … 75 75 void ) 76 76 { 77 u nsigned32value;77 uint32_t value; 78 78 PPC_Get_HID0( value ); 79 79 value &= 0xFFFF7FFF; /* Clear ICE bit */ … … 109 109 void _CPU_cache_enable_data ( void ) 110 110 { 111 u nsigned32r1;111 uint32_t r1; 112 112 r1 = (0x2<<24); 113 113 mtspr( 568, r1 ); … … 117 117 void _CPU_cache_disable_data ( void ) 118 118 { 119 u nsigned32r1;119 uint32_t r1; 120 120 r1 = (0x4<<24); 121 121 mtspr( 568, r1 ); … … 136 136 void _CPU_cache_enable_instruction ( void ) 137 137 { 138 u nsigned32r1;138 uint32_t r1; 139 139 r1 = (0x2<<24); 140 140 mtspr( 560, r1 ); … … 144 144 void _CPU_cache_disable_instruction ( void ) 145 145 { 146 u nsigned32r1;146 uint32_t r1; 147 147 r1 = (0x4<<24); 148 148 mtspr( 560, r1 );
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