Changeset 66c373bf in rtems
- Timestamp:
- 03/31/04 02:04:00 (19 years ago)
- Branches:
- 4.10, 4.11, 4.8, 4.9, 5, master
- Children:
- 3d04f8b
- Parents:
- 35f97010
- Location:
- c/src/lib/libcpu/powerpc
- Files:
-
- 32 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libcpu/powerpc/ChangeLog
r35f97010 r66c373bf 1 2004-03-30 Ralf Corsepius <ralf_corsepius@rtems.org> 2 3 * mpc505/timer/timer.c, mpc5xx/timer/timer.c, 4 mpc6xx/clock/c_clock.c, mpc6xx/timer/timer.c, mpc8260/clock/clock.c, 5 mpc8260/console-generic/console-generic.c, mpc8260/cpm/cp.c, 6 mpc8260/cpm/dpram.c, mpc8260/include/cpm.h, mpc8260/include/mmu.h, 7 mpc8260/include/mpc8260.h, mpc8260/mmu/mmu.c, mpc8260/timer/timer.c, 8 mpc8xx/clock/clock.c, mpc8xx/console-generic/console-generic.c, 9 mpc8xx/cpm/cp.c, mpc8xx/cpm/dpram.c, mpc8xx/include/cpm.h, 10 mpc8xx/include/mmu.h, mpc8xx/include/mpc8xx.h, mpc8xx/mmu/mmu.c, 11 mpc8xx/timer/timer.c, ppc403/clock/clock.c, 12 ppc403/console/console.c, ppc403/console/console405.c, 13 ppc403/ictrl/ictrl.c, ppc403/ictrl/ictrl.h, ppc403/timer/timer.c, 14 ppc403/tty_drv/tty_drv.c, rtems/powerpc/cache.h, shared/src/cache.c: 15 Convert to using c99 fixed size types. 16 1 17 2004-03-26 Ralf Corsepius <ralf_corsepius@rtems.org> 2 18 -
c/src/lib/libcpu/powerpc/mpc505/timer/timer.c
r35f97010 r66c373bf 43 43 int Read_timer( void ) 44 44 { 45 rtems_unsigned32value;45 uint32_t value; 46 46 asm volatile ( " mftb %0": "=r" (value) ); 47 47 return value - lastInitValue; -
c/src/lib/libcpu/powerpc/mpc5xx/timer/timer.c
r35f97010 r66c373bf 48 48 int Read_timer( void ) 49 49 { 50 rtems_unsigned32value;50 uint32_t value; 51 51 asm volatile ( " mftb %0": "=r" (value) ); 52 52 return value - lastInitValue; -
c/src/lib/libcpu/powerpc/mpc6xx/clock/c_clock.c
r35f97010 r66c373bf 34 34 */ 35 35 36 volatile rtems_unsigned32Clock_driver_ticks;36 volatile uint32_t Clock_driver_ticks; 37 37 38 38 /* … … 40 40 */ 41 41 42 rtems_unsigned32Clock_Decrementer_value;42 uint32_t Clock_Decrementer_value; 43 43 44 44 /* … … 93 93 int clockIsOn(void* unused) 94 94 { 95 u nsigned32msr_value;95 uint32_t msr_value; 96 96 97 97 _CPU_MSR_GET( msr_value ); -
c/src/lib/libcpu/powerpc/mpc6xx/timer/timer.c
r35f97010 r66c373bf 20 20 #include <bsp.h> 21 21 22 rtems_unsigned64Timer_driver_Start_time;22 uint64_t Timer_driver_Start_time; 23 23 24 24 rtems_boolean Timer_driver_Find_average_overhead = 0; … … 31 31 int Timer_get_clicks_overhead() 32 32 { 33 rtems_unsigned64clicks;33 uint64_t clicks; 34 34 35 PPC_Set_timebase_register((u nsigned64) 0);35 PPC_Set_timebase_register((uint64_t ) 0); 36 36 clicks = PPC_Get_timebase_register(); 37 37 assert(clicks <= 0xffffffff); … … 51 51 52 52 if (clicks_overhead == 0) clicks_overhead = Timer_get_clicks_overhead(); 53 PPC_Set_timebase_register((u nsigned64) 0);53 PPC_Set_timebase_register((uint64_t ) 0); 54 54 } 55 55 … … 61 61 int Read_timer() 62 62 { 63 rtems_unsigned64total64;64 rtems_unsigned32total;63 uint64_t total64; 64 uint32_t total; 65 65 66 66 /* approximately CLOCK_SPEED clicks per microsecond */ … … 68 68 total64 = PPC_Get_timebase_register(); 69 69 70 assert( total64 <= 0xffffffff ); /* fits into a u nsigned32*/70 assert( total64 <= 0xffffffff ); /* fits into a uint32_t */ 71 71 72 total = ( rtems_unsigned32) total64;72 total = (uint32_t ) total64; 73 73 74 74 if ( Timer_driver_Find_average_overhead == 1 ) … … 80 80 unsigned long long Read_long_timer() 81 81 { 82 rtems_unsigned64total64;82 uint64_t total64; 83 83 84 84 total64 = PPC_Get_timebase_register(); -
c/src/lib/libcpu/powerpc/mpc8260/clock/clock.c
r35f97010 r66c373bf 44 44 #include <bsp/irq.h> 45 45 46 volatile rtems_unsigned32Clock_driver_ticks;46 volatile uint32_t Clock_driver_ticks; 47 47 extern int BSP_get_clock_irq_level(); 48 48 extern int BSP_connect_clock_handler(rtems_isr_entry); … … 51 51 void Clock_exit( void ); 52 52 53 rtems_unsigned32decrementer_value;53 uint32_t decrementer_value; 54 54 55 55 volatile int ClockInitialised = 0; … … 103 103 #if 0 104 104 unsigned desiredLevel; 105 rtems_unsigned32pit_value;105 uint32_t pit_value; 106 106 107 107 pit_value = (rtems_configuration_get_microseconds_per_tick() * -
c/src/lib/libcpu/powerpc/mpc8260/console-generic/console-generic.c
r35f97010 r66c373bf 119 119 { 120 120 int baud, brg=0, csize=0, ssize, psize; 121 rtems_unsigned16clen=0, cstopb, parenb, parodd, cread;121 uint16_t clen=0, cstopb, parenb, parodd, cread; 122 122 123 123 /* Baud rate */ … … 233 233 { 234 234 int baud, brg=0; 235 rtems_unsigned16csize=0, cstopb, parenb, parodd;235 uint16_t csize=0, cstopb, parenb, parodd; 236 236 237 237 /* Baud rate */ -
c/src/lib/libcpu/powerpc/mpc8260/cpm/cp.c
r35f97010 r66c373bf 21 21 */ 22 22 23 void m8xx_cp_execute_cmd( u nsigned32command )23 void m8xx_cp_execute_cmd( uint32_t command ) 24 24 { 25 rtems_unsigned16lvl;25 uint16_t lvl; 26 26 27 27 rtems_interrupt_disable(lvl); -
c/src/lib/libcpu/powerpc/mpc8260/cpm/dpram.c
r35f97010 r66c373bf 32 32 */ 33 33 static struct { 34 u nsigned8*base;34 uint8_t *base; 35 35 unsigned int size; 36 36 unsigned int used; -
c/src/lib/libcpu/powerpc/mpc8260/include/cpm.h
r35f97010 r66c373bf 97 97 /* Functions */ 98 98 99 void m8xx_cp_execute_cmd( u nsigned32command );99 void m8xx_cp_execute_cmd( uint32_t command ); 100 100 void *m8xx_dpram_allocate( unsigned int byte_count ); 101 101 -
c/src/lib/libcpu/powerpc/mpc8260/include/mmu.h
r35f97010 r66c373bf 24 24 */ 25 25 typedef struct { 26 u nsigned32mmu_epn; /* Effective Page Number */27 u nsigned32mmu_twc; /* Tablewalk Control Register */28 u nsigned32mmu_rpn; /* Real Page Number */26 uint32_t mmu_epn; /* Effective Page Number */ 27 uint32_t mmu_twc; /* Tablewalk Control Register */ 28 uint32_t mmu_rpn; /* Real Page Number */ 29 29 } MMU_TLB_table_t; 30 30 -
c/src/lib/libcpu/powerpc/mpc8260/include/mpc8260.h
r35f97010 r66c373bf 67 67 */ 68 68 typedef struct m8260MEMCRegisters_ { 69 rtems_unsigned32br;70 rtems_unsigned32_or; /* or is a C++ keyword :( */69 uint32_t br; 70 uint32_t _or; /* or is a C++ keyword :( */ 71 71 } m8260MEMCRegisters_t; 72 72 … … 76 76 */ 77 77 typedef struct m8260FCCRegisters_ { 78 rtems_unsigned32gfmr;79 rtems_unsigned32fpsmr;80 rtems_unsigned16ftodr;81 rtems_unsigned8fcc_pad0[2];82 rtems_unsigned16fdsr;83 rtems_unsigned8fcc_pad1[2];84 rtems_unsigned32fcce;85 rtems_unsigned32fccm;86 rtems_unsigned8fccs;87 rtems_unsigned8fcc_pad2[3];88 rtems_unsigned8ftirr_phy0; /* n/a on FCC3 */89 rtems_unsigned8ftirr_phy1; /* n/a on FCC3 */90 rtems_unsigned8ftirr_phy2; /* n/a on FCC3 */91 rtems_unsigned8ftirr_phy3; /* n/a on FCC3 */78 uint32_t gfmr; 79 uint32_t fpsmr; 80 uint16_t ftodr; 81 uint8_t fcc_pad0[2]; 82 uint16_t fdsr; 83 uint8_t fcc_pad1[2]; 84 uint32_t fcce; 85 uint32_t fccm; 86 uint8_t fccs; 87 uint8_t fcc_pad2[3]; 88 uint8_t ftirr_phy0; /* n/a on FCC3 */ 89 uint8_t ftirr_phy1; /* n/a on FCC3 */ 90 uint8_t ftirr_phy2; /* n/a on FCC3 */ 91 uint8_t ftirr_phy3; /* n/a on FCC3 */ 92 92 } m8260FCCRegisters_t; 93 93 … … 97 97 */ 98 98 typedef struct m8260SCCRegisters_ { 99 rtems_unsigned32gsmr_l;100 rtems_unsigned32gsmr_h;101 rtems_unsigned16psmr;102 rtems_unsigned8scc_pad0[2];103 rtems_unsigned16todr;104 rtems_unsigned16dsr;105 rtems_unsigned16scce;106 rtems_unsigned8scc_pad2[2];107 rtems_unsigned16sccm;108 rtems_unsigned8scc_pad3[1];109 rtems_unsigned8sccs;110 rtems_unsigned8scc_pad1[8];99 uint32_t gsmr_l; 100 uint32_t gsmr_h; 101 uint16_t psmr; 102 uint8_t scc_pad0[2]; 103 uint16_t todr; 104 uint16_t dsr; 105 uint16_t scce; 106 uint8_t scc_pad2[2]; 107 uint16_t sccm; 108 uint8_t scc_pad3[1]; 109 uint8_t sccs; 110 uint8_t scc_pad1[8]; 111 111 } m8260SCCRegisters_t; 112 112 … … 115 115 */ 116 116 typedef struct m8260SMCRegisters_ { 117 rtems_unsigned8smc_pad0[2];118 rtems_unsigned16smcmr;119 rtems_unsigned8smc_pad2[2];120 rtems_unsigned8smce;121 rtems_unsigned8smc_pad3[3];122 rtems_unsigned8smcm;123 rtems_unsigned8smc_pad1[5];117 uint8_t smc_pad0[2]; 118 uint16_t smcmr; 119 uint8_t smc_pad2[2]; 120 uint8_t smce; 121 uint8_t smc_pad3[3]; 122 uint8_t smcm; 123 uint8_t smc_pad1[5]; 124 124 } m8260SMCRegisters_t; 125 125 … … 129 129 */ 130 130 typedef struct m8260SIRegisters_ { 131 rtems_unsigned16siamr;132 rtems_unsigned16sibmr;133 rtems_unsigned16sicmr;134 rtems_unsigned16sidmr;135 rtems_unsigned8sigmr;136 rtems_unsigned8si_pad0[1];137 rtems_unsigned8sicmdr;138 rtems_unsigned8si_pad1[1];139 rtems_unsigned8sistr;140 rtems_unsigned8si_pad2[1];141 rtems_unsigned16sirsr;131 uint16_t siamr; 132 uint16_t sibmr; 133 uint16_t sicmr; 134 uint16_t sidmr; 135 uint8_t sigmr; 136 uint8_t si_pad0[1]; 137 uint8_t sicmdr; 138 uint8_t si_pad1[1]; 139 uint8_t sistr; 140 uint8_t si_pad2[1]; 141 uint16_t sirsr; 142 142 } m8260SIRegisters_t; 143 143 … … 147 147 */ 148 148 typedef struct m8260MCCRegisters_ { 149 rtems_unsigned16mcce;150 rtems_unsigned8mcc_pad2[2];151 rtems_unsigned16mccm;152 rtems_unsigned16mcc_pad0;153 rtems_unsigned8mccf;154 rtems_unsigned8mcc_pad1[7];149 uint16_t mcce; 150 uint8_t mcc_pad2[2]; 151 uint16_t mccm; 152 uint16_t mcc_pad0; 153 uint8_t mccf; 154 uint8_t mcc_pad1[7]; 155 155 } m8260MCCRegisters_t; 156 156 … … 163 163 /* 164 164 typedef struct m8260TimerParms_ { 165 rtems_unsigned16tm_base;166 rtems_unsigned16_tm_ptr;167 rtems_unsigned16_r_tmr;168 rtems_unsigned16_r_tmv;169 rtems_unsigned32tm_cmd;170 rtems_unsigned32tm_cnt;165 uint16_t tm_base; 166 uint16_t _tm_ptr; 167 uint16_t _r_tmr; 168 uint16_t _r_tmv; 169 uint32_t tm_cmd; 170 uint32_t tm_cnt; 171 171 } m8260TimerParms_t; 172 172 */ … … 216 216 */ 217 217 typedef struct m8260IDMAparms_ { 218 rtems_unsigned16ibase;219 rtems_unsigned16dcm;220 rtems_unsigned16ibdptr;221 rtems_unsigned16dpr_buf;222 rtems_unsigned16_buf_inv;223 rtems_unsigned16ssmax;224 rtems_unsigned16_dpr_in_ptr;225 rtems_unsigned16sts;226 rtems_unsigned16_dpr_out_ptr;227 rtems_unsigned16seob;228 rtems_unsigned16deob;229 rtems_unsigned16dts;230 rtems_unsigned16_ret_add;231 rtems_unsigned16reserved;232 rtems_unsigned32_bd_cnt;233 rtems_unsigned32_s_ptr;234 rtems_unsigned32_d_ptr;235 rtems_unsigned32istate;218 uint16_t ibase; 219 uint16_t dcm; 220 uint16_t ibdptr; 221 uint16_t dpr_buf; 222 uint16_t _buf_inv; 223 uint16_t ssmax; 224 uint16_t _dpr_in_ptr; 225 uint16_t sts; 226 uint16_t _dpr_out_ptr; 227 uint16_t seob; 228 uint16_t deob; 229 uint16_t dts; 230 uint16_t _ret_add; 231 uint16_t reserved; 232 uint32_t _bd_cnt; 233 uint32_t _s_ptr; 234 uint32_t _d_ptr; 235 uint32_t istate; 236 236 } m8260IDMAparms_t; 237 237 … … 245 245 246 246 typedef struct m8260SCCparms_ { 247 rtems_unsigned16rbase;248 rtems_unsigned16tbase;249 rtems_unsigned8rfcr;250 rtems_unsigned8tfcr;251 rtems_unsigned16mrblr;252 rtems_unsigned32_rstate;253 rtems_unsigned32_pad0;254 rtems_unsigned16_rbptr;255 rtems_unsigned16_pad1;256 rtems_unsigned32_pad2;257 rtems_unsigned32_tstate;258 rtems_unsigned32_pad3;259 rtems_unsigned16_tbptr;260 rtems_unsigned16_pad4;261 rtems_unsigned32_pad5;262 rtems_unsigned32_rcrc;263 rtems_unsigned32_tcrc;247 uint16_t rbase; 248 uint16_t tbase; 249 uint8_t rfcr; 250 uint8_t tfcr; 251 uint16_t mrblr; 252 uint32_t _rstate; 253 uint32_t _pad0; 254 uint16_t _rbptr; 255 uint16_t _pad1; 256 uint32_t _pad2; 257 uint32_t _tstate; 258 uint32_t _pad3; 259 uint16_t _tbptr; 260 uint16_t _pad4; 261 uint32_t _pad5; 262 uint32_t _rcrc; 263 uint32_t _tcrc; 264 264 union { 265 265 struct { 266 rtems_unsigned32_res0;267 rtems_unsigned32_res1;268 rtems_unsigned16max_idl;269 rtems_unsigned16idlc;270 rtems_unsigned16brkcr;271 rtems_unsigned16parec;272 rtems_unsigned16frmec;273 rtems_unsigned16nosec;274 rtems_unsigned16brkec;275 rtems_unsigned16brklen;276 rtems_unsigned16uaddr[2];277 rtems_unsigned16rtemp;278 rtems_unsigned16toseq;279 rtems_unsigned16character[8];280 rtems_unsigned16rccm;281 rtems_unsigned16rccr;282 rtems_unsigned16rlbc;266 uint32_t _res0; 267 uint32_t _res1; 268 uint16_t max_idl; 269 uint16_t idlc; 270 uint16_t brkcr; 271 uint16_t parec; 272 uint16_t frmec; 273 uint16_t nosec; 274 uint16_t brkec; 275 uint16_t brklen; 276 uint16_t uaddr[2]; 277 uint16_t rtemp; 278 uint16_t toseq; 279 uint16_t character[8]; 280 uint16_t rccm; 281 uint16_t rccr; 282 uint16_t rlbc; 283 283 } uart; 284 284 struct { 285 rtems_unsigned32_pad0;286 rtems_unsigned32c_mask;287 rtems_unsigned32c_pres;288 rtems_unsigned16disfc;289 rtems_unsigned16crcec;290 rtems_unsigned16abtsc;291 rtems_unsigned16nmarc;292 rtems_unsigned16retrc;293 rtems_unsigned16mflr;294 rtems_unsigned16_max_cnt;295 rtems_unsigned16rfthr;296 rtems_unsigned16_rfcnt;297 rtems_unsigned16hmask;298 rtems_unsigned16haddr1;299 rtems_unsigned16haddr2;300 rtems_unsigned16haddr3;301 rtems_unsigned16haddr4;302 rtems_unsigned16_tmp;303 rtems_unsigned16_tmp_mb;285 uint32_t _pad0; 286 uint32_t c_mask; 287 uint32_t c_pres; 288 uint16_t disfc; 289 uint16_t crcec; 290 uint16_t abtsc; 291 uint16_t nmarc; 292 uint16_t retrc; 293 uint16_t mflr; 294 uint16_t _max_cnt; 295 uint16_t rfthr; 296 uint16_t _rfcnt; 297 uint16_t hmask; 298 uint16_t haddr1; 299 uint16_t haddr2; 300 uint16_t haddr3; 301 uint16_t haddr4; 302 uint16_t _tmp; 303 uint16_t _tmp_mb; 304 304 } hdlc; 305 305 struct { 306 rtems_unsigned32_pad0;307 rtems_unsigned32crcc;308 rtems_unsigned16prcrc;309 rtems_unsigned16ptcrc;310 rtems_unsigned16parec;311 rtems_unsigned16bsync;312 rtems_unsigned16bdle;313 rtems_unsigned16character[8];314 rtems_unsigned16rccm;306 uint32_t _pad0; 307 uint32_t crcc; 308 uint16_t prcrc; 309 uint16_t ptcrc; 310 uint16_t parec; 311 uint16_t bsync; 312 uint16_t bdle; 313 uint16_t character[8]; 314 uint16_t rccm; 315 315 } bisync; 316 316 struct { 317 rtems_unsigned32_crc_p;318 rtems_unsigned32_crc_c;317 uint32_t _crc_p; 318 uint32_t _crc_c; 319 319 } transparent; 320 320 struct { 321 rtems_unsigned32c_pres;322 rtems_unsigned32c_mask;323 rtems_unsigned32crcec;324 rtems_unsigned32alec;325 rtems_unsigned32disfc;326 rtems_unsigned16pads;327 rtems_unsigned16ret_lim;328 rtems_unsigned16_ret_cnt;329 rtems_unsigned16mflr;330 rtems_unsigned16minflr;331 rtems_unsigned16maxd1;332 rtems_unsigned16maxd2;333 rtems_unsigned16_maxd;334 rtems_unsigned16_dma_cnt;335 rtems_unsigned16_max_b;336 rtems_unsigned16gaddr1;337 rtems_unsigned16gaddr2;338 rtems_unsigned16gaddr3;339 rtems_unsigned16gaddr4;340 rtems_unsigned32_tbuf0data0;341 rtems_unsigned32_tbuf0data1;342 rtems_unsigned32_tbuf0rba0;343 rtems_unsigned32_tbuf0crc;344 rtems_unsigned16_tbuf0bcnt;345 rtems_unsigned16paddr_h;346 rtems_unsigned16paddr_m;347 rtems_unsigned16paddr_l;348 rtems_unsigned16p_per;349 rtems_unsigned16_rfbd_ptr;350 rtems_unsigned16_tfbd_ptr;351 rtems_unsigned16_tlbd_ptr;352 rtems_unsigned32_tbuf1data0;353 rtems_unsigned32_tbuf1data1;354 rtems_unsigned32_tbuf1rba0;355 rtems_unsigned32_tbuf1crc;356 rtems_unsigned16_tbuf1bcnt;357 rtems_unsigned16_tx_len;358 rtems_unsigned16iaddr1;359 rtems_unsigned16iaddr2;360 rtems_unsigned16iaddr3;361 rtems_unsigned16iaddr4;362 rtems_unsigned16_boff_cnt;363 rtems_unsigned16taddr_l;364 rtems_unsigned16taddr_m;365 rtems_unsigned16taddr_h;321 uint32_t c_pres; 322 uint32_t c_mask; 323 uint32_t crcec; 324 uint32_t alec; 325 uint32_t disfc; 326 uint16_t pads; 327 uint16_t ret_lim; 328 uint16_t _ret_cnt; 329 uint16_t mflr; 330 uint16_t minflr; 331 uint16_t maxd1; 332 uint16_t maxd2; 333 uint16_t _maxd; 334 uint16_t _dma_cnt; 335 uint16_t _max_b; 336 uint16_t gaddr1; 337 uint16_t gaddr2; 338 uint16_t gaddr3; 339 uint16_t gaddr4; 340 uint32_t _tbuf0data0; 341 uint32_t _tbuf0data1; 342 uint32_t _tbuf0rba0; 343 uint32_t _tbuf0crc; 344 uint16_t _tbuf0bcnt; 345 uint16_t paddr_h; 346 uint16_t paddr_m; 347 uint16_t paddr_l; 348 uint16_t p_per; 349 uint16_t _rfbd_ptr; 350 uint16_t _tfbd_ptr; 351 uint16_t _tlbd_ptr; 352 uint32_t _tbuf1data0; 353 uint32_t _tbuf1data1; 354 uint32_t _tbuf1rba0; 355 uint32_t _tbuf1crc; 356 uint16_t _tbuf1bcnt; 357 uint16_t _tx_len; 358 uint16_t iaddr1; 359 uint16_t iaddr2; 360 uint16_t iaddr3; 361 uint16_t iaddr4; 362 uint16_t _boff_cnt; 363 uint16_t taddr_l; 364 uint16_t taddr_m; 365 uint16_t taddr_h; 366 366 } ethernet; 367 367 } un; … … 389 389 390 390 typedef struct m8260FCCparms_ { 391 rtems_unsigned16riptr;392 rtems_unsigned16tiptr;393 rtems_unsigned16_pad0;394 rtems_unsigned16mrblr;395 rtems_unsigned32rstate;396 rtems_unsigned32rbase;397 rtems_unsigned16_rbdstat;398 rtems_unsigned16_rbdlen;399 rtems_unsigned32_rdptr;400 rtems_unsigned32tstate;401 rtems_unsigned32tbase;402 rtems_unsigned16_tbdstat;403 rtems_unsigned16_tbdlen;404 rtems_unsigned32_tdptr;405 rtems_unsigned32_rbptr;406 rtems_unsigned32_tbptr;407 rtems_unsigned32_rcrc;408 rtems_unsigned32_pad1;409 rtems_unsigned32_tcrc;391 uint16_t riptr; 392 uint16_t tiptr; 393 uint16_t _pad0; 394 uint16_t mrblr; 395 uint32_t rstate; 396 uint32_t rbase; 397 uint16_t _rbdstat; 398 uint16_t _rbdlen; 399 uint32_t _rdptr; 400 uint32_t tstate; 401 uint32_t tbase; 402 uint16_t _tbdstat; 403 uint16_t _tbdlen; 404 uint32_t _tdptr; 405 uint32_t _rbptr; 406 uint32_t _tbptr; 407 uint32_t _rcrc; 408 uint32_t _pad1; 409 uint32_t _tcrc; 410 410 411 411 union { 412 412 struct { 413 rtems_unsigned32_pad0;414 rtems_unsigned32_pad1;415 rtems_unsigned32c_mask;416 rtems_unsigned32c_pres;417 rtems_unsigned16disfc;418 rtems_unsigned16crcec;419 rtems_unsigned16abtsc;420 rtems_unsigned16nmarc;421 rtems_unsigned32_max_cnt;422 rtems_unsigned16mflr;423 rtems_unsigned16rfthr;424 rtems_unsigned16rfcnt;425 rtems_unsigned16hmask;426 rtems_unsigned16haddr1;427 rtems_unsigned16haddr2;428 rtems_unsigned16haddr3;429 rtems_unsigned16haddr4;430 rtems_unsigned16_ts_tmp;431 rtems_unsigned16_tmp_mb;413 uint32_t _pad0; 414 uint32_t _pad1; 415 uint32_t c_mask; 416 uint32_t c_pres; 417 uint16_t disfc; 418 uint16_t crcec; 419 uint16_t abtsc; 420 uint16_t nmarc; 421 uint32_t _max_cnt; 422 uint16_t mflr; 423 uint16_t rfthr; 424 uint16_t rfcnt; 425 uint16_t hmask; 426 uint16_t haddr1; 427 uint16_t haddr2; 428 uint16_t haddr3; 429 uint16_t haddr4; 430 uint16_t _ts_tmp; 431 uint16_t _tmp_mb; 432 432 } hdlc; 433 433 struct { 434 rtems_unsigned32_pad0;435 rtems_unsigned32_pad1;436 rtems_unsigned32c_mask;437 rtems_unsigned32c_pres;438 rtems_unsigned16disfc;439 rtems_unsigned16crcec;440 rtems_unsigned16abtsc;441 rtems_unsigned16nmarc;442 rtems_unsigned32_max_cnt;443 rtems_unsigned16mflr;444 rtems_unsigned16rfthr;445 rtems_unsigned16rfcnt;446 rtems_unsigned16hmask;447 rtems_unsigned16haddr1;448 rtems_unsigned16haddr2;449 rtems_unsigned16haddr3;450 rtems_unsigned16haddr4;451 rtems_unsigned16_ts_tmp;452 rtems_unsigned16_tmp_mb;434 uint32_t _pad0; 435 uint32_t _pad1; 436 uint32_t c_mask; 437 uint32_t c_pres; 438 uint16_t disfc; 439 uint16_t crcec; 440 uint16_t abtsc; 441 uint16_t nmarc; 442 uint32_t _max_cnt; 443 uint16_t mflr; 444 uint16_t rfthr; 445 uint16_t rfcnt; 446 uint16_t hmask; 447 uint16_t haddr1; 448 uint16_t haddr2; 449 uint16_t haddr3; 450 uint16_t haddr4; 451 uint16_t _ts_tmp; 452 uint16_t _tmp_mb; 453 453 } transparent; 454 454 struct { 455 rtems_unsigned32_stat_buf;456 rtems_unsigned32cam_ptr;457 rtems_unsigned32c_mask;458 rtems_unsigned32c_pres;459 rtems_unsigned32crcec;460 rtems_unsigned32alec;461 rtems_unsigned32disfc;462 rtems_unsigned16ret_lim;463 rtems_unsigned16_ret_cnt;464 rtems_unsigned16p_per;465 rtems_unsigned16_boff_cnt;466 rtems_unsigned32gaddr_h;467 rtems_unsigned32gaddr_l;468 rtems_unsigned16tfcstat;469 rtems_unsigned16tfclen;470 rtems_unsigned32tfcptr;471 rtems_unsigned16mflr;472 rtems_unsigned16paddr1_h;473 rtems_unsigned16paddr1_m;474 rtems_unsigned16paddr1_l;475 rtems_unsigned16_ibd_cnt;476 rtems_unsigned16_ibd_start;477 rtems_unsigned16_ibd_end;478 rtems_unsigned16_tx_len;479 rtems_unsigned16_ibd_base;480 rtems_unsigned32iaddr_h;481 rtems_unsigned32iaddr_l;482 rtems_unsigned16minflr;483 rtems_unsigned16taddr_h;484 rtems_unsigned16taddr_m;485 rtems_unsigned16taddr_l;486 rtems_unsigned16pad_ptr;487 rtems_unsigned16_pad0;488 rtems_unsigned16_cf_range;489 rtems_unsigned16_max_b;490 rtems_unsigned16maxd1;491 rtems_unsigned16maxd2;492 rtems_unsigned16_maxd;493 rtems_unsigned16_dma_cnt;494 rtems_unsigned32octc;495 rtems_unsigned32colc;496 rtems_unsigned32broc;497 rtems_unsigned32mulc;498 rtems_unsigned32uspc;499 rtems_unsigned32frgc;500 rtems_unsigned32ospc;501 rtems_unsigned32jbrc;502 rtems_unsigned32p64c;503 rtems_unsigned32p65c;504 rtems_unsigned32p128c;505 rtems_unsigned32p256c;506 rtems_unsigned32p512c;507 rtems_unsigned32p1024c;508 rtems_unsigned32_cam_buf;509 rtems_unsigned32_pad1;455 uint32_t _stat_buf; 456 uint32_t cam_ptr; 457 uint32_t c_mask; 458 uint32_t c_pres; 459 uint32_t crcec; 460 uint32_t alec; 461 uint32_t disfc; 462 uint16_t ret_lim; 463 uint16_t _ret_cnt; 464 uint16_t p_per; 465 uint16_t _boff_cnt; 466 uint32_t gaddr_h; 467 uint32_t gaddr_l; 468 uint16_t tfcstat; 469 uint16_t tfclen; 470 uint32_t tfcptr; 471 uint16_t mflr; 472 uint16_t paddr1_h; 473 uint16_t paddr1_m; 474 uint16_t paddr1_l; 475 uint16_t _ibd_cnt; 476 uint16_t _ibd_start; 477 uint16_t _ibd_end; 478 uint16_t _tx_len; 479 uint16_t _ibd_base; 480 uint32_t iaddr_h; 481 uint32_t iaddr_l; 482 uint16_t minflr; 483 uint16_t taddr_h; 484 uint16_t taddr_m; 485 uint16_t taddr_l; 486 uint16_t pad_ptr; 487 uint16_t _pad0; 488 uint16_t _cf_range; 489 uint16_t _max_b; 490 uint16_t maxd1; 491 uint16_t maxd2; 492 uint16_t _maxd; 493 uint16_t _dma_cnt; 494 uint32_t octc; 495 uint32_t colc; 496 uint32_t broc; 497 uint32_t mulc; 498 uint32_t uspc; 499 uint32_t frgc; 500 uint32_t ospc; 501 uint32_t jbrc; 502 uint32_t p64c; 503 uint32_t p65c; 504 uint32_t p128c; 505 uint32_t p256c; 506 uint32_t p512c; 507 uint32_t p1024c; 508 uint32_t _cam_buf; 509 uint32_t _pad1; 510 510 } ethernet; 511 511 } un; … … 532 532 */ 533 533 typedef struct m8260SMCparms_ { 534 rtems_unsigned16rbase;535 rtems_unsigned16tbase;536 rtems_unsigned8rfcr;537 rtems_unsigned8tfcr;538 rtems_unsigned16mrblr;539 rtems_unsigned32_rstate;540 rtems_unsigned32_pad0;541 rtems_unsigned16_rbptr;542 rtems_unsigned16_pad1;543 rtems_unsigned32_pad2;544 rtems_unsigned32_tstate;545 rtems_unsigned32_pad3;546 rtems_unsigned16_tbptr;547 rtems_unsigned16_pad4;548 rtems_unsigned32_pad5;534 uint16_t rbase; 535 uint16_t tbase; 536 uint8_t rfcr; 537 uint8_t tfcr; 538 uint16_t mrblr; 539 uint32_t _rstate; 540 uint32_t _pad0; 541 uint16_t _rbptr; 542 uint16_t _pad1; 543 uint32_t _pad2; 544 uint32_t _tstate; 545 uint32_t _pad3; 546 uint16_t _tbptr; 547 uint16_t _pad4; 548 uint32_t _pad5; 549 549 union { 550 550 struct { 551 rtems_unsigned16max_idl;552 rtems_unsigned16_idlc;553 rtems_unsigned16_brkln;554 rtems_unsigned16brkec;555 rtems_unsigned16brkcr;556 rtems_unsigned16_r_mask;551 uint16_t max_idl; 552 uint16_t _idlc; 553 uint16_t _brkln; 554 uint16_t brkec; 555 uint16_t brkcr; 556 uint16_t _r_mask; 557 557 } uart; 558 558 struct { 559 rtems_unsigned16_pad0[6];559 uint16_t _pad0[6]; 560 560 } transparent; 561 561 } un; 562 rtems_unsigned32_pad6;562 uint32_t _pad6; 563 563 } m8260SMCparms_t; 564 564 … … 592 592 */ 593 593 typedef struct m8260SPIparms_ { 594 rtems_unsigned16rbase;595 rtems_unsigned16tbase;596 rtems_unsigned8rfcr;597 rtems_unsigned8tfcr;598 rtems_unsigned16mrblr;599 rtems_unsigned32_rstate;600 rtems_unsigned32_pad0;601 rtems_unsigned16_rbptr;602 rtems_unsigned16_pad1;603 rtems_unsigned32_pad2;604 rtems_unsigned32_tstate;605 rtems_unsigned32_pad3;606 rtems_unsigned16_tbptr;607 rtems_unsigned16_pad4;608 rtems_unsigned32_pad5;594 uint16_t rbase; 595 uint16_t tbase; 596 uint8_t rfcr; 597 uint8_t tfcr; 598 uint16_t mrblr; 599 uint32_t _rstate; 600 uint32_t _pad0; 601 uint16_t _rbptr; 602 uint16_t _pad1; 603 uint32_t _pad2; 604 uint32_t _tstate; 605 uint32_t _pad3; 606 uint16_t _tbptr; 607 uint16_t _pad4; 608 uint32_t _pad5; 609 609 } m8260SPIparms_t; 610 610 … … 642 642 */ 643 643 typedef struct m8260BufferDescriptor_ { 644 rtems_unsigned16status;645 rtems_unsigned16length;644 uint16_t status; 645 uint16_t length; 646 646 volatile void *buffer; 647 647 } m8260BufferDescriptor_t; … … 738 738 */ 739 739 typedef struct m8260IDMABufferDescriptor_ { 740 rtems_unsigned16status;741 rtems_unsigned8dfcr;742 rtems_unsigned8sfcr;743 rtems_unsigned32length;740 uint16_t status; 741 uint8_t dfcr; 742 uint8_t sfcr; 743 uint32_t length; 744 744 void *source; 745 745 void *destination; … … 1131 1131 * CPM Dual-Port RAM 1132 1132 */ 1133 rtems_unsigned8dpram1[16384]; /* 0x0000 - 0x3FFF BD/data/ucode */1134 rtems_unsigned8cpm_pad0[16384]; /* 0x4000 - 0x7FFF Reserved */1133 uint8_t dpram1[16384]; /* 0x0000 - 0x3FFF BD/data/ucode */ 1134 uint8_t cpm_pad0[16384]; /* 0x4000 - 0x7FFF Reserved */ 1135 1135 1136 1136 m8260SCCparms_t scc1p; 1137 rtems_unsigned8pad_scc1[256-sizeof(m8260SCCparms_t)];1137 uint8_t pad_scc1[256-sizeof(m8260SCCparms_t)]; 1138 1138 m8260SCCparms_t scc2p; 1139 rtems_unsigned8pad_scc2[256-sizeof(m8260SCCparms_t)];1139 uint8_t pad_scc2[256-sizeof(m8260SCCparms_t)]; 1140 1140 m8260SCCparms_t scc3p; 1141 rtems_unsigned8pad_scc3[256-sizeof(m8260SCCparms_t)];1141 uint8_t pad_scc3[256-sizeof(m8260SCCparms_t)]; 1142 1142 m8260SCCparms_t scc4p; 1143 rtems_unsigned8pad_scc4[256-sizeof(m8260SCCparms_t)];1143 uint8_t pad_scc4[256-sizeof(m8260SCCparms_t)]; 1144 1144 1145 1145 m8260FCCparms_t fcc1p; 1146 rtems_unsigned8pad_fcc1[256-sizeof(m8260FCCparms_t)];1146 uint8_t pad_fcc1[256-sizeof(m8260FCCparms_t)]; 1147 1147 m8260FCCparms_t fcc2p; 1148 rtems_unsigned8pad_fcc2[256-sizeof(m8260FCCparms_t)];1148 uint8_t pad_fcc2[256-sizeof(m8260FCCparms_t)]; 1149 1149 m8260FCCparms_t fcc3p; 1150 rtems_unsigned8pad_fcc3[256-sizeof(m8260FCCparms_t)];1151 1152 rtems_unsigned8mcc1p[128];1153 rtems_unsigned8pad_mcc1[124];1154 rtems_unsigned16smc1_base;1155 rtems_unsigned16idma1_base;1156 rtems_unsigned8mcc2p[128];1157 rtems_unsigned8pad_mcc2[124];1158 rtems_unsigned16smc2_base;1159 rtems_unsigned16idma2_base;1160 rtems_unsigned8pad_spi[252];1161 rtems_unsigned16spi_base;1162 rtems_unsigned16idma3_base;1163 rtems_unsigned8pad_risc[224];1164 rtems_unsigned8risc_timers[16];1165 rtems_unsigned16rev_num;1166 rtems_unsigned16cpm_pad7;1167 rtems_unsigned32cpm_pad8;1168 rtems_unsigned16rand;1169 rtems_unsigned16i2c_base;1170 rtems_unsigned16idma4_base;1171 rtems_unsigned8cpm_pad9[1282];1172 1173 rtems_unsigned8cpm_pad1[8192]; /* 0x9000 - 0xAFFF Reserved */1150 uint8_t pad_fcc3[256-sizeof(m8260FCCparms_t)]; 1151 1152 uint8_t mcc1p[128]; 1153 uint8_t pad_mcc1[124]; 1154 uint16_t smc1_base; 1155 uint16_t idma1_base; 1156 uint8_t mcc2p[128]; 1157 uint8_t pad_mcc2[124]; 1158 uint16_t smc2_base; 1159 uint16_t idma2_base; 1160 uint8_t pad_spi[252]; 1161 uint16_t spi_base; 1162 uint16_t idma3_base; 1163 uint8_t pad_risc[224]; 1164 uint8_t risc_timers[16]; 1165 uint16_t rev_num; 1166 uint16_t cpm_pad7; 1167 uint32_t cpm_pad8; 1168 uint16_t rand; 1169 uint16_t i2c_base; 1170 uint16_t idma4_base; 1171 uint8_t cpm_pad9[1282]; 1172 1173 uint8_t cpm_pad1[8192]; /* 0x9000 - 0xAFFF Reserved */ 1174 1174 1175 1175 m8260SMCparms_t smc1p; 1176 1176 m8260SMCparms_t smc2p; 1177 rtems_unsigned8dpram3[4096-2*sizeof(m8260SMCparms_t)];1178 1179 rtems_unsigned8cpm_pad2[16384]; /* 0xC000 - 0xFFFF Reserved */1177 uint8_t dpram3[4096-2*sizeof(m8260SMCparms_t)]; 1178 1179 uint8_t cpm_pad2[16384]; /* 0xC000 - 0xFFFF Reserved */ 1180 1180 1181 1181 … … 1183 1183 * General SIU Block 1184 1184 */ 1185 rtems_unsigned32siumcr;1186 rtems_unsigned32sypcr;1187 rtems_unsigned8siu_pad0[6];1188 rtems_unsigned16swsr;1189 rtems_unsigned8siu_pad1[20];1190 rtems_unsigned32bcr;1191 rtems_unsigned8ppc_acr;1192 rtems_unsigned8siu_pad4[3];1193 rtems_unsigned32ppc_alrh;1194 rtems_unsigned32ppc_alr1;1195 rtems_unsigned8lcl_acr;1196 rtems_unsigned8siu_pad5[3];1197 rtems_unsigned32lcl_alrh;1198 rtems_unsigned32lcl_alr1;1199 rtems_unsigned32tescr1;1200 rtems_unsigned32tescr2;1201 rtems_unsigned32l_tescr1;1202 rtems_unsigned32l_tescr2;1203 rtems_unsigned32pdtea;1204 rtems_unsigned8pdtem;1205 rtems_unsigned8siu_pad2[3];1206 rtems_unsigned32ldtea;1207 rtems_unsigned8ldtem;1208 rtems_unsigned8siu_pad3[163];1185 uint32_t siumcr; 1186 uint32_t sypcr; 1187 uint8_t siu_pad0[6]; 1188 uint16_t swsr; 1189 uint8_t siu_pad1[20]; 1190 uint32_t bcr; 1191 uint8_t ppc_acr; 1192 uint8_t siu_pad4[3]; 1193 uint32_t ppc_alrh; 1194 uint32_t ppc_alr1; 1195 uint8_t lcl_acr; 1196 uint8_t siu_pad5[3]; 1197 uint32_t lcl_alrh; 1198 uint32_t lcl_alr1; 1199 uint32_t tescr1; 1200 uint32_t tescr2; 1201 uint32_t l_tescr1; 1202 uint32_t l_tescr2; 1203 uint32_t pdtea; 1204 uint8_t pdtem; 1205 uint8_t siu_pad2[3]; 1206 uint32_t ldtea; 1207 uint8_t ldtem; 1208 uint8_t siu_pad3[163]; 1209 1209 1210 1210 … … 1213 1213 */ 1214 1214 m8260MEMCRegisters_t memc[12]; 1215 rtems_unsigned8mem_pad0[8];1216 rtems_unsigned32mar;1217 rtems_unsigned8mem_pad1[4];1218 rtems_unsigned32mamr;1219 rtems_unsigned32mbmr;1220 rtems_unsigned32mcmr;1221 rtems_unsigned32mdmr;1222 rtems_unsigned8mem_pad2[4];1223 rtems_unsigned16mptpr;1224 rtems_unsigned8mem_pad5[2];1225 rtems_unsigned32mdr;1226 rtems_unsigned8mem_pad3[4];1227 rtems_unsigned32psdmr;1228 rtems_unsigned32lsdmr;1229 rtems_unsigned8purt;1230 rtems_unsigned8mem_pad6[3];1231 rtems_unsigned8psrt;1232 rtems_unsigned8mem_pad7[3];1233 rtems_unsigned8lurt;1234 rtems_unsigned8mem_pad8[3];1235 rtems_unsigned8lsrt;1236 rtems_unsigned8mem_pad9[3];1237 rtems_unsigned32immr;1238 rtems_unsigned8mem_pad4[84];1215 uint8_t mem_pad0[8]; 1216 uint32_t mar; 1217 uint8_t mem_pad1[4]; 1218 uint32_t mamr; 1219 uint32_t mbmr; 1220 uint32_t mcmr; 1221 uint32_t mdmr; 1222 uint8_t mem_pad2[4]; 1223 uint16_t mptpr; 1224 uint8_t mem_pad5[2]; 1225 uint32_t mdr; 1226 uint8_t mem_pad3[4]; 1227 uint32_t psdmr; 1228 uint32_t lsdmr; 1229 uint8_t purt; 1230 uint8_t mem_pad6[3]; 1231 uint8_t psrt; 1232 uint8_t mem_pad7[3]; 1233 uint8_t lurt; 1234 uint8_t mem_pad8[3]; 1235 uint8_t lsrt; 1236 uint8_t mem_pad9[3]; 1237 uint32_t immr; 1238 uint8_t mem_pad4[84]; 1239 1239 1240 1240 … … 1242 1242 * System integration timers 1243 1243 */ 1244 rtems_unsigned8sit_pad0[32];1245 rtems_unsigned16tmcntsc;1246 rtems_unsigned8sit_pad6[2];1247 rtems_unsigned32tmcnt;1248 rtems_unsigned32tmcntsec;1249 rtems_unsigned32tmcntal;1250 rtems_unsigned8sit_pad2[16];1251 rtems_unsigned16piscr;1252 rtems_unsigned8sit_pad5[2];1253 rtems_unsigned32pitc;1254 rtems_unsigned32pitr;1255 rtems_unsigned8sit_pad3[94];1256 rtems_unsigned8sit_pad4[2390];1244 uint8_t sit_pad0[32]; 1245 uint16_t tmcntsc; 1246 uint8_t sit_pad6[2]; 1247 uint32_t tmcnt; 1248 uint32_t tmcntsec; 1249 uint32_t tmcntal; 1250 uint8_t sit_pad2[16]; 1251 uint16_t piscr; 1252 uint8_t sit_pad5[2]; 1253 uint32_t pitc; 1254 uint32_t pitr; 1255 uint8_t sit_pad3[94]; 1256 uint8_t sit_pad4[2390]; 1257 1257 1258 1258 … … 1260 1260 * Interrupt Controller 1261 1261 */ 1262 rtems_unsigned16sicr;1263 rtems_unsigned8ict_pad1[2];1264 rtems_unsigned32sivec;1265 rtems_unsigned32sipnr_h;1266 rtems_unsigned32sipnr_l;1267 rtems_unsigned32siprr;1268 rtems_unsigned32scprr_h;1269 rtems_unsigned32scprr_l;1270 rtems_unsigned32simr_h;1271 rtems_unsigned32simr_l;1272 rtems_unsigned32siexr;1273 rtems_unsigned8ict_pad0[88];1262 uint16_t sicr; 1263 uint8_t ict_pad1[2]; 1264 uint32_t sivec; 1265 uint32_t sipnr_h; 1266 uint32_t sipnr_l; 1267 uint32_t siprr; 1268 uint32_t scprr_h; 1269 uint32_t scprr_l; 1270 uint32_t simr_h; 1271 uint32_t simr_l; 1272 uint32_t siexr; 1273 uint8_t ict_pad0[88]; 1274 1274 1275 1275 … … 1277 1277 * Clocks and Reset 1278 1278 */ 1279 rtems_unsigned32sccr;1280 rtems_unsigned8clr_pad1[4];1281 rtems_unsigned32scmr;1282 rtems_unsigned8clr_pad2[4];1283 rtems_unsigned32rsr;1284 rtems_unsigned32rmr;1285 rtems_unsigned8clr_pad0[104];1279 uint32_t sccr; 1280 uint8_t clr_pad1[4]; 1281 uint32_t scmr; 1282 uint8_t clr_pad2[4]; 1283 uint32_t rsr; 1284 uint32_t rmr; 1285 uint8_t clr_pad0[104]; 1286 1286 1287 1287 … … 1289 1289 * Input/ Output Port 1290 1290 */ 1291 rtems_unsigned32pdira;1292 rtems_unsigned32ppara;1293 rtems_unsigned32psora;1294 rtems_unsigned32podra;1295 rtems_unsigned32pdata;1296 rtems_unsigned8iop_pad0[12];1297 rtems_unsigned32pdirb;1298 rtems_unsigned32pparb;1299 rtems_unsigned32psorb;1300 rtems_unsigned32podrb;1301 rtems_unsigned32pdatb;1302 rtems_unsigned8iop_pad1[12];1303 rtems_unsigned32pdirc;1304 rtems_unsigned32pparc;1305 rtems_unsigned32psorc;1306 rtems_unsigned32podrc;1307 rtems_unsigned32pdatc;1308 rtems_unsigned8iop_pad2[12];1309 rtems_unsigned32pdird;1310 rtems_unsigned32ppard;1311 rtems_unsigned32psord;1312 rtems_unsigned32podrd;1313 rtems_unsigned32pdatd;1314 rtems_unsigned8iop_pad3[12];1291 uint32_t pdira; 1292 uint32_t ppara; 1293 uint32_t psora; 1294 uint32_t podra; 1295 uint32_t pdata; 1296 uint8_t iop_pad0[12]; 1297 uint32_t pdirb; 1298 uint32_t pparb; 1299 uint32_t psorb; 1300 uint32_t podrb; 1301 uint32_t pdatb; 1302 uint8_t iop_pad1[12]; 1303 uint32_t pdirc; 1304 uint32_t pparc; 1305 uint32_t psorc; 1306 uint32_t podrc; 1307 uint32_t pdatc; 1308 uint8_t iop_pad2[12]; 1309 uint32_t pdird; 1310 uint32_t ppard; 1311 uint32_t psord; 1312 uint32_t podrd; 1313 uint32_t pdatd; 1314 uint8_t iop_pad3[12]; 1315 1315 1316 1316 … … 1318 1318 * CPM Timers 1319 1319 */ 1320 rtems_unsigned8tgcr1;1321 rtems_unsigned8cpt_pad0[3];1322 rtems_unsigned8tgcr2;1323 rtems_unsigned8cpt_pad1[11];1324 rtems_unsigned16tmr1;1325 rtems_unsigned16tmr2;1326 rtems_unsigned16trr1;1327 rtems_unsigned16trr2;1328 rtems_unsigned16tcr1;1329 rtems_unsigned16tcr2;1330 rtems_unsigned16tcn1;1331 rtems_unsigned16tcn2;1332 rtems_unsigned16tmr3;1333 rtems_unsigned16tmr4;1334 rtems_unsigned16trr3;1335 rtems_unsigned16trr4;1336 rtems_unsigned16tcr3;1337 rtems_unsigned16tcr4;1338 rtems_unsigned16tcn3;1339 rtems_unsigned16tcn4;1340 rtems_unsigned16ter1;1341 rtems_unsigned16ter2;1342 rtems_unsigned16ter3;1343 rtems_unsigned16ter4;1344 rtems_unsigned8cpt_pad2[608];1320 uint8_t tgcr1; 1321 uint8_t cpt_pad0[3]; 1322 uint8_t tgcr2; 1323 uint8_t cpt_pad1[11]; 1324 uint16_t tmr1; 1325 uint16_t tmr2; 1326 uint16_t trr1; 1327 uint16_t trr2; 1328 uint16_t tcr1; 1329 uint16_t tcr2; 1330 uint16_t tcn1; 1331 uint16_t tcn2; 1332 uint16_t tmr3; 1333 uint16_t tmr4; 1334 uint16_t trr3; 1335 uint16_t trr4; 1336 uint16_t tcr3; 1337 uint16_t tcr4; 1338 uint16_t tcn3; 1339 uint16_t tcn4; 1340 uint16_t ter1; 1341 uint16_t ter2; 1342 uint16_t ter3; 1343 uint16_t ter4; 1344 uint8_t cpt_pad2[608]; 1345 1345 1346 1346 … … 1348 1348 * DMA Block 1349 1349 */ 1350 rtems_unsigned8sdsr;1351 rtems_unsigned8dma_pad0[3];1352 rtems_unsigned8sdmr;1353 rtems_unsigned8dma_pad1[3];1354 1355 rtems_unsigned8idsr1;1356 rtems_unsigned8dma_pad2[3];1357 rtems_unsigned8idmr1;1358 rtems_unsigned8dma_pad3[3];1359 rtems_unsigned8idsr2;1360 rtems_unsigned8dma_pad4[3];1361 rtems_unsigned8idmr2;1362 rtems_unsigned8dma_pad5[3];1363 rtems_unsigned8idsr3;1364 rtems_unsigned8dma_pad6[3];1365 rtems_unsigned8idmr3;1366 rtems_unsigned8dma_pad7[3];1367 rtems_unsigned8idsr4;1368 rtems_unsigned8dma_pad8[3];1369 rtems_unsigned8idmr4;1370 rtems_unsigned8dma_pad9[707];1350 uint8_t sdsr; 1351 uint8_t dma_pad0[3]; 1352 uint8_t sdmr; 1353 uint8_t dma_pad1[3]; 1354 1355 uint8_t idsr1; 1356 uint8_t dma_pad2[3]; 1357 uint8_t idmr1; 1358 uint8_t dma_pad3[3]; 1359 uint8_t idsr2; 1360 uint8_t dma_pad4[3]; 1361 uint8_t idmr2; 1362 uint8_t dma_pad5[3]; 1363 uint8_t idsr3; 1364 uint8_t dma_pad6[3]; 1365 uint8_t idmr3; 1366 uint8_t dma_pad7[3]; 1367 uint8_t idsr4; 1368 uint8_t dma_pad8[3]; 1369 uint8_t idmr4; 1370 uint8_t dma_pad9[707]; 1371 1371 1372 1372 … … 1378 1378 m8260FCCRegisters_t fcc3; 1379 1379 1380 rtems_unsigned8fcc_pad0[656];1380 uint8_t fcc_pad0[656]; 1381 1381 1382 1382 /* 1383 1383 * BRG 5-8 Block 1384 1384 */ 1385 rtems_unsigned32brgc5;1386 rtems_unsigned32brgc6;1387 rtems_unsigned32brgc7;1388 rtems_unsigned32brgc8;1389 rtems_unsigned8brg_pad0[608];1385 uint32_t brgc5; 1386 uint32_t brgc6; 1387 uint32_t brgc7; 1388 uint32_t brgc8; 1389 uint8_t brg_pad0[608]; 1390 1390 1391 1391 … … 1393 1393 * I2C 1394 1394 */ 1395 rtems_unsigned8i2mod;1396 rtems_unsigned8i2m_pad0[3];1397 rtems_unsigned8i2add;1398 rtems_unsigned8i2m_pad1[3];1399 rtems_unsigned8i2brg;1400 rtems_unsigned8i2m_pad2[3];1401 rtems_unsigned8i2com;1402 rtems_unsigned8i2m_pad3[3];1403 rtems_unsigned8i2cer;1404 rtems_unsigned8i2m_pad4[3];1405 rtems_unsigned8i2cmr;1406 rtems_unsigned8i2m_pad5[331];1395 uint8_t i2mod; 1396 uint8_t i2m_pad0[3]; 1397 uint8_t i2add; 1398 uint8_t i2m_pad1[3]; 1399 uint8_t i2brg; 1400 uint8_t i2m_pad2[3]; 1401 uint8_t i2com; 1402 uint8_t i2m_pad3[3]; 1403 uint8_t i2cer; 1404 uint8_t i2m_pad4[3]; 1405 uint8_t i2cmr; 1406 uint8_t i2m_pad5[331]; 1407 1407 1408 1408 … … 1410 1410 * CPM Block 1411 1411 */ 1412 rtems_unsigned32cpcr;1413 rtems_unsigned32rccr;1414 rtems_unsigned8cpm_pad3[14];1415 rtems_unsigned16rter;1416 rtems_unsigned8cpm_pad[2];1417 rtems_unsigned16rtmr;1418 rtems_unsigned16rtscr;1419 rtems_unsigned8cpm_pad4[2];1420 rtems_unsigned32rtsr;1421 rtems_unsigned8cpm_pad5[12];1412 uint32_t cpcr; 1413 uint32_t rccr; 1414 uint8_t cpm_pad3[14]; 1415 uint16_t rter; 1416 uint8_t cpm_pad[2]; 1417 uint16_t rtmr; 1418 uint16_t rtscr; 1419 uint8_t cpm_pad4[2]; 1420 uint32_t rtsr; 1421 uint8_t cpm_pad5[12]; 1422 1422 1423 1423 … … 1425 1425 * BRG 1-4 Block 1426 1426 */ 1427 rtems_unsigned32brgc1;1428 rtems_unsigned32brgc2;1429 rtems_unsigned32brgc3;1430 rtems_unsigned32brgc4;1427 uint32_t brgc1; 1428 uint32_t brgc2; 1429 uint32_t brgc3; 1430 uint32_t brgc4; 1431 1431 1432 1432 … … 1450 1450 * SPI Block 1451 1451 */ 1452 rtems_unsigned16spmode;1453 rtems_unsigned8spi_pad0[4];1454 rtems_unsigned8spie;1455 rtems_unsigned8spi_pad1[3];1456 rtems_unsigned8spim;1457 rtems_unsigned8spi_pad2[2];1458 rtems_unsigned8spcom;1459 rtems_unsigned8spi_pad3[82];1452 uint16_t spmode; 1453 uint8_t spi_pad0[4]; 1454 uint8_t spie; 1455 uint8_t spi_pad1[3]; 1456 uint8_t spim; 1457 uint8_t spi_pad2[2]; 1458 uint8_t spcom; 1459 uint8_t spi_pad3[82]; 1460 1460 1461 1461 … … 1463 1463 * CPM Mux Block 1464 1464 */ 1465 rtems_unsigned8cmxsi1cr;1466 rtems_unsigned8cmx_pad0[1];1467 rtems_unsigned8cmxsi2cr;1468 rtems_unsigned8cmx_pad1[1];1469 rtems_unsigned32cmxfcr;1470 rtems_unsigned32cmxscr;1471 rtems_unsigned8cmxsmr;1472 rtems_unsigned8cmx_pad2[1];1473 rtems_unsigned16cmxuar;1474 rtems_unsigned8cmx_pad3[16];1465 uint8_t cmxsi1cr; 1466 uint8_t cmx_pad0[1]; 1467 uint8_t cmxsi2cr; 1468 uint8_t cmx_pad1[1]; 1469 uint32_t cmxfcr; 1470 uint32_t cmxscr; 1471 uint8_t cmxsmr; 1472 uint8_t cmx_pad2[1]; 1473 uint16_t cmxuar; 1474 uint8_t cmx_pad3[16]; 1475 1475 1476 1476 … … 1483 1483 m8260MCCRegisters_t mcc2; 1484 1484 1485 rtems_unsigned8mcc_pad0[1152];1485 uint8_t mcc_pad0[1152]; 1486 1486 1487 1487 /* 1488 1488 * SI1 RAM 1489 1489 */ 1490 rtems_unsigned8si1txram[512];1491 rtems_unsigned8ram_pad0[512];1492 rtems_unsigned8si1rxram[512];1493 rtems_unsigned8ram_pad1[512];1490 uint8_t si1txram[512]; 1491 uint8_t ram_pad0[512]; 1492 uint8_t si1rxram[512]; 1493 uint8_t ram_pad1[512]; 1494 1494 1495 1495 … … 1497 1497 * SI2 RAM 1498 1498 */ 1499 rtems_unsigned8si2txram[512];1500 rtems_unsigned8ram_pad2[512];1501 rtems_unsigned8si2rxram[512];1502 rtems_unsigned8ram_pad3[512];1499 uint8_t si2txram[512]; 1500 uint8_t ram_pad2[512]; 1501 uint8_t si2rxram[512]; 1502 uint8_t ram_pad3[512]; 1503 1503 1504 1504 -
c/src/lib/libcpu/powerpc/mpc8260/mmu/mmu.c
r35f97010 r66c373bf 41 41 /* so far we leave mmu uninitialised */ 42 42 43 register u nsigned32reg1, i;43 register uint32_t reg1, i; 44 44 45 45 /* -
c/src/lib/libcpu/powerpc/mpc8260/timer/timer.c
r35f97010 r66c373bf 51 51 #include <mpc8260.h> 52 52 53 static volatile rtems_unsigned32Timer_starting;53 static volatile uint32_t Timer_starting; 54 54 static rtems_boolean Timer_driver_Find_average_overhead; 55 55 … … 64 64 * This is so small that this code will be reproduced where needed. 65 65 */ 66 static inline rtems_unsigned32get_itimer(void)66 static inline uint32_t get_itimer(void) 67 67 { 68 rtems_unsigned32ret;68 uint32_t ret; 69 69 70 70 asm volatile ("mftb %0" : "=r" ((ret))); /* TBLO */ … … 88 88 int Read_timer(void) 89 89 { 90 rtems_unsigned32clicks;91 rtems_unsigned32total;90 uint32_t clicks; 91 uint32_t total; 92 92 93 93 clicks = get_itimer(); -
c/src/lib/libcpu/powerpc/mpc8xx/clock/clock.c
r35f97010 r66c373bf 43 43 #include <mpc8xx.h> 44 44 45 volatile rtems_unsigned32Clock_driver_ticks;45 volatile uint32_t Clock_driver_ticks; 46 46 extern volatile m8xx_t m8xx; 47 47 extern int BSP_get_clock_irq_level(); … … 71 71 { 72 72 unsigned desiredLevel; 73 rtems_unsigned32pit_value;73 uint32_t pit_value; 74 74 75 75 pit_value = (rtems_configuration_get_microseconds_per_tick() * -
c/src/lib/libcpu/powerpc/mpc8xx/console-generic/console-generic.c
r35f97010 r66c373bf 182 182 { 183 183 int baud, brg=0, csize=0, ssize, psize; 184 rtems_unsigned16clen=0, cstopb, parenb, parodd, cread;184 uint16_t clen=0, cstopb, parenb, parodd, cread; 185 185 186 186 /* Baud rate */ … … 278 278 { 279 279 int baud, brg=0; 280 rtems_unsigned16csize=0, cstopb, parenb, parodd;280 uint16_t csize=0, cstopb, parenb, parodd; 281 281 282 282 /* Baud rate */ -
c/src/lib/libcpu/powerpc/mpc8xx/cpm/cp.c
r35f97010 r66c373bf 21 21 */ 22 22 23 void m8xx_cp_execute_cmd( u nsigned16command )23 void m8xx_cp_execute_cmd( uint16_t command ) 24 24 { 25 rtems_unsigned16lvl;25 uint16_t lvl; 26 26 27 27 rtems_interrupt_disable(lvl); -
c/src/lib/libcpu/powerpc/mpc8xx/cpm/dpram.c
r35f97010 r66c373bf 29 29 */ 30 30 static struct { 31 u nsigned8*base;31 uint8_t *base; 32 32 unsigned int size; 33 33 unsigned int used; -
c/src/lib/libcpu/powerpc/mpc8xx/include/cpm.h
r35f97010 r66c373bf 21 21 /* Functions */ 22 22 23 void m8xx_cp_execute_cmd( u nsigned16command );23 void m8xx_cp_execute_cmd( uint16_t command ); 24 24 void *m8xx_dpram_allocate( unsigned int byte_count ); 25 25 -
c/src/lib/libcpu/powerpc/mpc8xx/include/mmu.h
r35f97010 r66c373bf 24 24 */ 25 25 typedef struct { 26 u nsigned32mmu_epn; /* Effective Page Number */27 u nsigned32mmu_twc; /* Tablewalk Control Register */28 u nsigned32mmu_rpn; /* Real Page Number */26 uint32_t mmu_epn; /* Effective Page Number */ 27 uint32_t mmu_twc; /* Tablewalk Control Register */ 28 uint32_t mmu_rpn; /* Real Page Number */ 29 29 } MMU_TLB_table_t; 30 30 -
c/src/lib/libcpu/powerpc/mpc8xx/include/mpc8xx.h
r35f97010 r66c373bf 185 185 */ 186 186 typedef struct m8xxMEMCRegisters_ { 187 rtems_unsigned32_br;188 rtems_unsigned32_or; /* Used to be called 'or'; reserved ANSI C++ keyword */187 uint32_t _br; 188 uint32_t _or; /* Used to be called 'or'; reserved ANSI C++ keyword */ 189 189 } m8xxMEMCRegisters_t; 190 190 … … 193 193 */ 194 194 typedef struct m8xxSCCRegisters_ { 195 rtems_unsigned32gsmr_l;196 rtems_unsigned32gsmr_h;197 rtems_unsigned16psmr;198 rtems_unsigned16_pad0;199 rtems_unsigned16todr;200 rtems_unsigned16dsr;201 rtems_unsigned16scce;202 rtems_unsigned16_pad1;203 rtems_unsigned16sccm;204 rtems_unsigned8_pad2;205 rtems_unsigned8sccs;206 rtems_unsigned32_pad3[2];195 uint32_t gsmr_l; 196 uint32_t gsmr_h; 197 uint16_t psmr; 198 uint16_t _pad0; 199 uint16_t todr; 200 uint16_t dsr; 201 uint16_t scce; 202 uint16_t _pad1; 203 uint16_t sccm; 204 uint8_t _pad2; 205 uint8_t sccs; 206 uint32_t _pad3[2]; 207 207 } m8xxSCCRegisters_t; 208 208 … … 211 211 */ 212 212 typedef struct m8xxSMCRegisters_ { 213 rtems_unsigned16_pad0;214 rtems_unsigned16smcmr;215 rtems_unsigned16_pad1;216 rtems_unsigned8smce;217 rtems_unsigned8_pad2;218 rtems_unsigned16_pad3;219 rtems_unsigned8smcm;220 rtems_unsigned8_pad4;221 rtems_unsigned32_pad5;213 uint16_t _pad0; 214 uint16_t smcmr; 215 uint16_t _pad1; 216 uint8_t smce; 217 uint8_t _pad2; 218 uint16_t _pad3; 219 uint8_t smcm; 220 uint8_t _pad4; 221 uint32_t _pad5; 222 222 } m8xxSMCRegisters_t; 223 223 … … 226 226 */ 227 227 typedef struct m8xxFECRegisters_ { 228 rtems_unsigned32addr_low;229 rtems_unsigned32addr_high;230 rtems_unsigned32hash_table_high;231 rtems_unsigned32hash_table_low;232 rtems_unsigned32r_des_start;233 rtems_unsigned32x_des_start;234 rtems_unsigned32r_buf_size;235 rtems_unsigned32_pad0[9];236 rtems_unsigned32ecntrl;237 rtems_unsigned32ievent;238 rtems_unsigned32imask;239 rtems_unsigned32ivec;240 rtems_unsigned32r_des_active;241 rtems_unsigned32x_des_active;242 rtems_unsigned32_pad1[10];243 rtems_unsigned32mii_data;244 rtems_unsigned32mii_speed;245 rtems_unsigned32_pad2[17];246 rtems_unsigned32r_bound;247 rtems_unsigned32r_fstart;248 rtems_unsigned32_pad3[6];249 rtems_unsigned32x_fstart;250 rtems_unsigned32_pad4[17];251 rtems_unsigned32fun_code;252 rtems_unsigned32_pad5[3];253 rtems_unsigned32r_cntrl;254 rtems_unsigned32r_hash;255 rtems_unsigned32_pad6[14];256 rtems_unsigned32x_cntrl;257 rtems_unsigned32_pad7[30];228 uint32_t addr_low; 229 uint32_t addr_high; 230 uint32_t hash_table_high; 231 uint32_t hash_table_low; 232 uint32_t r_des_start; 233 uint32_t x_des_start; 234 uint32_t r_buf_size; 235 uint32_t _pad0[9]; 236 uint32_t ecntrl; 237 uint32_t ievent; 238 uint32_t imask; 239 uint32_t ivec; 240 uint32_t r_des_active; 241 uint32_t x_des_active; 242 uint32_t _pad1[10]; 243 uint32_t mii_data; 244 uint32_t mii_speed; 245 uint32_t _pad2[17]; 246 uint32_t r_bound; 247 uint32_t r_fstart; 248 uint32_t _pad3[6]; 249 uint32_t x_fstart; 250 uint32_t _pad4[17]; 251 uint32_t fun_code; 252 uint32_t _pad5[3]; 253 uint32_t r_cntrl; 254 uint32_t r_hash; 255 uint32_t _pad6[14]; 256 uint32_t x_cntrl; 257 uint32_t _pad7[30]; 258 258 259 259 } m8xxFECRegisters_t; … … 286 286 */ 287 287 typedef struct m8xxMiscParms_ { 288 rtems_unsigned16rev_num;289 rtems_unsigned16_res1;290 rtems_unsigned32_res2;291 rtems_unsigned32_res3;288 uint16_t rev_num; 289 uint16_t _res1; 290 uint32_t _res2; 291 uint32_t _res3; 292 292 } m8xxMiscParms_t; 293 293 … … 298 298 */ 299 299 typedef struct m8xxTimerParms_ { 300 rtems_unsigned16tm_base;301 rtems_unsigned16_tm_ptr;302 rtems_unsigned16_r_tmr;303 rtems_unsigned16_r_tmv;304 rtems_unsigned32tm_cmd;305 rtems_unsigned32tm_cnt;300 uint16_t tm_base; 301 uint16_t _tm_ptr; 302 uint16_t _r_tmr; 303 uint16_t _r_tmv; 304 uint32_t tm_cmd; 305 uint32_t tm_cnt; 306 306 } m8xxTimerParms_t; 307 307 … … 335 335 */ 336 336 typedef struct m8xxIDMAparms_ { 337 rtems_unsigned16ibase;338 rtems_unsigned16dcmr;339 rtems_unsigned32_sapr;340 rtems_unsigned32_dapr;341 rtems_unsigned16ibptr;342 rtems_unsigned16_write_sp;343 rtems_unsigned32_s_byte_c;344 rtems_unsigned32_d_byte_c;345 rtems_unsigned32_s_state;346 rtems_unsigned32_itemp[4];347 rtems_unsigned32_sr_mem;348 rtems_unsigned16_read_sp;349 rtems_unsigned16_res0;350 rtems_unsigned16_res1;351 rtems_unsigned16_res2;352 rtems_unsigned32_d_state;337 uint16_t ibase; 338 uint16_t dcmr; 339 uint32_t _sapr; 340 uint32_t _dapr; 341 uint16_t ibptr; 342 uint16_t _write_sp; 343 uint32_t _s_byte_c; 344 uint32_t _d_byte_c; 345 uint32_t _s_state; 346 uint32_t _itemp[4]; 347 uint32_t _sr_mem; 348 uint16_t _read_sp; 349 uint16_t _res0; 350 uint16_t _res1; 351 uint16_t _res2; 352 uint32_t _d_state; 353 353 } m8xxIDMAparms_t; 354 354 … … 360 360 */ 361 361 typedef struct m8xxDSPparms_ { 362 rtems_unsigned32fdbase;363 rtems_unsigned32_fd_ptr;364 rtems_unsigned32_dstate;365 rtems_unsigned32_pad0;366 rtems_unsigned16_dstatus;367 rtems_unsigned16_i;368 rtems_unsigned16_tap;369 rtems_unsigned16_cbase;370 rtems_unsigned16_pad1;371 rtems_unsigned16_xptr;372 rtems_unsigned16_pad2;373 rtems_unsigned16_yptr;374 rtems_unsigned16_m;375 rtems_unsigned16_pad3;376 rtems_unsigned16_n;377 rtems_unsigned16_pad4;378 rtems_unsigned16_k;379 rtems_unsigned16_pad5;362 uint32_t fdbase; 363 uint32_t _fd_ptr; 364 uint32_t _dstate; 365 uint32_t _pad0; 366 uint16_t _dstatus; 367 uint16_t _i; 368 uint16_t _tap; 369 uint16_t _cbase; 370 uint16_t _pad1; 371 uint16_t _xptr; 372 uint16_t _pad2; 373 uint16_t _yptr; 374 uint16_t _m; 375 uint16_t _pad3; 376 uint16_t _n; 377 uint16_t _pad4; 378 uint16_t _k; 379 uint16_t _pad5; 380 380 } m8xxDSPparms_t; 381 381 … … 386 386 */ 387 387 typedef struct m8xxSCCparms_ { 388 rtems_unsigned16rbase;389 rtems_unsigned16tbase;390 rtems_unsigned8rfcr;391 rtems_unsigned8tfcr;392 rtems_unsigned16mrblr;393 rtems_unsigned32_rstate;394 rtems_unsigned32_pad0;395 rtems_unsigned16_rbptr;396 rtems_unsigned16_pad1;397 rtems_unsigned32_pad2;398 rtems_unsigned32_tstate;399 rtems_unsigned32_pad3;400 rtems_unsigned16_tbptr;401 rtems_unsigned16_pad4;402 rtems_unsigned32_pad5;403 rtems_unsigned32_rcrc;404 rtems_unsigned32_tcrc;388 uint16_t rbase; 389 uint16_t tbase; 390 uint8_t rfcr; 391 uint8_t tfcr; 392 uint16_t mrblr; 393 uint32_t _rstate; 394 uint32_t _pad0; 395 uint16_t _rbptr; 396 uint16_t _pad1; 397 uint32_t _pad2; 398 uint32_t _tstate; 399 uint32_t _pad3; 400 uint16_t _tbptr; 401 uint16_t _pad4; 402 uint32_t _pad5; 403 uint32_t _rcrc; 404 uint32_t _tcrc; 405 405 union { 406 406 struct { 407 rtems_unsigned32_res0;408 rtems_unsigned32_res1;409 rtems_unsigned16max_idl;410 rtems_unsigned16_idlc;411 rtems_unsigned16brkcr;412 rtems_unsigned16parec;413 rtems_unsigned16frmec;414 rtems_unsigned16nosec;415 rtems_unsigned16brkec;416 rtems_unsigned16brkln;417 rtems_unsigned16uaddr[2];418 rtems_unsigned16_rtemp;419 rtems_unsigned16toseq;420 rtems_unsigned16character[8];421 rtems_unsigned16rccm;422 rtems_unsigned16rccr;423 rtems_unsigned16rlbc;407 uint32_t _res0; 408 uint32_t _res1; 409 uint16_t max_idl; 410 uint16_t _idlc; 411 uint16_t brkcr; 412 uint16_t parec; 413 uint16_t frmec; 414 uint16_t nosec; 415 uint16_t brkec; 416 uint16_t brkln; 417 uint16_t uaddr[2]; 418 uint16_t _rtemp; 419 uint16_t toseq; 420 uint16_t character[8]; 421 uint16_t rccm; 422 uint16_t rccr; 423 uint16_t rlbc; 424 424 } uart; 425 425 } un; … … 427 427 428 428 typedef struct m8xxSCCENparms_ { 429 rtems_unsigned16rbase;430 rtems_unsigned16tbase;431 rtems_unsigned8rfcr;432 rtems_unsigned8tfcr;433 rtems_unsigned16mrblr;434 rtems_unsigned32_rstate;435 rtems_unsigned32_pad0;436 rtems_unsigned16_rbptr;437 rtems_unsigned16_pad1;438 rtems_unsigned32_pad2;439 rtems_unsigned32_tstate;440 rtems_unsigned32_pad3;441 rtems_unsigned16_tbptr;442 rtems_unsigned16_pad4;443 rtems_unsigned32_pad5;444 rtems_unsigned32_rcrc;445 rtems_unsigned32_tcrc;429 uint16_t rbase; 430 uint16_t tbase; 431 uint8_t rfcr; 432 uint8_t tfcr; 433 uint16_t mrblr; 434 uint32_t _rstate; 435 uint32_t _pad0; 436 uint16_t _rbptr; 437 uint16_t _pad1; 438 uint32_t _pad2; 439 uint32_t _tstate; 440 uint32_t _pad3; 441 uint16_t _tbptr; 442 uint16_t _pad4; 443 uint32_t _pad5; 444 uint32_t _rcrc; 445 uint32_t _tcrc; 446 446 union { 447 447 struct { 448 rtems_unsigned32_res0;449 rtems_unsigned32_res1;450 rtems_unsigned16max_idl;451 rtems_unsigned16_idlc;452 rtems_unsigned16brkcr;453 rtems_unsigned16parec;454 rtems_unsigned16frmec;455 rtems_unsigned16nosec;456 rtems_unsigned16brkec;457 rtems_unsigned16brkln;458 rtems_unsigned16uaddr[2];459 rtems_unsigned16_rtemp;460 rtems_unsigned16toseq;461 rtems_unsigned16character[8];462 rtems_unsigned16rccm;463 rtems_unsigned16rccr;464 rtems_unsigned16rlbc;448 uint32_t _res0; 449 uint32_t _res1; 450 uint16_t max_idl; 451 uint16_t _idlc; 452 uint16_t brkcr; 453 uint16_t parec; 454 uint16_t frmec; 455 uint16_t nosec; 456 uint16_t brkec; 457 uint16_t brkln; 458 uint16_t uaddr[2]; 459 uint16_t _rtemp; 460 uint16_t toseq; 461 uint16_t character[8]; 462 uint16_t rccm; 463 uint16_t rccr; 464 uint16_t rlbc; 465 465 } uart; 466 466 struct { 467 rtems_unsigned32c_pres;468 rtems_unsigned32c_mask;469 rtems_unsigned32crcec;470 rtems_unsigned32alec;471 rtems_unsigned32disfc;472 rtems_unsigned16pads;473 rtems_unsigned16ret_lim;474 rtems_unsigned16_ret_cnt;475 rtems_unsigned16mflr;476 rtems_unsigned16minflr;477 rtems_unsigned16maxd1;478 rtems_unsigned16maxd2;479 rtems_unsigned16_maxd;480 rtems_unsigned16dma_cnt;481 rtems_unsigned16_max_b;482 rtems_unsigned16gaddr1;483 rtems_unsigned16gaddr2;484 rtems_unsigned16gaddr3;485 rtems_unsigned16gaddr4;486 rtems_unsigned32_tbuf0data0;487 rtems_unsigned32_tbuf0data1;488 rtems_unsigned32_tbuf0rba0;489 rtems_unsigned32_tbuf0crc;490 rtems_unsigned16_tbuf0bcnt;491 rtems_unsigned16paddr_h;492 rtems_unsigned16paddr_m;493 rtems_unsigned16paddr_l;494 rtems_unsigned16p_per;495 rtems_unsigned16_rfbd_ptr;496 rtems_unsigned16_tfbd_ptr;497 rtems_unsigned16_tlbd_ptr;498 rtems_unsigned32_tbuf1data0;499 rtems_unsigned32_tbuf1data1;500 rtems_unsigned32_tbuf1rba0;501 rtems_unsigned32_tbuf1crc;502 rtems_unsigned16_tbuf1bcnt;503 rtems_unsigned16_tx_len;504 rtems_unsigned16iaddr1;505 rtems_unsigned16iaddr2;506 rtems_unsigned16iaddr3;507 rtems_unsigned16iaddr4;508 rtems_unsigned16_boff_cnt;509 rtems_unsigned16taddr_l;510 rtems_unsigned16taddr_m;511 rtems_unsigned16taddr_h;467 uint32_t c_pres; 468 uint32_t c_mask; 469 uint32_t crcec; 470 uint32_t alec; 471 uint32_t disfc; 472 uint16_t pads; 473 uint16_t ret_lim; 474 uint16_t _ret_cnt; 475 uint16_t mflr; 476 uint16_t minflr; 477 uint16_t maxd1; 478 uint16_t maxd2; 479 uint16_t _maxd; 480 uint16_t dma_cnt; 481 uint16_t _max_b; 482 uint16_t gaddr1; 483 uint16_t gaddr2; 484 uint16_t gaddr3; 485 uint16_t gaddr4; 486 uint32_t _tbuf0data0; 487 uint32_t _tbuf0data1; 488 uint32_t _tbuf0rba0; 489 uint32_t _tbuf0crc; 490 uint16_t _tbuf0bcnt; 491 uint16_t paddr_h; 492 uint16_t paddr_m; 493 uint16_t paddr_l; 494 uint16_t p_per; 495 uint16_t _rfbd_ptr; 496 uint16_t _tfbd_ptr; 497 uint16_t _tlbd_ptr; 498 uint32_t _tbuf1data0; 499 uint32_t _tbuf1data1; 500 uint32_t _tbuf1rba0; 501 uint32_t _tbuf1crc; 502 uint16_t _tbuf1bcnt; 503 uint16_t _tx_len; 504 uint16_t iaddr1; 505 uint16_t iaddr2; 506 uint16_t iaddr3; 507 uint16_t iaddr4; 508 uint16_t _boff_cnt; 509 uint16_t taddr_l; 510 uint16_t taddr_m; 511 uint16_t taddr_h; 512 512 } ethernet; 513 513 } un; … … 540 540 */ 541 541 typedef struct m8xxSMCparms_ { 542 rtems_unsigned16rbase;543 rtems_unsigned16tbase;544 rtems_unsigned8rfcr;545 rtems_unsigned8tfcr;546 rtems_unsigned16mrblr;547 rtems_unsigned32_rstate;548 rtems_unsigned32_pad0;549 rtems_unsigned16_rbptr;550 rtems_unsigned16_pad1;551 rtems_unsigned32_pad2;552 rtems_unsigned32_tstate;553 rtems_unsigned32_pad3;554 rtems_unsigned16_tbptr;555 rtems_unsigned16_pad4;556 rtems_unsigned32_pad5;542 uint16_t rbase; 543 uint16_t tbase; 544 uint8_t rfcr; 545 uint8_t tfcr; 546 uint16_t mrblr; 547 uint32_t _rstate; 548 uint32_t _pad0; 549 uint16_t _rbptr; 550 uint16_t _pad1; 551 uint32_t _pad2; 552 uint32_t _tstate; 553 uint32_t _pad3; 554 uint16_t _tbptr; 555 uint16_t _pad4; 556 uint32_t _pad5; 557 557 union { 558 558 struct { 559 rtems_unsigned16max_idl;560 rtems_unsigned16_idlc;561 rtems_unsigned16brkln;562 rtems_unsigned16brkec;563 rtems_unsigned16brkcr;564 rtems_unsigned16_r_mask;559 uint16_t max_idl; 560 uint16_t _idlc; 561 uint16_t brkln; 562 uint16_t brkec; 563 uint16_t brkcr; 564 uint16_t _r_mask; 565 565 } uart; 566 566 struct { 567 rtems_unsigned16_pad0[5];567 uint16_t _pad0[5]; 568 568 } transparent; 569 569 } un; … … 600 600 */ 601 601 typedef struct m8xxSPIparms_ { 602 rtems_unsigned16rbase;603 rtems_unsigned16tbase;604 rtems_unsigned8rfcr;605 rtems_unsigned8tfcr;606 rtems_unsigned16mrblr;607 rtems_unsigned32_rstate;608 rtems_unsigned32_pad0;609 rtems_unsigned16_rbptr;610 rtems_unsigned16_pad1;611 rtems_unsigned32_pad2;612 rtems_unsigned32_tstate;613 rtems_unsigned32_pad3;614 rtems_unsigned16_tbptr;615 rtems_unsigned16_pad4;616 rtems_unsigned32_pad5;602 uint16_t rbase; 603 uint16_t tbase; 604 uint8_t rfcr; 605 uint8_t tfcr; 606 uint16_t mrblr; 607 uint32_t _rstate; 608 uint32_t _pad0; 609 uint16_t _rbptr; 610 uint16_t _pad1; 611 uint32_t _pad2; 612 uint32_t _tstate; 613 uint32_t _pad3; 614 uint16_t _tbptr; 615 uint16_t _pad4; 616 uint32_t _pad5; 617 617 } m8xxSPIparms_t; 618 618 … … 650 650 */ 651 651 typedef struct m8xxBufferDescriptor_ { 652 volatile rtems_unsigned16status;653 rtems_unsigned16length;652 volatile uint16_t status; 653 uint16_t length; 654 654 volatile void *buffer; 655 655 } m8xxBufferDescriptor_t; … … 706 706 */ 707 707 typedef struct m8xxIDMABufferDescriptor_ { 708 rtems_unsigned16status;709 rtems_unsigned8dfcr;710 rtems_unsigned8sfcr;711 rtems_unsigned32length;708 uint16_t status; 709 uint8_t dfcr; 710 uint8_t sfcr; 711 uint32_t length; 712 712 void *source; 713 713 void *destination; … … 1112 1112 * SIU Block 1113 1113 */ 1114 rtems_unsigned32siumcr;1115 rtems_unsigned32sypcr;1114 uint32_t siumcr; 1115 uint32_t sypcr; 1116 1116 #if defined(mpc860) 1117 rtems_unsigned32swt;1117 uint32_t swt; 1118 1118 #elif defined(mpc821) 1119 rtems_unsigned32_pad70;1119 uint32_t _pad70; 1120 1120 #endif 1121 rtems_unsigned16_pad0;1122 rtems_unsigned16swsr;1123 rtems_unsigned32sipend;1124 rtems_unsigned32simask;1125 rtems_unsigned32siel;1126 rtems_unsigned32sivec;1127 rtems_unsigned32tesr;1128 rtems_unsigned32_pad1[3];1129 rtems_unsigned32sdcr;1130 rtems_unsigned8_pad2[0x80-0x34];1121 uint16_t _pad0; 1122 uint16_t swsr; 1123 uint32_t sipend; 1124 uint32_t simask; 1125 uint32_t siel; 1126 uint32_t sivec; 1127 uint32_t tesr; 1128 uint32_t _pad1[3]; 1129 uint32_t sdcr; 1130 uint8_t _pad2[0x80-0x34]; 1131 1131 1132 1132 /* 1133 1133 * PCMCIA Block 1134 1134 */ 1135 rtems_unsigned32pbr0;1136 rtems_unsigned32por0;1137 rtems_unsigned32pbr1;1138 rtems_unsigned32por1;1139 rtems_unsigned32pbr2;1140 rtems_unsigned32por2;1141 rtems_unsigned32pbr3;1142 rtems_unsigned32por3;1143 rtems_unsigned32pbr4;1144 rtems_unsigned32por4;1145 rtems_unsigned32pbr5;1146 rtems_unsigned32por5;1147 rtems_unsigned32pbr6;1148 rtems_unsigned32por6;1149 rtems_unsigned32pbr7;1150 rtems_unsigned32por7;1151 rtems_unsigned8_pad3[0xe0-0xc0];1152 rtems_unsigned32pgcra;1153 rtems_unsigned32pgcrb;1154 rtems_unsigned32pscr;1155 rtems_unsigned32_pad4;1156 rtems_unsigned32pipr;1157 rtems_unsigned32_pad5;1158 rtems_unsigned32per;1159 rtems_unsigned32_pad6;1135 uint32_t pbr0; 1136 uint32_t por0; 1137 uint32_t pbr1; 1138 uint32_t por1; 1139 uint32_t pbr2; 1140 uint32_t por2; 1141 uint32_t pbr3; 1142 uint32_t por3; 1143 uint32_t pbr4; 1144 uint32_t por4; 1145 uint32_t pbr5; 1146 uint32_t por5; 1147 uint32_t pbr6; 1148 uint32_t por6; 1149 uint32_t pbr7; 1150 uint32_t por7; 1151 uint8_t _pad3[0xe0-0xc0]; 1152 uint32_t pgcra; 1153 uint32_t pgcrb; 1154 uint32_t pscr; 1155 uint32_t _pad4; 1156 uint32_t pipr; 1157 uint32_t _pad5; 1158 uint32_t per; 1159 uint32_t _pad6; 1160 1160 1161 1161 /* … … 1163 1163 */ 1164 1164 m8xxMEMCRegisters_t memc[8]; 1165 rtems_unsigned8_pad7[0x164-0x140];1166 rtems_unsigned32mar;1167 rtems_unsigned32mcr;1168 rtems_unsigned32_pad8;1169 rtems_unsigned32mamr;1170 rtems_unsigned32mbmr;1171 rtems_unsigned16mstat;1172 rtems_unsigned16mptpr;1173 rtems_unsigned32mdr;1174 rtems_unsigned8_pad9[0x200-0x180];1165 uint8_t _pad7[0x164-0x140]; 1166 uint32_t mar; 1167 uint32_t mcr; 1168 uint32_t _pad8; 1169 uint32_t mamr; 1170 uint32_t mbmr; 1171 uint16_t mstat; 1172 uint16_t mptpr; 1173 uint32_t mdr; 1174 uint8_t _pad9[0x200-0x180]; 1175 1175 1176 1176 /* 1177 1177 * System integration timers 1178 1178 */ 1179 rtems_unsigned16tbscr;1180 rtems_unsigned16_pad10;1181 rtems_unsigned32tbreff0;1182 rtems_unsigned32tbreff1;1183 rtems_unsigned8_pad11[0x220-0x20c];1184 rtems_unsigned16rtcsc;1185 rtems_unsigned16_pad12;1186 rtems_unsigned32rtc;1187 rtems_unsigned32rtsec;1188 rtems_unsigned32rtcal;1189 rtems_unsigned32_pad13[4];1190 rtems_unsigned16piscr;1191 rtems_unsigned16_pad14;1192 rtems_unsigned16pitc;1193 rtems_unsigned16_pad_14_1;1194 rtems_unsigned16pitr;1195 rtems_unsigned16_pad_14_2;1196 rtems_unsigned8_pad15[0x280-0x24c];1179 uint16_t tbscr; 1180 uint16_t _pad10; 1181 uint32_t tbreff0; 1182 uint32_t tbreff1; 1183 uint8_t _pad11[0x220-0x20c]; 1184 uint16_t rtcsc; 1185 uint16_t _pad12; 1186 uint32_t rtc; 1187 uint32_t rtsec; 1188 uint32_t rtcal; 1189 uint32_t _pad13[4]; 1190 uint16_t piscr; 1191 uint16_t _pad14; 1192 uint16_t pitc; 1193 uint16_t _pad_14_1; 1194 uint16_t pitr; 1195 uint16_t _pad_14_2; 1196 uint8_t _pad15[0x280-0x24c]; 1197 1197 1198 1198 … … 1200 1200 * Clocks and Reset 1201 1201 */ 1202 rtems_unsigned32sccr;1203 rtems_unsigned32plprcr;1204 rtems_unsigned32rsr;1205 rtems_unsigned8_pad16[0x300-0x28c];1202 uint32_t sccr; 1203 uint32_t plprcr; 1204 uint32_t rsr; 1205 uint8_t _pad16[0x300-0x28c]; 1206 1206 1207 1207 … … 1209 1209 * System integration timers keys 1210 1210 */ 1211 rtems_unsigned32tbscrk;1212 rtems_unsigned32tbreff0k;1213 rtems_unsigned32tbreff1k;1214 rtems_unsigned32tbk;1215 rtems_unsigned32_pad17[4];1216 rtems_unsigned32rtcsk;1217 rtems_unsigned32rtck;1218 rtems_unsigned32rtseck;1219 rtems_unsigned32rtcalk;1220 rtems_unsigned32_pad18[4];1221 rtems_unsigned32piscrk;1222 rtems_unsigned32pitck;1223 rtems_unsigned8_pad19[0x380-0x348];1211 uint32_t tbscrk; 1212 uint32_t tbreff0k; 1213 uint32_t tbreff1k; 1214 uint32_t tbk; 1215 uint32_t _pad17[4]; 1216 uint32_t rtcsk; 1217 uint32_t rtck; 1218 uint32_t rtseck; 1219 uint32_t rtcalk; 1220 uint32_t _pad18[4]; 1221 uint32_t piscrk; 1222 uint32_t pitck; 1223 uint8_t _pad19[0x380-0x348]; 1224 1224 1225 1225 /* 1226 1226 * Clocks and Reset Keys 1227 1227 */ 1228 rtems_unsigned32sccrk;1229 rtems_unsigned32plprck;1230 rtems_unsigned32rsrk;1231 rtems_unsigned8_pad20[0x400-0x38c];1232 rtems_unsigned8_pad21[0x800-0x400];1233 rtems_unsigned8_pad22[0x860-0x800];1228 uint32_t sccrk; 1229 uint32_t plprck; 1230 uint32_t rsrk; 1231 uint8_t _pad20[0x400-0x38c]; 1232 uint8_t _pad21[0x800-0x400]; 1233 uint8_t _pad22[0x860-0x800]; 1234 1234 1235 1235 … … 1237 1237 * I2C 1238 1238 */ 1239 rtems_unsigned8i2mod;1240 rtems_unsigned8_pad23[3];1241 rtems_unsigned8i2add;1242 rtems_unsigned8_pad24[3];1243 rtems_unsigned8i2brg;1244 rtems_unsigned8_pad25[3];1245 rtems_unsigned8i2com;1246 rtems_unsigned8_pad26[3];1247 rtems_unsigned8i2cer;1248 rtems_unsigned8_pad27[3];1249 rtems_unsigned8i2cmr;1250 rtems_unsigned8_pad28[0x900-0x875];1239 uint8_t i2mod; 1240 uint8_t _pad23[3]; 1241 uint8_t i2add; 1242 uint8_t _pad24[3]; 1243 uint8_t i2brg; 1244 uint8_t _pad25[3]; 1245 uint8_t i2com; 1246 uint8_t _pad26[3]; 1247 uint8_t i2cer; 1248 uint8_t _pad27[3]; 1249 uint8_t i2cmr; 1250 uint8_t _pad28[0x900-0x875]; 1251 1251 1252 1252 /* 1253 1253 * DMA Block 1254 1254 */ 1255 rtems_unsigned32_pad29;1256 rtems_unsigned32sdar;1257 rtems_unsigned8sdsr;1258 rtems_unsigned8_pad30[3];1259 rtems_unsigned8sdmr;1260 rtems_unsigned8_pad31[3];1261 rtems_unsigned8idsr1;1262 rtems_unsigned8_pad32[3];1263 rtems_unsigned8idmr1;1264 rtems_unsigned8_pad33[3];1265 rtems_unsigned8idsr2;1266 rtems_unsigned8_pad34[3];1267 rtems_unsigned8idmr2;1268 rtems_unsigned8_pad35[0x930-0x91d];1255 uint32_t _pad29; 1256 uint32_t sdar; 1257 uint8_t sdsr; 1258 uint8_t _pad30[3]; 1259 uint8_t sdmr; 1260 uint8_t _pad31[3]; 1261 uint8_t idsr1; 1262 uint8_t _pad32[3]; 1263 uint8_t idmr1; 1264 uint8_t _pad33[3]; 1265 uint8_t idsr2; 1266 uint8_t _pad34[3]; 1267 uint8_t idmr2; 1268 uint8_t _pad35[0x930-0x91d]; 1269 1269 1270 1270 /* 1271 1271 * CPM Interrupt Control Block 1272 1272 */ 1273 rtems_unsigned16civr;1274 rtems_unsigned8_pad36[14];1275 rtems_unsigned32cicr;1276 rtems_unsigned32cipr;1277 rtems_unsigned32cimr;1278 rtems_unsigned32cisr;1273 uint16_t civr; 1274 uint8_t _pad36[14]; 1275 uint32_t cicr; 1276 uint32_t cipr; 1277 uint32_t cimr; 1278 uint32_t cisr; 1279 1279 1280 1280 /* 1281 1281 * I/O Port Block 1282 1282 */ 1283 rtems_unsigned16padir;1284 rtems_unsigned16papar;1285 rtems_unsigned16paodr;1286 rtems_unsigned16padat;1287 rtems_unsigned8_pad37[8];1288 rtems_unsigned16pcdir;1289 rtems_unsigned16pcpar;1290 rtems_unsigned16pcso;1291 rtems_unsigned16pcdat;1292 rtems_unsigned16pcint;1293 rtems_unsigned8_pad39[6];1294 rtems_unsigned16pddir;1295 rtems_unsigned16pdpar;1296 rtems_unsigned16_pad40;1297 rtems_unsigned16pddat;1298 rtems_unsigned8_pad41[8];1283 uint16_t padir; 1284 uint16_t papar; 1285 uint16_t paodr; 1286 uint16_t padat; 1287 uint8_t _pad37[8]; 1288 uint16_t pcdir; 1289 uint16_t pcpar; 1290 uint16_t pcso; 1291 uint16_t pcdat; 1292 uint16_t pcint; 1293 uint8_t _pad39[6]; 1294 uint16_t pddir; 1295 uint16_t pdpar; 1296 uint16_t _pad40; 1297 uint16_t pddat; 1298 uint8_t _pad41[8]; 1299 1299 1300 1300 /* 1301 1301 * CPM Timers Block 1302 1302 */ 1303 rtems_unsigned16tgcr;1304 rtems_unsigned8_pad42[14];1305 rtems_unsigned16tmr1;1306 rtems_unsigned16tmr2;1307 rtems_unsigned16trr1;1308 rtems_unsigned16trr2;1309 rtems_unsigned16tcr1;1310 rtems_unsigned16tcr2;1311 rtems_unsigned16tcn1;1312 rtems_unsigned16tcn2;1313 rtems_unsigned16tmr3;1314 rtems_unsigned16tmr4;1315 rtems_unsigned16trr3;1316 rtems_unsigned16trr4;1317 rtems_unsigned16tcr3;1318 rtems_unsigned16tcr4;1319 rtems_unsigned16tcn3;1320 rtems_unsigned16tcn4;1321 rtems_unsigned16ter1;1322 rtems_unsigned16ter2;1323 rtems_unsigned16ter3;1324 rtems_unsigned16ter4;1325 rtems_unsigned8_pad43[8];1303 uint16_t tgcr; 1304 uint8_t _pad42[14]; 1305 uint16_t tmr1; 1306 uint16_t tmr2; 1307 uint16_t trr1; 1308 uint16_t trr2; 1309 uint16_t tcr1; 1310 uint16_t tcr2; 1311 uint16_t tcn1; 1312 uint16_t tcn2; 1313 uint16_t tmr3; 1314 uint16_t tmr4; 1315 uint16_t trr3; 1316 uint16_t trr4; 1317 uint16_t tcr3; 1318 uint16_t tcr4; 1319 uint16_t tcn3; 1320 uint16_t tcn4; 1321 uint16_t ter1; 1322 uint16_t ter2; 1323 uint16_t ter3; 1324 uint16_t ter4; 1325 uint8_t _pad43[8]; 1326 1326 1327 1327 /* 1328 1328 * CPM Block 1329 1329 */ 1330 rtems_unsigned16cpcr;1331 rtems_unsigned16_pad44;1332 rtems_unsigned16rccr;1333 rtems_unsigned8_pad45;1334 rtems_unsigned8rmds;1335 rtems_unsigned32rmdr;1336 rtems_unsigned16rctr1;1337 rtems_unsigned16rctr2;1338 rtems_unsigned16rctr3;1339 rtems_unsigned16rctr4;1340 rtems_unsigned16_pad46;1341 rtems_unsigned16rter;1342 rtems_unsigned16_pad47;1343 rtems_unsigned16rtmr;1344 rtems_unsigned8_pad48[0x9f0-0x9dc];1330 uint16_t cpcr; 1331 uint16_t _pad44; 1332 uint16_t rccr; 1333 uint8_t _pad45; 1334 uint8_t rmds; 1335 uint32_t rmdr; 1336 uint16_t rctr1; 1337 uint16_t rctr2; 1338 uint16_t rctr3; 1339 uint16_t rctr4; 1340 uint16_t _pad46; 1341 uint16_t rter; 1342 uint16_t _pad47; 1343 uint16_t rtmr; 1344 uint8_t _pad48[0x9f0-0x9dc]; 1345 1345 1346 1346 /* 1347 1347 * BRG Block 1348 1348 */ 1349 rtems_unsigned32brgc1;1350 rtems_unsigned32brgc2;1351 rtems_unsigned32brgc3;1352 rtems_unsigned32brgc4;1349 uint32_t brgc1; 1350 uint32_t brgc2; 1351 uint32_t brgc3; 1352 uint32_t brgc4; 1353 1353 1354 1354 /* … … 1361 1361 m8xxSCCRegisters_t scc4; 1362 1362 #elif defined(mpc821) 1363 rtems_unsigned8_pad72[0xa80-0xa40];1363 uint8_t _pad72[0xa80-0xa40]; 1364 1364 #endif 1365 1365 … … 1373 1373 * SPI Block 1374 1374 */ 1375 rtems_unsigned16spmode;1376 rtems_unsigned16_pad49[2];1377 rtems_unsigned8spie;1378 rtems_unsigned8_pad50;1379 rtems_unsigned16_pad51;1380 rtems_unsigned8spim;1381 rtems_unsigned8_pad52[2];1382 rtems_unsigned8spcom;1383 rtems_unsigned16_pad53[2];1375 uint16_t spmode; 1376 uint16_t _pad49[2]; 1377 uint8_t spie; 1378 uint8_t _pad50; 1379 uint16_t _pad51; 1380 uint8_t spim; 1381 uint8_t _pad52[2]; 1382 uint8_t spcom; 1383 uint16_t _pad53[2]; 1384 1384 1385 1385 /* 1386 1386 * PIP Block 1387 1387 */ 1388 rtems_unsigned16pipc;1389 rtems_unsigned16_pad54;1390 rtems_unsigned16ptpr;1391 rtems_unsigned32pbdir;1392 rtems_unsigned32pbpar;1393 rtems_unsigned16_pad55;1394 rtems_unsigned16pbodr;1395 rtems_unsigned32pbdat;1396 rtems_unsigned32_pad56[6];1388 uint16_t pipc; 1389 uint16_t _pad54; 1390 uint16_t ptpr; 1391 uint32_t pbdir; 1392 uint32_t pbpar; 1393 uint16_t _pad55; 1394 uint16_t pbodr; 1395 uint32_t pbdat; 1396 uint32_t _pad56[6]; 1397 1397 1398 1398 /* 1399 1399 * SI Block 1400 1400 */ 1401 rtems_unsigned32simode;1402 rtems_unsigned8sigmr;1403 rtems_unsigned8_pad57;1404 rtems_unsigned8sistr;1405 rtems_unsigned8sicmr;1406 rtems_unsigned32_pad58;1407 rtems_unsigned32sicr;1408 rtems_unsigned16sirp[2];1409 rtems_unsigned32_pad59[3];1410 rtems_unsigned8_pad60[0xc00-0xb00];1411 rtems_unsigned8siram[512];1401 uint32_t simode; 1402 uint8_t sigmr; 1403 uint8_t _pad57; 1404 uint8_t sistr; 1405 uint8_t sicmr; 1406 uint32_t _pad58; 1407 uint32_t sicr; 1408 uint16_t sirp[2]; 1409 uint32_t _pad59[3]; 1410 uint8_t _pad60[0xc00-0xb00]; 1411 uint8_t siram[512]; 1412 1412 #if defined(mpc860) 1413 1413 /* … … 1416 1416 m8xxFECRegisters_t fec; 1417 1417 #elif defined(mpc821) 1418 rtems_unsigned8lcdram[512];1418 uint8_t lcdram[512]; 1419 1419 #endif 1420 rtems_unsigned8_pad62[0x2000-0x1000];1420 uint8_t _pad62[0x2000-0x1000]; 1421 1421 1422 1422 /* 1423 1423 * Dual-port RAM 1424 1424 */ 1425 rtems_unsigned8dpram0[0x200]; /* BD/DATA/UCODE */1426 rtems_unsigned8dpram1[0x200]; /* BD/DATA/UCODE */1427 rtems_unsigned8dpram2[0x400]; /* BD/DATA/UCODE */1428 rtems_unsigned8dpram3[0x600]; /* BD/DATA*/1429 rtems_unsigned8dpram4[0x200]; /* BD/DATA/UCODE */1430 rtems_unsigned8_pad63[0x3c00-0x3000];1425 uint8_t dpram0[0x200]; /* BD/DATA/UCODE */ 1426 uint8_t dpram1[0x200]; /* BD/DATA/UCODE */ 1427 uint8_t dpram2[0x400]; /* BD/DATA/UCODE */ 1428 uint8_t dpram3[0x600]; /* BD/DATA*/ 1429 uint8_t dpram4[0x200]; /* BD/DATA/UCODE */ 1430 uint8_t _pad63[0x3c00-0x3000]; 1431 1431 1432 1432 /* When using SCC1 for ethernet, we lose the use of I2C since … … 1443 1443 */ 1444 1444 m8xxSCCENparms_t scc1p; 1445 rtems_unsigned8_rsv1[0xCB0-0xC00-sizeof(m8xxSCCENparms_t)];1445 uint8_t _rsv1[0xCB0-0xC00-sizeof(m8xxSCCENparms_t)]; 1446 1446 m8xxMiscParms_t miscp; 1447 rtems_unsigned8_rsv2[0xcc0-0xCB0-sizeof(m8xxMiscParms_t)];1447 uint8_t _rsv2[0xcc0-0xCB0-sizeof(m8xxMiscParms_t)]; 1448 1448 m8xxIDMAparms_t idma1p; 1449 rtems_unsigned8_rsv3[0xd00-0xcc0-sizeof(m8xxIDMAparms_t)];1449 uint8_t _rsv3[0xd00-0xcc0-sizeof(m8xxIDMAparms_t)]; 1450 1450 1451 1451 m8xxSCCparms_t scc2p; 1452 rtems_unsigned8_rsv4[0xD80-0xD00-sizeof(m8xxSCCparms_t)];1452 uint8_t _rsv4[0xD80-0xD00-sizeof(m8xxSCCparms_t)]; 1453 1453 m8xxSPIparms_t spip; 1454 rtems_unsigned8_rsv5[0xDB0-0xD80-sizeof(m8xxSPIparms_t)];1454 uint8_t _rsv5[0xDB0-0xD80-sizeof(m8xxSPIparms_t)]; 1455 1455 m8xxTimerParms_t tmp; 1456 rtems_unsigned8_rsv6[0xDC0-0xDB0-sizeof(m8xxTimerParms_t)];1456 uint8_t _rsv6[0xDC0-0xDB0-sizeof(m8xxTimerParms_t)]; 1457 1457 m8xxIDMAparms_t idma2p; 1458 rtems_unsigned8_rsv7[0xE00-0xDC0-sizeof(m8xxIDMAparms_t)];1458 uint8_t _rsv7[0xE00-0xDC0-sizeof(m8xxIDMAparms_t)]; 1459 1459 1460 1460 m8xxSCCparms_t scc3p; /* Not available on MPC821 */ 1461 rtems_unsigned8_rsv8[0xE80-0xE00-sizeof(m8xxSCCparms_t)];1461 uint8_t _rsv8[0xE80-0xE00-sizeof(m8xxSCCparms_t)]; 1462 1462 m8xxSMCparms_t smc1p; 1463 rtems_unsigned8_rsv9[0xEC0-0xE80-sizeof(m8xxSMCparms_t)];1463 uint8_t _rsv9[0xEC0-0xE80-sizeof(m8xxSMCparms_t)]; 1464 1464 m8xxDSPparms_t dsp1p; 1465 rtems_unsigned8_rsv10[0xF00-0xEC0-sizeof(m8xxDSPparms_t)];1465 uint8_t _rsv10[0xF00-0xEC0-sizeof(m8xxDSPparms_t)]; 1466 1466 1467 1467 m8xxSCCparms_t scc4p; /* Not available on MPC821 */ 1468 rtems_unsigned8_rsv11[0xF80-0xF00-sizeof(m8xxSCCparms_t)];1468 uint8_t _rsv11[0xF80-0xF00-sizeof(m8xxSCCparms_t)]; 1469 1469 m8xxSMCparms_t smc2p; 1470 rtems_unsigned8_rsv12[0xFC0-0xF80-sizeof(m8xxSMCparms_t)];1470 uint8_t _rsv12[0xFC0-0xF80-sizeof(m8xxSMCparms_t)]; 1471 1471 m8xxDSPparms_t dsp2p; 1472 rtems_unsigned8_rsv13[0x1000-0xFC0-sizeof(m8xxDSPparms_t)];1472 uint8_t _rsv13[0x1000-0xFC0-sizeof(m8xxDSPparms_t)]; 1473 1473 } m8xx_t; 1474 1474 -
c/src/lib/libcpu/powerpc/mpc8xx/mmu/mmu.c
r35f97010 r66c373bf 35 35 void mmu_init( void ) 36 36 { 37 register u nsigned32reg1, i;37 register uint32_t reg1, i; 38 38 39 39 /* -
c/src/lib/libcpu/powerpc/mpc8xx/timer/timer.c
r35f97010 r66c373bf 46 46 #include <mpc8xx.h> 47 47 48 static volatile rtems_unsigned32Timer_starting;48 static volatile uint32_t Timer_starting; 49 49 static rtems_boolean Timer_driver_Find_average_overhead; 50 50 … … 52 52 * This is so small that this code will be reproduced where needed. 53 53 */ 54 static inline rtems_unsigned32get_itimer(void)54 static inline uint32_t get_itimer(void) 55 55 { 56 rtems_unsigned32ret;56 uint32_t ret; 57 57 58 58 asm volatile ("mftb %0" : "=r" ((ret))); /* TBLO */ … … 80 80 int Read_timer(void) 81 81 { 82 rtems_unsigned32clicks;83 rtems_unsigned32total;82 uint32_t clicks; 83 uint32_t total; 84 84 85 85 clicks = get_itimer(); -
c/src/lib/libcpu/powerpc/ppc403/clock/clock.c
r35f97010 r66c373bf 44 44 #include <stdlib.h> /* for atexit() */ 45 45 46 volatile rtems_unsigned32Clock_driver_ticks;47 static rtems_unsigned32pit_value, tick_time;46 volatile uint32_t Clock_driver_ticks; 47 static uint32_t pit_value, tick_time; 48 48 static rtems_boolean auto_restart; 49 49 … … 63 63 rtems_device_minor_number rtems_clock_minor; 64 64 65 static inline rtems_unsigned32get_itimer(void)66 { 67 register rtems_unsigned32rc;65 static inline uint32_t get_itimer(void) 66 { 67 register uint32_t rc; 68 68 69 69 #ifndef ppc405 /* this is a ppc403 */ … … 83 83 Clock_isr(rtems_vector_number vector) 84 84 { 85 rtems_unsigned32clicks_til_next_interrupt;85 uint32_t clicks_til_next_interrupt; 86 86 if (!auto_restart) 87 87 { 88 rtems_unsigned32itimer_value;88 uint32_t itimer_value; 89 89 /* 90 90 * setup for next interrupt; making sure the new value is reasonably … … 142 142 { 143 143 rtems_isr_entry previous_isr; 144 rtems_unsigned32iocr;145 register rtems_unsigned32tcr;144 uint32_t iocr; 145 register uint32_t tcr; 146 146 #ifdef ppc403 147 rtems_unsigned32pvr;147 uint32_t pvr; 148 148 #endif /* ppc403 */ 149 149 … … 226 226 { 227 227 rtems_isr_entry previous_isr; 228 rtems_unsigned32isrlevel = 0;228 uint32_t isrlevel = 0; 229 229 230 230 rtems_interrupt_disable(isrlevel); … … 247 247 Clock_exit(void) 248 248 { 249 register rtems_unsigned32tcr;249 register uint32_t tcr; 250 250 251 251 asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */ -
c/src/lib/libcpu/powerpc/ppc403/console/console.c
r35f97010 r66c373bf 207 207 208 208 void 209 spiBaudSet(u nsigned32baudrate)210 { 211 u nsigned32tmp;209 spiBaudSet(uint32_t baudrate) 210 { 211 uint32_t tmp; 212 212 tmp = rtems_cpu_configuration_get_serial_per_sec() / baudrate; 213 213 tmp = ((tmp) >> 4) - 1; -
c/src/lib/libcpu/powerpc/ppc403/console/console405.c
r35f97010 r66c373bf 192 192 193 193 void 194 spiBaudSet(u nsigned32baudrate)195 { 196 u nsigned32tmp;194 spiBaudSet(uint32_t baudrate) 195 { 196 uint32_t tmp; 197 197 198 198 tmp = round( (double)rtems_cpu_configuration_get_serial_per_sec() / (baudrate * 16) ); -
c/src/lib/libcpu/powerpc/ppc403/ictrl/ictrl.c
r35f97010 r66c373bf 46 46 #if defined(ppc405) 47 47 RTEMS_INLINE_ROUTINE void 48 clr_exisr(u nsigned32mask)48 clr_exisr(uint32_t mask) 49 49 { 50 50 asm volatile ("mtdcr 0xC0,%0"::"r" (mask));/*EXISR*/ … … 54 54 * get value of EXISR 55 55 */ 56 RTEMS_INLINE_ROUTINE u nsigned3256 RTEMS_INLINE_ROUTINE uint32_t 57 57 get_exisr(void) 58 58 { 59 u nsigned32val;59 uint32_t val; 60 60 61 61 asm volatile ("mfdcr %0,0xC0":"=r" (val));/*EXISR*/ … … 66 66 * get value of EXIER 67 67 */ 68 RTEMS_INLINE_ROUTINE u nsigned3268 RTEMS_INLINE_ROUTINE uint32_t 69 69 get_exier(void) 70 70 { 71 u nsigned32val;71 uint32_t val; 72 72 asm volatile ("mfdcr %0,0xC2":"=r" (val));/*EXIER*/ 73 73 return val; … … 78 78 */ 79 79 RTEMS_INLINE_ROUTINE void 80 set_exier(u nsigned32val)80 set_exier(uint32_t val) 81 81 { 82 82 asm volatile ("mtdcr 0xC2,%0"::"r" (val));/*EXIER*/ … … 86 86 87 87 RTEMS_INLINE_ROUTINE void 88 clr_exisr(u nsigned32mask)88 clr_exisr(uint32_t mask) 89 89 { 90 90 asm volatile ("mtdcr 0x40,%0"::"r" (mask));/*EXISR*/ … … 94 94 * get value of EXISR 95 95 */ 96 RTEMS_INLINE_ROUTINE u nsigned3296 RTEMS_INLINE_ROUTINE uint32_t 97 97 get_exisr(void) 98 98 { 99 u nsigned32val;99 uint32_t val; 100 100 101 101 asm volatile ("mfdcr %0,0x40":"=r" (val));/*EXISR*/ … … 106 106 * get value of EXIER 107 107 */ 108 RTEMS_INLINE_ROUTINE u nsigned32108 RTEMS_INLINE_ROUTINE uint32_t 109 109 get_exier(void) 110 110 { 111 u nsigned32val;111 uint32_t val; 112 112 asm volatile ("mfdcr %0,0x42":"=r" (val));/*EXIER*/ 113 113 return val; … … 118 118 */ 119 119 RTEMS_INLINE_ROUTINE void 120 set_exier(u nsigned32val)120 set_exier(uint32_t val) 121 121 { 122 122 asm volatile ("mtdcr 0x42,%0"::"r" (val));/*EXIER*/ … … 127 127 */ 128 128 RTEMS_INLINE_ROUTINE void 129 enable_ext_irq( u nsigned32mask)130 { 131 u nsigned32isrlvl;129 enable_ext_irq( uint32_t mask) 130 { 131 uint32_t isrlvl; 132 132 _CPU_ISR_Disable(isrlvl); 133 133 set_exier(get_exier() | ((mask)&PPC_EXI_MASK)); … … 139 139 */ 140 140 RTEMS_INLINE_ROUTINE void 141 disable_ext_irq( u nsigned32mask)142 { 143 u nsigned32isrlvl;141 disable_ext_irq( uint32_t mask) 142 { 143 uint32_t isrlvl; 144 144 _CPU_ISR_Disable(isrlvl); 145 145 set_exier(get_exier() & ~(mask) & PPC_EXI_MASK); … … 156 156 */ 157 157 void 158 ictrl_spurious_handler(u nsigned32spurious_mask,158 ictrl_spurious_handler(uint32_t spurious_mask, 159 159 CPU_Interrupt_frame *cpu_frame) 160 160 { … … 184 184 ictrl_isr(rtems_vector_number vector,CPU_Interrupt_frame *cpu_frame) 185 185 { 186 u nsigned32istat,186 uint32_t istat, 187 187 mask, 188 188 global_vec; … … 224 224 rtems_status_code 225 225 ictrl_set_vector(rtems_isr_entry new_handler, 226 u nsigned32vector,226 uint32_t vector, 227 227 rtems_isr_entry *old_handler 228 228 ) -
c/src/lib/libcpu/powerpc/ppc403/ictrl/ictrl.h
r35f97010 r66c373bf 79 79 rtems_status_code 80 80 ictrl_set_vector(rtems_isr_entry new_handler, 81 u nsigned32vector,81 uint32_t vector, 82 82 rtems_isr_entry *old_handler 83 83 ); -
c/src/lib/libcpu/powerpc/ppc403/timer/timer.c
r35f97010 r66c373bf 39 39 #include <rtems.h> 40 40 41 static volatile rtems_unsigned32Timer_starting;41 static volatile uint32_t Timer_starting; 42 42 static rtems_boolean Timer_driver_Find_average_overhead; 43 43 … … 45 45 * This is so small that this code will be reproduced where needed. 46 46 */ 47 static inline rtems_unsigned32get_itimer(void)47 static inline uint32_t get_itimer(void) 48 48 { 49 rtems_unsigned32ret;49 uint32_t ret; 50 50 51 51 #ifndef ppc405 … … 62 62 void Timer_initialize() 63 63 { 64 rtems_unsigned32iocr;64 uint32_t iocr; 65 65 66 66 #ifndef ppc405 … … 85 85 int Read_timer() 86 86 { 87 rtems_unsigned32clicks;88 rtems_unsigned32total;87 uint32_t clicks; 88 uint32_t total; 89 89 90 90 clicks = get_itimer(); -
c/src/lib/libcpu/powerpc/ppc403/tty_drv/tty_drv.c
r35f97010 r66c373bf 151 151 152 152 void 153 tty0BaudSet(u nsigned32baudrate)154 { 155 u nsigned32tmp;153 tty0BaudSet(uint32_t baudrate) 154 { 155 uint32_t tmp; 156 156 157 157 tmp = tty0_round( (double)rtems_cpu_configuration_get_serial_per_sec() / (baudrate * 16) ); -
c/src/lib/libcpu/powerpc/rtems/powerpc/cache.h
r35f97010 r66c373bf 13 13 #define _CPU_Data_Cache_Block_Flush( _address ) \ 14 14 do { register void *__address = (_address); \ 15 register u nsigned32_zero = 0; \15 register uint32_t _zero = 0; \ 16 16 asm volatile ( "dcbf %0,%1" : \ 17 17 "=r" (_zero), "=r" (__address) : \ … … 29 29 #define _CPU_Data_Cache_Block_Invalidate( _address ) \ 30 30 do { register void *__address = (_address); \ 31 register u nsigned32_zero = 0; \31 register uint32_t _zero = 0; \ 32 32 asm volatile ( "dcbi %0,%1" : \ 33 33 "=r" (_zero), "=r" (__address) : \ -
c/src/lib/libcpu/powerpc/shared/src/cache.c
r35f97010 r66c373bf 48 48 void ) 49 49 { 50 u nsigned32value;50 uint32_t value; 51 51 PPC_Get_HID0( value ); 52 52 value |= 0x00004000; /* set DCE bit */ … … 57 57 void ) 58 58 { 59 u nsigned32value;59 uint32_t value; 60 60 PPC_Get_HID0( value ); 61 61 value &= 0xFFFFBFFF; /* clear DCE bit */ … … 66 66 void ) 67 67 { 68 u nsigned32value;68 uint32_t value; 69 69 PPC_Get_HID0( value ); 70 70 value |= 0x00008000; /* Set ICE bit */ … … 75 75 void ) 76 76 { 77 u nsigned32value;77 uint32_t value; 78 78 PPC_Get_HID0( value ); 79 79 value &= 0xFFFF7FFF; /* Clear ICE bit */ … … 109 109 void _CPU_cache_enable_data ( void ) 110 110 { 111 u nsigned32r1;111 uint32_t r1; 112 112 r1 = (0x2<<24); 113 113 mtspr( 568, r1 ); … … 117 117 void _CPU_cache_disable_data ( void ) 118 118 { 119 u nsigned32r1;119 uint32_t r1; 120 120 r1 = (0x4<<24); 121 121 mtspr( 568, r1 ); … … 136 136 void _CPU_cache_enable_instruction ( void ) 137 137 { 138 u nsigned32r1;138 uint32_t r1; 139 139 r1 = (0x2<<24); 140 140 mtspr( 560, r1 ); … … 144 144 void _CPU_cache_disable_instruction ( void ) 145 145 { 146 u nsigned32r1;146 uint32_t r1; 147 147 r1 = (0x4<<24); 148 148 mtspr( 560, r1 );
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