Changeset 66c25d4 in rtems


Ignore:
Timestamp:
Mar 2, 2009, 5:03:05 PM (10 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.9
Children:
beda88f
Parents:
15fa865
Message:

2009-03-02 Ray Xu <rayx.cn@…>

PR 1380/bsps

  • include/bsp.h: Switch to English comments.
Location:
c/src/lib/libbsp/arm/rtl22xx
Files:
2 edited

Legend:

Unmodified
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  • c/src/lib/libbsp/arm/rtl22xx/ChangeLog

    r15fa865 r66c25d4  
     12009-03-02      Ray Xu <rayx.cn@gmail.com>
     2
     3        PR 1380/bsps
     4        * include/bsp.h: Switch to English comments.
     5
    162008-12-08      Ralf Corsépius <ralf.corsepius@rtems.org>
    27
  • c/src/lib/libbsp/arm/rtl22xx/include/bsp.h

    r15fa865 r66c25d4  
    3131/* cco = cclk*2*P       */
    3232
    33 #define LPC22xx_Fcclk   CONFIG_ARM_CLK  /* system clk frequecy,<=60Mhz, defined in system configuration */
     33/* system clk frequecy,<=60Mhz, defined in system configuration */
     34#define LPC22xx_Fcclk   CONFIG_ARM_CLK
    3435
    3536/* Fcco 156M~320Mhz*/
    36 #define LPC22xx_Fcclk   CONFIG_ARM_CLK  /* system clk frequecy,<=60Mhz, defined in system configuration */
     37/* system clk frequecy,<=60Mhz, defined in system configuration */
     38#define LPC22xx_Fcclk   CONFIG_ARM_CLK
    3739#define LPC22xx_Fcco    LPC22xx_Fcclk * 4
    38 #define LPC22xx_Fpclk   (LPC22xx_Fcclk /4) *1  /*VPB clk frequency,1,1/2,1/4 times of Fcclk */
     40/*VPB clk frequency,1,1/2,1/4 times of Fcclk */
     41#define LPC22xx_Fpclk   (LPC22xx_Fcclk /4) *1
    3942
    4043
     
    7780* help file
    7881*/
    79 /* ϵͳÉèÖÃ, Fosc¡¢Fcclk¡¢Fcco¡¢Fpclk±ØÐ붚Òå*/
    80 #define Fosc            11059200                    //Ÿ§ÕñƵÂÊ,10MHz~25MHz£¬ÓŠµ±ÓëʵŒÊÒ»ÖÁ
    81 #define Fcclk           (Fosc << 2)                  //ϵͳƵÂÊ£¬±ØÐëΪFoscµÄÕûÊý±¶(1~32)£¬ÇÒ<=60MHZ
    82 #define Fcco            (Fcclk <<2)                 //CCOƵÂÊ£¬±ØÐëΪFcclkµÄ2¡¢4¡¢8¡¢16±¶£¬·¶Î§Îª156MHz~320MHz
    83 #define Fpclk           (Fcclk >>2) * 1             //VPBʱÖÓƵÂÊ£¬Ö»ÄÜΪ(Fcclk / 4)µÄ1 ~ 4±¶
    84 #define M                Fcclk / Fosc;
    85 #define P_min         Fcco_MIN / (2*Fcclk) + 1;
    86 #define P_max        Fcco_MAX / (2*Fcclk);
     82/* System configure, Fosc Fcclk Fcco Fpclk must be defined*/
     83#define Fosc    11059200          // osc freq,10MHz~25MHz,
     84                                  //    change to real one if needed
     85#define Fcclk   (Fosc << 2)       //system freq 2^n time of  Fosc(1~32) <=60MHZ
     86#define Fcco    (Fcclk <<2)       //CCO freq 2,4,8,16 time of Fcclk 156MHz~320MHz
     87#define Fpclk   (Fcclk >>2) * 1   //VPB freq only(Fcclk / 4) 1~4
     88#define M       Fcclk / Fosc
     89#define P_min   Fcco_MIN / (2*Fcclk) + 1;
     90#define P_max   Fcco_MAX / (2*Fcclk);
    8791
    8892
     
    107111
    108112// Flash definition
    109 //#define FLASH_SIZE              (0x200000-FLASH_BOOT)   // Total area of Flash region in words 8 bit
    110 #define FLASH_SIZE              (0x80000-FLASH_BOOT)   // Total area of Flash region in words 8 bit
    111 //#define FLASH_SIZE              (0x80000-FLASH_BOOT)      // Total area of Flash region in words 8 bit
    112 #define FLASH_BEGIN             0x80000000
    113 #define FLASH_BASE              (FLASH_BEGIN+FLASH_BOOT)   //First 0x8000 bytes reserved for boot loader etc.
     113//#define FLASH_SIZE      (0x200000-FLASH_BOOT)   // Total area of Flash region in words 8 bit
     114#define FLASH_SIZE        (0x80000-FLASH_BOOT)   // Total area of Flash region in words 8 bit
     115//#define FLASH_SIZE      (0x80000-FLASH_BOOT)      // Total area of Flash region in words 8 bit
     116#define FLASH_BEGIN       0x80000000
     117#define FLASH_BASE        (FLASH_BEGIN+FLASH_BOOT)   //First 0x8000 bytes reserved for boot loader etc.
    114118
    115119// SRAM definition
    116 #define SRAM_SIZE               0x100000                  // Total area of Flash region in words 8 bit
    117 #define SRAM_BASE               0x81000000                //First 0x8000 bytes reserved for boot loader etc.
     120#define SRAM_SIZE         0x100000                  // Total area of Flash region in words 8 bit
     121#define SRAM_BASE         0x81000000                //First 0x8000 bytes reserved for boot loader etc.
    118122
    119123// CS8900A definition
    120 #define CS8900A_BASE            0x82000000                //
     124#define CS8900A_BASE      0x82000000
    121125// RTL8019AS definition
    122 #define RTL8019AS_BASE            0x82000000                //
     126#define RTL8019AS_BASE    0x82000000
    123127
    124128struct rtems_bsdnet_ifconfig;
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