Changeset 62fa1ea in rtems


Ignore:
Timestamp:
Apr 17, 2014, 9:19:48 AM (6 years ago)
Author:
Ralf Kirchner <ralf.kirchner@…>
Branches:
4.11, master
Children:
127634c
Parents:
1c62f74d
git-author:
Ralf Kirchner <ralf.kirchner@…> (04/17/14 09:19:48)
git-committer:
Sebastian Huber <sebastian.huber@…> (04/17/14 11:25:12)
Message:

bsp/arm: Add cache size methods

Add new methods which deliver the cache sizes of for supported cache levels.

Location:
c/src/lib/libbsp/arm/shared
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/arm/shared/arm-l2c-310/cache_.h

    r1c62f74d r62fa1ea  
    7474#define CPU_CACHE_SUPPORT_PROVIDES_RANGE_FUNCTIONS \
    7575  ARM_CACHE_L1_CPU_SUPPORT_PROVIDES_RANGE_FUNCTIONS
     76#define CPU_CACHE_SUPPORT_PROVIDES_CACHE_SIZE_FUNCTIONS
    7677
    7778#define CACHE_L2C_310_DATA_LINE_MASK ( CPU_DATA_CACHE_ALIGNMENT - 1 )
     
    12081209}
    12091210
     1211static inline size_t
     1212cache_l2c_310_get_cache_size( void )
     1213{
     1214  size_t         size       = 0;
     1215  volatile L2CC *l2cc       = (volatile L2CC *) BSP_ARM_L2CC_BASE;
     1216  uint32_t       cache_type = l2cc->cache_type;
     1217  uint32_t       way_size;
     1218  uint32_t       num_ways;
     1219 
     1220  way_size = (cache_type & CACHE_L2C_310_L2CC_TYPE_SIZE_D_WAYS_MASK)
     1221    >> CACHE_L2C_310_L2CC_TYPE_SIZE_D_WAYS_SHIFT;
     1222  num_ways = (cache_type & CACHE_L2C_310_L2CC_TYPE_NUM_D_WAYS_MASK)
     1223    >> CACHE_L2C_310_L2CC_TYPE_NUM_D_WAYS_SHIFT;
     1224
     1225  assert( way_size <= 0x07 );
     1226  assert( num_ways <= 0x01 );
     1227  if(  way_size <= 0x07 && num_ways <= 0x01 ) {
     1228    if( way_size == 0x00 ) {
     1229      way_size = 16 * 1024;
     1230    } else if( way_size == 0x07 ) {
     1231      way_size = 512 * 1024;
     1232    } else {
     1233      way_size = (1 << (way_size - 1)) * 16 * 1024;
     1234    }
     1235    switch( num_ways ) {
     1236      case 0:
     1237        num_ways = 8;
     1238        break;
     1239      case 1:
     1240        num_ways = 16;
     1241        break;
     1242      default:
     1243        num_ways = 0;
     1244        break;
     1245    }
     1246    size = way_size * num_ways;
     1247  }
     1248  return size;
     1249}
     1250
    12101251static void cache_l2c_310_unlock( void )
    12111252{
     
    15391580}
    15401581
     1582static inline size_t
     1583_CPU_cache_get_data_cache_size( const uint32_t level )
     1584{
     1585  size_t size = 0;
     1586 
     1587  switch( level )
     1588  {
     1589    case 0:
     1590      size = arm_cache_l1_get_data_cache_size();
     1591    break;
     1592    case 1:
     1593      size = cache_l2c_310_get_cache_size();
     1594    break;
     1595    default:
     1596      size = 0;
     1597    break;
     1598  }
     1599  return size;
     1600}
     1601
     1602static inline size_t
     1603_CPU_cache_get_instruction_cache_size( const uint32_t level )
     1604{
     1605  size_t size = 0;
     1606 
     1607  switch( level )
     1608  {
     1609    case 0:
     1610      size = arm_cache_l1_get_instruction_cache_size();
     1611      break;
     1612    case 1:
     1613      size = cache_l2c_310_get_cache_size();
     1614      break;
     1615    default:
     1616      size = 0;
     1617      break;
     1618  }
     1619  return size;
     1620}
     1621
     1622
    15411623/** @} */
    15421624
  • c/src/lib/libbsp/arm/shared/include/arm-cache-l1.h

    r1c62f74d r62fa1ea  
    464464}
    465465
     466static inline size_t arm_cache_l1_get_data_cache_size( void )
     467{
     468  size_t   size;
     469  uint32_t line_size     = 0;
     470  uint32_t associativity = 0;
     471  uint32_t num_sets      = 0;
     472  arm_cache_l1_properties( &line_size, &associativity,
     473                           &num_sets );
     474
     475  size = (1 << line_size) * associativity * num_sets;
     476
     477  return size;
     478}
     479
     480static inline size_t arm_cache_l1_get_instruction_cache_size( void )
     481{
     482  size_t   size;
     483  uint32_t line_size     = 0;
     484  uint32_t associativity = 0;
     485  uint32_t num_sets      = 0;
     486
     487  arm_cache_l1_select( ARM_CACHE_L1_CSS_ID_INSTRUCTION );
     488 
     489  arm_cache_l1_properties( &line_size, &associativity,
     490                           &num_sets );
     491 
     492  arm_cache_l1_select( ARM_CACHE_L1_CSS_ID_DATA );
     493
     494  size = (1 << line_size) * associativity * num_sets;
     495 
     496  return size;
     497}
     498
    466499#ifdef __cplusplus
    467500}
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