Changeset 62f373fb in rtems


Ignore:
Timestamp:
Aug 11, 2014, 8:02:13 AM (5 years ago)
Author:
Daniel Cederman <cederman@…>
Branches:
4.11, master
Children:
ddbc3f8d
Parents:
bba83e5
git-author:
Daniel Cederman <cederman@…> (08/11/14 08:02:13)
git-committer:
Daniel Hellstrom <daniel@…> (08/22/14 11:10:59)
Message:

bsp/sparc: Flush only instruction cache

The flush instruction on LEON flushes both the data and the instruction
cache. Flushing of just the instruction cache can be done by setting
the "flush instruction cache" bit in the cache control register.

Location:
c/src/lib/libbsp/sparc/leon3/include
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/sparc/leon3/include/cache_.h

    rbba83e5 r62f373fb  
    135135static inline void _CPU_cache_invalidate_entire_instruction(void)
    136136{
    137   __asm__ volatile ("flush");
     137  uint32_t cache_reg = leon3_get_cache_control_register();
     138
     139  cache_reg |= LEON3_REG_CACHE_CTRL_FI;
     140  leon3_set_cache_control_register(cache_reg);
    138141}
    139142
  • c/src/lib/libbsp/sparc/leon3/include/leon.h

    rbba83e5 r62f373fb  
    8686#define LEON_REG_TIMER_CONTROL_LD    0x00000004  /* 1 = load counter */
    8787                                              /* 0 = no function */
     88
     89/*
     90 *  The following defines the bits in the LEON Cache Control Register.
     91 */
     92#define LEON3_REG_CACHE_CTRL_FI      0x00200000 /* Flush instruction cache */
    8893
    8994/* LEON3 Interrupt Controller */
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