Changeset 61bd0301 in rtems for c/src/lib/libcpu/powerpc/mpc8xx


Ignore:
Timestamp:
Jun 14, 2000, 3:52:24 PM (21 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
ac815430
Parents:
e4d7169f
Message:

Moved PowerPC cache management code to libcpu. Also compiled
mpc8xx libcpu support for the first time and remove includes
of bsp.h, references to BSP_Configuration, and Cpu_table. All
of these can be obtained directly from RTEMS now.

Location:
c/src/lib/libcpu/powerpc/mpc8xx
Files:
8 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libcpu/powerpc/mpc8xx/clock/clock.c

    re4d7169f r61bd0301  
    3737 */
    3838
    39 #include <bsp.h>
     39#include <rtems.h>
    4040#include <clockdrv.h>
    4141#include <rtems/libio.h>
     
    4343#include <stdlib.h>                     /* for atexit() */
    4444#include <mpc8xx.h>
    45 
    46 extern rtems_cpu_table           Cpu_table;             /* owned by BSP */
    4745
    4846volatile rtems_unsigned32 Clock_driver_ticks;
     
    7977  Clock_driver_ticks = 0;
    8078 
    81   pit_value = (BSP_Configuration.microseconds_per_tick *
    82                Cpu_table.clicks_per_usec) - 1 ;
     79  pit_value = (rtems_configuration_get_microseconds_per_tick() *
     80               rtems_cpu_configuration_get_clicks_per_usec()) - 1 ;
    8381 
    8482  if (pit_value > 0xffff) {           /* pit is only 16 bits long */
    8583    rtems_fatal_error_occurred(-1);
    8684  } 
    87   if (BSP_Configuration.ticks_per_timeslice) {
    88    
    89     /*
    90      * initialize the interval here
    91      * First tick is set to right amount of time in the future
    92      * Future ticks will be incremented over last value set
    93      * in order to provide consistent clicks in the face of
    94      * interrupt overhead
    95      */
    96    
    97     rtems_interrupt_catch(clock_isr, PPC_IRQ_LVL0, &previous_isr);
    98    
    99     m8xx.sccr &= ~(1<<24);
    100     m8xx.pitc = pit_value;
    101    
    102     /* set PIT irq level, enable PIT, PIT interrupts */
    103     /*  and clear int. status */
    104     m8xx.piscr = M8xx_PISCR_PIRQ(0) |
    105       M8xx_PISCR_PTE | M8xx_PISCR_PS | M8xx_PISCR_PIE;
     85
     86  /*
     87   * initialize the interval here
     88   * First tick is set to right amount of time in the future
     89   * Future ticks will be incremented over last value set
     90   * in order to provide consistent clicks in the face of
     91   * interrupt overhead
     92   */
     93 
     94  rtems_interrupt_catch(clock_isr, PPC_IRQ_LVL0, &previous_isr);
     95 
     96  m8xx.sccr &= ~(1<<24);
     97  m8xx.pitc = pit_value;
     98 
     99  /* set PIT irq level, enable PIT, PIT interrupts */
     100  /*  and clear int. status */
     101  m8xx.piscr = M8xx_PISCR_PIRQ(0) |
     102    M8xx_PISCR_PTE | M8xx_PISCR_PS | M8xx_PISCR_PIE;
    106103   
    107104#ifdef EPPCBUG_SMC1
    108     simask_copy = m8xx.simask | M8xx_SIMASK_LVM0;
     105  simask_copy = m8xx.simask | M8xx_SIMASK_LVM0;
    109106#endif /* EPPCBUG_SMC1 */
    110     m8xx.simask |= M8xx_SIMASK_LVM0;
    111   }
     107  m8xx.simask |= M8xx_SIMASK_LVM0;
    112108  atexit(Clock_exit);
    113109}
     
    134130Clock_exit(void)
    135131{
    136   if ( BSP_Configuration.ticks_per_timeslice ) {
    137     /* disable PIT and PIT interrupts */
    138     m8xx.piscr &= ~(M8xx_PISCR_PTE | M8xx_PISCR_PIE);
    139    
    140     (void) set_vector(0, PPC_IRQ_LVL0, 1);
    141   }
     132  /* disable PIT and PIT interrupts */
     133  m8xx.piscr &= ~(M8xx_PISCR_PTE | M8xx_PISCR_PIE);
     134 
     135  (void) set_vector(0, PPC_IRQ_LVL0, 1);
    142136}
    143137
  • c/src/lib/libcpu/powerpc/mpc8xx/console-generic/console-generic.c

    re4d7169f r61bd0301  
    4747 */
    4848
    49 #include <bsp.h>
     49#include <rtems.h>
    5050#include <rtems/libio.h>
    5151#include <mpc8xx.h>
    5252#include <mpc8xx/console.h>
     53#include <mpc8xx/cpm.h>
    5354#include <stdlib.h>
    5455#include <unistd.h>
     
    400401    if ((RxBd[SCC2_MINOR]->status & M8xx_BD_EMPTY) == 0) {
    401402      rtems_invalidate_multiple_data_cache_lines(
    402         RxBd[SCC2_MINOR]->buffer,
     403        (const void *) RxBd[SCC2_MINOR]->buffer,
    403404        RxBd[SCC2_MINOR]->length );
    404405      nb_overflow = rtems_termios_enqueue_raw_characters(
     
    443444    if ((RxBd[SCC3_MINOR]->status & M8xx_BD_EMPTY) == 0) {
    444445      rtems_invalidate_multiple_data_cache_lines(
    445         RxBd[SCC3_MINOR]->buffer,
     446        (const void *) RxBd[SCC3_MINOR]->buffer,
    446447        RxBd[SCC3_MINOR]->length );
    447448      nb_overflow = rtems_termios_enqueue_raw_characters(
     
    485486    if ((RxBd[SCC4_MINOR]->status & M8xx_BD_EMPTY) == 0) {
    486487      rtems_invalidate_multiple_data_cache_lines(
    487         RxBd[SCC4_MINOR]->buffer,
     488        (const void *) RxBd[SCC4_MINOR]->buffer,
    488489        RxBd[SCC4_MINOR]->length );
    489490      nb_overflow = rtems_termios_enqueue_raw_characters(
     
    527528    if ((RxBd[SMC1_MINOR]->status & M8xx_BD_EMPTY) == 0) {
    528529      rtems_invalidate_multiple_data_cache_lines(
    529         RxBd[SMC1_MINOR]->buffer,
     530        (const void *) RxBd[SMC1_MINOR]->buffer,
    530531        RxBd[SMC1_MINOR]->length );
    531532      nb_overflow = rtems_termios_enqueue_raw_characters(
     
    569570    if ((RxBd[SMC2_MINOR]->status & M8xx_BD_EMPTY) == 0) {
    570571      rtems_invalidate_multiple_data_cache_lines(
    571         RxBd[SMC2_MINOR]->buffer,
     572        (const void *) RxBd[SMC2_MINOR]->buffer,
    572573        RxBd[SMC2_MINOR]->length );
    573574      nb_overflow = rtems_termios_enqueue_raw_characters(
     
    984985    return -1;
    985986  }
    986   _CPU_Data_Cache_Block_Invalidate( RxBd[minor]->buffer );
     987  rtems_invalidate_multiple_data_cache_lines(
     988    (const void *) RxBd[minor]->buffer,
     989    RxBd[minor]->length
     990  );
    987991  c = ((char *)RxBd[minor]->buffer)[0];
    988992  RxBd[minor]->status = M8xx_BD_EMPTY | M8xx_BD_WRAP;
     
    10201024      continue;
    10211025    txBuf[minor] = *buf++;
    1022     _CPU_Data_Cache_Block_Flush( &txBuf[minor] );
     1026    rtems_flush_multiple_data_cache_lines(
     1027       (const void *) TxBd[minor]->buffer,
     1028       TxBd[minor]->length
     1029    );
    10231030    TxBd[minor]->buffer = &txBuf[minor];
    10241031    TxBd[minor]->length = 1;
  • c/src/lib/libcpu/powerpc/mpc8xx/cpm/cp.c

    re4d7169f r61bd0301  
    1313 */
    1414
    15 #include <bsp.h>
    16 #include <rtems/rtems/intr.h>
    17 #include <rtems/error.h>
     15#include <rtems.h>
     16#include <mpc8xx.h>
     17#include <mpc8xx/cpm.h>
    1818
    1919/*
    2020 * Send a command to the CPM RISC processer
    2121 */
     22
    2223void m8xx_cp_execute_cmd( unsigned16 command )
    2324{
  • c/src/lib/libcpu/powerpc/mpc8xx/cpm/dpram.c

    re4d7169f r61bd0301  
    1414 */
    1515
    16 #include <bsp.h>
    17 #include <rtems/rtems/intr.h>
    18 #include <rtems/error.h>
     16#include <rtems.h>
     17#include <mpc8xx.h>
     18#include <mpc8xx/cpm.h>
    1919
    2020/*
  • c/src/lib/libcpu/powerpc/mpc8xx/include/cpm.h

    re4d7169f r61bd0301  
    1919#endif
    2020
    21 #include <bsp.h>
    22 
    2321/* Functions */
    2422
  • c/src/lib/libcpu/powerpc/mpc8xx/include/mmu.h

    re4d7169f r61bd0301  
    1818extern "C" {
    1919#endif
    20 
    21 #include <bsp.h>
    2220
    2321/*
  • c/src/lib/libcpu/powerpc/mpc8xx/mmu/mmu.c

    re4d7169f r61bd0301  
    1212 */
    1313
    14 #include <bsp.h>
     14#include <rtems.h>
     15#include <mpc8xx.h>
    1516#include <mpc8xx/mmu.h>
    1617
  • c/src/lib/libcpu/powerpc/mpc8xx/timer/timer.c

    re4d7169f r61bd0301  
    4444 */
    4545
    46 #include <bsp.h>
    4746#include <rtems.h>
    4847#include <mpc8xx.h>
    49 
    50 extern rtems_cpu_table           Cpu_table;             /* owned by BSP */
    5148
    5249static volatile rtems_unsigned32 Timer_starting;
     
    8784
    8885  else {
    89     if ( total < Cpu_table.timer_least_valid ) {
     86    if ( total < rtems_cpu_configuration_get_timer_least_valid() ) {
    9087      return 0;            /* below timer resolution */
    9188    }
    92     return (total - Cpu_table.timer_average_overhead);
     89    return (total - rtems_cpu_configuration_get_timer_average_overhead());
    9390  }
    9491}
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