Changeset 5f91272 in rtems


Ignore:
Timestamp:
Jun 20, 2013, 9:17:23 AM (7 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
4.11, 5, master
Children:
ade27c6
Parents:
6520aef1
git-author:
Sebastian Huber <sebastian.huber@…> (06/20/13 09:17:23)
git-committer:
Sebastian Huber <sebastian.huber@…> (06/21/13 08:26:09)
Message:

bsps/powerpc: Delete bsp_exceptions_in_RAM

Delete ppc_exc_vector_base. Add and use
ppc_exc_initialize_with_vector_base().

Location:
c/src/lib
Files:
9 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/powerpc/mpc55xxevb/startup/bspstart.c

    r6520aef1 r5f91272  
    106106
    107107        /* Initialize exceptions */
    108         ppc_exc_vector_base = (uint32_t) mpc55xx_exc_vector_base;
    109         ppc_exc_initialize(
     108        ppc_exc_initialize_with_vector_base(
    110109                PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
    111                 (uintptr_t) bsp_section_work_begin,
    112                 rtems_configuration_get_interrupt_stack_size()
     110                (uintptr_t) bsp_section_work_begin,
     111                rtems_configuration_get_interrupt_stack_size(),
     112                mpc55xx_exc_vector_base
    113113        );
    114114        #ifndef PPC_EXC_CONFIG_USE_FIXED_HANDLER
  • c/src/lib/libbsp/powerpc/psim/startup/bspstart.c

    r6520aef1 r5f91272  
    9595
    9696  /*
    97    *  The simulator likes the exception table to be at 0xfff00000.
    98    */
    99   bsp_exceptions_in_RAM = FALSE;
    100 
    101   /*
    10297   * Initialize default raw exception handlers.
    10398   */
    104   ppc_exc_initialize(
     99  ppc_exc_initialize_with_vector_base(
    105100    PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
    106101    (uintptr_t) bsp_section_work_begin,
    107     rtems_configuration_get_interrupt_stack_size()
     102    rtems_configuration_get_interrupt_stack_size(),
     103    (void *) 0xfff00000
    108104  );
    109105
  • c/src/lib/libbsp/powerpc/qoriq/startup/bspstart.c

    r6520aef1 r5f91272  
    108108
    109109  /* Initialize exception handler */
    110   ppc_exc_vector_base = (uint32_t) bsp_exc_vector_base;
    111   ppc_exc_initialize(
     110  ppc_exc_initialize_with_vector_base(
    112111    PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
    113112    (uintptr_t) bsp_section_work_begin,
    114     rtems_configuration_get_interrupt_stack_size()
     113    rtems_configuration_get_interrupt_stack_size(),
     114    bsp_exc_vector_base
    115115  );
    116116
  • c/src/lib/libbsp/powerpc/qoriq/startup/smp.c

    r6520aef1 r5f91272  
    118118
    119119  /* Initialize exception handler */
    120   ppc_exc_vector_base = (uint32_t) bsp_exc_vector_base;
    121   ppc_exc_initialize(
     120  ppc_exc_initialize_with_vector_base(
    122121    PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
    123122    (uintptr_t) _Per_CPU_Information[1].interrupt_stack_low,
    124     rtems_configuration_get_interrupt_stack_size()
     123    rtems_configuration_get_interrupt_stack_size(),
     124    bsp_exc_vector_base
    125125  );
    126126
  • c/src/lib/libbsp/powerpc/t32mppc/startup/bspstart.c

    r6520aef1 r5f91272  
    6565
    6666  /* Initialize exception handler */
    67   ppc_exc_vector_base = (uint32_t) bsp_exc_vector_base;
    68   ppc_exc_initialize(
     67  ppc_exc_initialize_with_vector_base(
    6968    PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
    7069    (uintptr_t) bsp_section_work_begin,
    71     rtems_configuration_get_interrupt_stack_size()
     70    rtems_configuration_get_interrupt_stack_size(),
     71    bsp_exc_vector_base
    7272  );
    7373
  • c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_address.c

    r6520aef1 r5f91272  
    3131#include <bsp/vectors.h>
    3232
    33 bool bsp_exceptions_in_RAM = true;
    34 
    35 uint32_t ppc_exc_vector_base = 0;
    36 
    3733/*
    3834 * XXX: These values are choosen to directly generate the vector offsets for an
     
    6258};
    6359
    64 void *ppc_exc_vector_address(unsigned vector)
     60void *ppc_exc_vector_address(unsigned vector, void *vector_base)
    6561{
    66   uintptr_t vector_base = 0xfff00000;
    6762  uintptr_t vector_offset = vector << 8;
    6863
     
    10297  }
    10398
    104   if (bsp_exceptions_in_RAM) {
    105     vector_base = ppc_exc_vector_base;
    106   }
    107 
    108   return (void *) (vector_base + vector_offset);
     99  return (void *) ((uintptr_t) vector_base + vector_offset);
    109100}
  • c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_initialize.c

    r6520aef1 r5f91272  
    101101#define MTIVOR(x, vec) __asm__ volatile ("mtivor"#x" %0" : : "r" (vec))
    102102
    103 static void ppc_exc_initialize_booke(void)
     103static void ppc_exc_initialize_booke(void *vector_base)
    104104{
    105105  /* Interupt vector prefix register */
    106   MTIVPR(ppc_exc_vector_base);
     106  MTIVPR((uint32_t) vector_base);
    107107
    108108  if (
     
    118118
    119119  /* Interupt vector offset registers */
    120   MTIVOR(0,  ppc_exc_vector_address(ASM_BOOKE_CRIT_VECTOR));
    121   MTIVOR(1,  ppc_exc_vector_address(ASM_MACH_VECTOR));
    122   MTIVOR(2,  ppc_exc_vector_address(ASM_PROT_VECTOR));
    123   MTIVOR(3,  ppc_exc_vector_address(ASM_ISI_VECTOR));
    124   MTIVOR(4,  ppc_exc_vector_address(ASM_EXT_VECTOR));
    125   MTIVOR(5,  ppc_exc_vector_address(ASM_ALIGN_VECTOR));
    126   MTIVOR(6,  ppc_exc_vector_address(ASM_PROG_VECTOR));
    127   MTIVOR(7,  ppc_exc_vector_address(ASM_FLOAT_VECTOR));
    128   MTIVOR(8,  ppc_exc_vector_address(ASM_SYS_VECTOR));
    129   MTIVOR(9,  ppc_exc_vector_address(ASM_BOOKE_APU_VECTOR));
    130   MTIVOR(10, ppc_exc_vector_address(ASM_BOOKE_DEC_VECTOR));
    131   MTIVOR(11, ppc_exc_vector_address(ASM_BOOKE_FIT_VECTOR));
    132   MTIVOR(12, ppc_exc_vector_address(ASM_BOOKE_WDOG_VECTOR));
    133   MTIVOR(13, ppc_exc_vector_address(ASM_BOOKE_DTLBMISS_VECTOR));
    134   MTIVOR(14, ppc_exc_vector_address(ASM_BOOKE_ITLBMISS_VECTOR));
    135   MTIVOR(15, ppc_exc_vector_address(ASM_BOOKE_DEBUG_VECTOR));
     120  MTIVOR(0,  ppc_exc_vector_address(ASM_BOOKE_CRIT_VECTOR, vector_base));
     121  MTIVOR(1,  ppc_exc_vector_address(ASM_MACH_VECTOR, vector_base));
     122  MTIVOR(2,  ppc_exc_vector_address(ASM_PROT_VECTOR, vector_base));
     123  MTIVOR(3,  ppc_exc_vector_address(ASM_ISI_VECTOR, vector_base));
     124  MTIVOR(4,  ppc_exc_vector_address(ASM_EXT_VECTOR, vector_base));
     125  MTIVOR(5,  ppc_exc_vector_address(ASM_ALIGN_VECTOR, vector_base));
     126  MTIVOR(6,  ppc_exc_vector_address(ASM_PROG_VECTOR, vector_base));
     127  MTIVOR(7,  ppc_exc_vector_address(ASM_FLOAT_VECTOR, vector_base));
     128  MTIVOR(8,  ppc_exc_vector_address(ASM_SYS_VECTOR, vector_base));
     129  MTIVOR(9,  ppc_exc_vector_address(ASM_BOOKE_APU_VECTOR, vector_base));
     130  MTIVOR(10, ppc_exc_vector_address(ASM_BOOKE_DEC_VECTOR, vector_base));
     131  MTIVOR(11, ppc_exc_vector_address(ASM_BOOKE_FIT_VECTOR, vector_base));
     132  MTIVOR(12, ppc_exc_vector_address(ASM_BOOKE_WDOG_VECTOR, vector_base));
     133  MTIVOR(13, ppc_exc_vector_address(ASM_BOOKE_DTLBMISS_VECTOR, vector_base));
     134  MTIVOR(14, ppc_exc_vector_address(ASM_BOOKE_ITLBMISS_VECTOR, vector_base));
     135  MTIVOR(15, ppc_exc_vector_address(ASM_BOOKE_DEBUG_VECTOR, vector_base));
    136136  if (ppc_cpu_is_e200() || ppc_cpu_is_e500()) {
    137     MTIVOR(32, ppc_exc_vector_address(ASM_E500_SPE_UNAVAILABLE_VECTOR));
    138     MTIVOR(33, ppc_exc_vector_address(ASM_E500_EMB_FP_DATA_VECTOR));
    139     MTIVOR(34, ppc_exc_vector_address(ASM_E500_EMB_FP_ROUND_VECTOR));
     137    MTIVOR(32, ppc_exc_vector_address(ASM_E500_SPE_UNAVAILABLE_VECTOR, vector_base));
     138    MTIVOR(33, ppc_exc_vector_address(ASM_E500_EMB_FP_DATA_VECTOR, vector_base));
     139    MTIVOR(34, ppc_exc_vector_address(ASM_E500_EMB_FP_ROUND_VECTOR, vector_base));
    140140  }
    141141  if (ppc_cpu_is_specific_e200(PPC_e200z7) || ppc_cpu_is_e500()) {
    142     MTIVOR(35, ppc_exc_vector_address(ASM_E500_PERFMON_VECTOR));
     142    MTIVOR(35, ppc_exc_vector_address(ASM_E500_PERFMON_VECTOR, vector_base));
    143143  }
    144144}
     
    152152}
    153153
    154 void ppc_exc_initialize(
     154void ppc_exc_initialize_with_vector_base(
    155155  uint32_t interrupt_disable_mask,
    156156  uintptr_t interrupt_stack_begin,
    157   uintptr_t interrupt_stack_size
     157  uintptr_t interrupt_stack_size,
     158  void *vector_base
    158159)
    159160{
     
    209210
    210211  if (ppc_cpu_is_bookE() == PPC_BOOKE_STD || ppc_cpu_is_bookE() == PPC_BOOKE_E500) {
    211     ppc_exc_initialize_booke();
     212    ppc_exc_initialize_booke(vector_base);
    212213  }
    213214
     
    216217
    217218    if (category != PPC_EXC_INVALID) {
    218       void *const vector_address = ppc_exc_vector_address(vector);
     219      void *const vector_address = ppc_exc_vector_address(vector, vector_base);
    219220      uint32_t prologue [16];
    220221      size_t prologue_size = sizeof(prologue);
    221222
    222       sc = ppc_exc_make_prologue(vector, category, prologue, &prologue_size);
     223      sc = ppc_exc_make_prologue(
     224        vector,
     225        vector_base,
     226        category,
     227        prologue,
     228        &prologue_size
     229      );
    223230      if (sc != RTEMS_SUCCESSFUL) {
    224231        ppc_exc_fatal_error();
  • c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/ppc_exc_prologue.c

    r6520aef1 r5f91272  
    6464static bool ppc_exc_create_branch_op(
    6565  unsigned vector,
     66  void *vector_base,
    6667  uint32_t *prologue,
    6768  size_t prologue_size
     
    7374  static const uintptr_t BRANCH_OP_MSK = 0x3ffffff;
    7475  size_t branch_op_index = prologue_size / 4 - 1;
    75   uintptr_t vector_address = (uintptr_t) ppc_exc_vector_address(vector);
     76  uintptr_t vector_address =
     77    (uintptr_t) ppc_exc_vector_address(vector, vector_base);
    7678  uintptr_t branch_op_address = vector_address + 4 * branch_op_index;
    7779
     
    102104rtems_status_code ppc_exc_make_prologue(
    103105  unsigned vector,
     106  void *vector_base,
    104107  ppc_exc_category category,
    105108  uint32_t *prologue,
     
    153156    memcpy(prologue, prologue_template, prologue_template_size);
    154157
    155     if (!ppc_exc_create_branch_op(vector, prologue, prologue_template_size)) {
     158    if (
     159      !ppc_exc_create_branch_op(
     160        vector,
     161        vector_base,
     162        prologue,
     163        prologue_template_size
     164      )
     165    ) {
    156166      return RTEMS_INVALID_ADDRESS;
    157167    }
  • c/src/lib/libcpu/powerpc/new-exceptions/bspsupport/vectors.h

    r6520aef1 r5f91272  
    304304
    305305/**
    306  * @brief Indicates if exception entry table resides in a writable memory.
    307  *
    308  * This variable is initialized to 'TRUE' by default;
    309  * BSPs which have their vectors in ROM should set it
    310  * to FALSE prior to initializing raw exceptions.
    311  *
    312  * I suspect the only candidate is the simulator.
    313  * After all, the value of this variable is used to
    314  * determine where to install the prologue code and
    315  * installing to ROM on anyting that's real ROM
    316  * will fail anyways.
    317  *
    318  * This should probably go away... (T.S. 2007/11/30)
    319  */
    320 extern bool bsp_exceptions_in_RAM;
    321 
    322 /**
    323  * @brief Vector base address for CPUs (for example e200 and e500) with IVPR
    324  * and IVOR registers.
    325  */
    326 extern uint32_t ppc_exc_vector_base;
    327 
    328 /**
    329  * @brief Returns the entry address of the vector @a vector.
    330  */
    331 void *ppc_exc_vector_address(unsigned vector);
     306 * @brief Returns the entry address of the vector.
     307 *
     308 * @param[in] vector The vector number.
     309 * @param[in] vector_base The vector table base address.
     310 */
     311void *ppc_exc_vector_address(unsigned vector, void *vector_base);
    332312
    333313/**
     
    359339 * @a category.
    360340 *
    361  * The minimal prologue will be copied to @a prologue.  Not more than @a
    362  * prologue_size bytes will be copied.  Returns the actual minimal prologue
     341 * The minimal prologue will be copied to @a prologue.  Not more than
     342 * @a prologue_size bytes will be copied.  Returns the actual minimal prologue
    363343 * size in bytes in @a prologue_size.
    364344 *
     
    370350rtems_status_code ppc_exc_make_prologue(
    371351  unsigned vector,
     352  void *vector_base,
    372353  ppc_exc_category category,
    373354  uint32_t *prologue,
    374355  size_t *prologue_size
     356);
     357
     358/**
     359 * @brief Initializes the exception handling.
     360 *
     361 * @see ppc_exc_initialize().
     362 */
     363void ppc_exc_initialize_with_vector_base(
     364  uint32_t interrupt_disable_mask,
     365  uintptr_t interrupt_stack_begin,
     366  uintptr_t interrupt_stack_size,
     367  void *vector_base
    375368);
    376369
     
    388381 * - the minimal prologue creation failed.
    389382 */
    390 void ppc_exc_initialize(
     383static inline void ppc_exc_initialize(
    391384  uint32_t interrupt_disable_mask,
    392385  uintptr_t interrupt_stack_begin,
    393386  uintptr_t interrupt_stack_size
    394 );
     387)
     388{
     389  ppc_exc_initialize_with_vector_base(
     390    interrupt_disable_mask,
     391    interrupt_stack_begin,
     392    interrupt_stack_size,
     393    NULL
     394  );
     395}
    395396
    396397/**
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