Changeset 5ef4fae in rtems


Ignore:
Timestamp:
Aug 1, 1998, 2:40:51 PM (22 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
906577f4
Parents:
f177865
Message:

Merged patch from David Fiddes <D.J.Fiddes@…> to add ColdFire?
specific register macros and correct code in rtems.s.

Files:
4 edited

Legend:

Unmodified
Added
Removed
  • c/src/exec/score/cpu/m68k/asm.h

    rf177865 r5ef4fae  
    8989#define vbr REG (vbr)
    9090#define dfc REG (dfc)
    91 #define sfc REG(sfc)
     91#define sfc REG (sfc)
     92
     93/* mcf52xx special regs */
     94#define cacr    REG (cacr)
     95#define acr0    REG (acr0)
     96#define acr1    REG (acr1)
     97#define rambar0 REG (rambar0)
     98#define mbar    REG (mbar)
     99
    92100
    93101#define fp0 REG (fp0)
  • c/src/exec/score/cpu/m68k/rtems.s

    rf177865 r5ef4fae  
    4040        lsll      #2, d0
    4141        addal     d0, a0
     42
     43#if (M68K_COLDFIRE_ARCH == 0)
    4244        moveal    @(a0),a0
    4345        jmpl      @(a0)
     46#else
     47        moveal    (a0),a0
     48        jmpl      (a0)
     49#endif
    4450
    4551        END_CODE
  • cpukit/score/cpu/m68k/asm.h

    rf177865 r5ef4fae  
    8989#define vbr REG (vbr)
    9090#define dfc REG (dfc)
    91 #define sfc REG(sfc)
     91#define sfc REG (sfc)
     92
     93/* mcf52xx special regs */
     94#define cacr    REG (cacr)
     95#define acr0    REG (acr0)
     96#define acr1    REG (acr1)
     97#define rambar0 REG (rambar0)
     98#define mbar    REG (mbar)
     99
    92100
    93101#define fp0 REG (fp0)
  • cpukit/score/cpu/m68k/rtems/asm.h

    rf177865 r5ef4fae  
    8989#define vbr REG (vbr)
    9090#define dfc REG (dfc)
    91 #define sfc REG(sfc)
     91#define sfc REG (sfc)
     92
     93/* mcf52xx special regs */
     94#define cacr    REG (cacr)
     95#define acr0    REG (acr0)
     96#define acr1    REG (acr1)
     97#define rambar0 REG (rambar0)
     98#define mbar    REG (mbar)
     99
    92100
    93101#define fp0 REG (fp0)
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