Changeset 5ef4fae in rtems

Timestamp:

Aug 1, 1998, 2:40:51 PM (22 years ago)

Author:

Joel Sherrill <joel.sherrill@…>

Branches:

4.10, 4.11, 4.8, 4.9, 5, master

Children:

906577f4

Parents:

f177865

Message:

Merged patch from David Fiddes <D.J.Fiddes@…> to add ColdFire?
specific register macros and correct code in rtems.s.

Files:

• c/src/exec/score/cpu/m68k/asm.h (modified) (1 diff)
• c/src/exec/score/cpu/m68k/rtems.s (modified) (1 diff)
• cpukit/score/cpu/m68k/asm.h (modified) (1 diff)
• cpukit/score/cpu/m68k/rtems/asm.h (modified) (1 diff)

c/src/exec/score/cpu/m68k/asm.h

@@ -89 +89 @@
 #define vbr REG (vbr)
 #define dfc REG (dfc)
-#define sfc REG(sfc)
+#define sfc REG (sfc)
+
+/* mcf52xx special regs */
+#define cacr    REG (cacr)
+#define acr0    REG (acr0)
+#define acr1    REG (acr1)
+#define rambar0 REG (rambar0)
+#define mbar    REG (mbar)
+
 
 #define fp0 REG (fp0)

c/src/exec/score/cpu/m68k/rtems.s

@@ -40 +40 @@
         lsll      #2, d0
         addal     d0, a0
+
+#if (M68K_COLDFIRE_ARCH == 0)
         moveal    @(a0),a0
         jmpl      @(a0)
+#else
+        moveal    (a0),a0
+        jmpl      (a0)
+#endif
 
         END_CODE

cpukit/score/cpu/m68k/asm.h

@@ -89 +89 @@
 #define vbr REG (vbr)
 #define dfc REG (dfc)
-#define sfc REG(sfc)
+#define sfc REG (sfc)
+
+/* mcf52xx special regs */
+#define cacr    REG (cacr)
+#define acr0    REG (acr0)
+#define acr1    REG (acr1)
+#define rambar0 REG (rambar0)
+#define mbar    REG (mbar)
+
 
 #define fp0 REG (fp0)

cpukit/score/cpu/m68k/rtems/asm.h

@@ -89 +89 @@
 #define vbr REG (vbr)
 #define dfc REG (dfc)
-#define sfc REG(sfc)
+#define sfc REG (sfc)
+
+/* mcf52xx special regs */
+#define cacr    REG (cacr)
+#define acr0    REG (acr0)
+#define acr1    REG (acr1)
+#define rambar0 REG (rambar0)
+#define mbar    REG (mbar)
+
 
 #define fp0 REG (fp0)