Changeset 5eb50f3 in rtems


Ignore:
Timestamp:
Apr 20, 2011, 8:20:17 PM (10 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.11, 5, master
Children:
cb4c90b2
Parents:
ca11004d
Message:

2011-04-20 Rohan Kangralkar <rkangral@…>

PR 1781/bsps

  • console/console-io.c: The UART RX and TX are different ISR now. So the array containing the registeration changes. The change is due to change in the libcup uart function.
Location:
c/src/lib/libbsp/bfin/bf537Stamp
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/bfin/bf537Stamp/ChangeLog

    rca11004d r5eb50f3  
     12011-04-20  Rohan Kangralkar <rkangral@ece.neu.edu>
     2
     3        PR 1781/bsps
     4        * console/console-io.c: The UART RX and TX are different ISR
     5        now. So the array containing the registeration changes. The
     6        change is due to change in the libcup uart function.
     7
    182011-02-15      Joel Sherrill <joel.sherrill@oarcorp.com>
    29
  • c/src/lib/libbsp/bfin/bf537Stamp/console/console.c

    rca11004d r5eb50f3  
    2727
    2828static bfin_uart_channel_t channels[] = {
    29   {"/dev/console",
    30    (char *) UART0_BASE_ADDRESS,
    31    CONSOLE_USE_INTERRUPTS,
    32 #ifdef CONSOLE_FORCE_BAUD
    33    CONSOLE_FORCE_BAUD,
    34 #else
    35    0,
    36 #endif
    37    NULL,
    38    0}
     29    {"/dev/console",
     30     UART0_BASE_ADDRESS,
     31     0,
     32     0,
     33     CONSOLE_USE_INTERRUPTS,
     34     0,
     35  #ifdef CONSOLE_FORCE_BAUD
     36     CONSOLE_FORCE_BAUD,
     37  #else
     38     0,
     39  #endif
     40     NULL,
     41     0,
     42     0}
     43  };
    3944
    4045#if (!BFIN_ON_SKYEYE)
     
    5762#if CONSOLE_USE_INTERRUPTS
    5863static bfin_isr_t bfinUARTISRs[] = {
    59   {SIC_DMA8_UART0_RX_VECTOR, bfin_uart_isr, 0, 0, NULL},
    60   {SIC_DMA10_UART1_RX_VECTOR, bfin_uart_isr, 0, 0, NULL},
    61   {SIC_DMA9_UART0_TX_VECTOR, bfin_uart_isr, 0, 0, NULL},
    62   {SIC_DMA11_UART1_TX_VECTOR, bfin_uart_isr, 0, 0, NULL}
     64  {SIC_DMA8_UART0_RX_VECTOR, bfinUart_rxIsr, 0, 0, NULL},
     65  {SIC_DMA10_UART1_RX_VECTOR, bfinUart_rxIsr, 0, 0, NULL},
     66  {SIC_DMA9_UART0_TX_VECTOR, bfinUart_txIsr, 0, 0, NULL},
     67  {SIC_DMA11_UART1_TX_VECTOR, bfinUart_txIsr, 0, 0, NULL}
    6368};
    6469#endif
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