Changeset 5e2dce0 in rtems


Ignore:
Timestamp:
Nov 27, 2001, 11:38:03 PM (20 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
3dc3511
Parents:
dda8f5dc
Message:

2001-11-27 Joel Sherrill <joel@…>,

This was tracked as PR39.

  • include/bsp.h, start/cpuboot.c, start/reset.S, startup/debugger, startup/linkcmds, startup/rom: Eliminated required definition of macros in the custom file for the BSP to compile. The ROM and ROM address and size settings are now linker script items.
Files:
9 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/m68k/ods68302/ChangeLog

    rdda8f5dc r5e2dce0  
     12001-11-27      Joel Sherrill <joel@OARcorp.com>,
     2
     3        This was tracked as PR39.
     4        * include/bsp.h, start/cpuboot.c, start/reset.S, startup/debugger,
     5        startup/linkcmds, startup/rom: Eliminated required definition of
     6        macros in the custom file for the BSP to compile.  The ROM and ROM
     7        address and size settings are now linker script items. 
     8
    192001-10-11      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
    210
  • c/src/lib/libbsp/m68k/ods68302/include/bsp.h

    rdda8f5dc r5e2dce0  
    3939#define CONFIGURE_INTERRUPT_STACK_MEMORY  (4 * 1024)
    4040
     41#ifndef VARIANT
     42#define VARIANT bare
     43#endif
    4144#if defined(VARIANT)
    4245
  • c/src/lib/libbsp/m68k/ods68302/start/cpuboot.c

    rdda8f5dc r5e2dce0  
    4242  */
    4343
     44extern int ROM_SIZE, ROM_BASE;
     45extern int RAM_SIZE, RAM_BASE;
     46
     47#define _ROM_SIZE ((unsigned int)&ROM_SIZE)
     48#define _ROM_BASE ((unsigned int)&ROM_BASE)
     49#define _RAM_SIZE ((unsigned int)&RAM_SIZE)
     50#define _RAM_BASE ((unsigned int)&RAM_BASE)
     51
    4452void boot_phase_1()
    4553{
    4654  M302_SCR = SCR_DEFAULT;
    4755
    48   WRITE_OR(CSEL_ROM, ROM_SIZE, ROM_WAIT_STATES, OR_MASK_RW, OR_MASK_FC);
    49   WRITE_BR(CSEL_ROM, RAM_BASE, BR_READ_ONLY, BR_FC_NULL, BR_ENABLED);
    50   WRITE_OR(CSEL_RAM, RAM_SIZE, RAM_WAIT_STATES, OR_MASK_RW, OR_MASK_FC);
    51   WRITE_BR(CSEL_RAM, ROM_BASE, BR_READ_WRITE, BR_FC_NULL, BR_ENABLED);
     56  WRITE_OR(CSEL_ROM, _ROM_SIZE, ROM_WAIT_STATES, OR_MASK_RW, OR_MASK_FC);
     57  WRITE_BR(CSEL_ROM, _RAM_BASE, BR_READ_ONLY, BR_FC_NULL, BR_ENABLED);
     58  WRITE_OR(CSEL_RAM, _RAM_SIZE, RAM_WAIT_STATES, OR_MASK_RW, OR_MASK_FC);
     59  WRITE_BR(CSEL_RAM, _ROM_BASE, BR_READ_WRITE, BR_FC_NULL, BR_ENABLED);
    5260
    5361#if defined(CSEL_1)
  • c/src/lib/libbsp/m68k/ods68302/start/reset.S

    rdda8f5dc r5e2dce0  
    358358
    359359        moveq   #0,%d0
    360         move.w  #(MC68302_BASE >> 12),%d0
     360        | Joel: With the change of MC68302_BASE from a #define to a linker
     361        |       symbol, the following 4 instructions replace this one:
     362        |          move.w  #(MC68302_BASE >> 12),%d0
     363        move.l  #MC68302_BASE,%d0
     364        moveq.l #12,%d1
     365        lsr.l   %d1,%d0
     366        and.l   #0xFFFF,%d0
     367
    361368        or.w    #(MC68302_BAR_FC_CFC << 12),%d0
    362369        move.l  #MC68302_BAR,%a0
  • c/src/lib/libbsp/m68k/ods68302/startup/cpuboot.c

    rdda8f5dc r5e2dce0  
    4242  */
    4343
     44extern int ROM_SIZE, ROM_BASE;
     45extern int RAM_SIZE, RAM_BASE;
     46
     47#define _ROM_SIZE ((unsigned int)&ROM_SIZE)
     48#define _ROM_BASE ((unsigned int)&ROM_BASE)
     49#define _RAM_SIZE ((unsigned int)&RAM_SIZE)
     50#define _RAM_BASE ((unsigned int)&RAM_BASE)
     51
    4452void boot_phase_1()
    4553{
    4654  M302_SCR = SCR_DEFAULT;
    4755
    48   WRITE_OR(CSEL_ROM, ROM_SIZE, ROM_WAIT_STATES, OR_MASK_RW, OR_MASK_FC);
    49   WRITE_BR(CSEL_ROM, RAM_BASE, BR_READ_ONLY, BR_FC_NULL, BR_ENABLED);
    50   WRITE_OR(CSEL_RAM, RAM_SIZE, RAM_WAIT_STATES, OR_MASK_RW, OR_MASK_FC);
    51   WRITE_BR(CSEL_RAM, ROM_BASE, BR_READ_WRITE, BR_FC_NULL, BR_ENABLED);
     56  WRITE_OR(CSEL_ROM, _ROM_SIZE, ROM_WAIT_STATES, OR_MASK_RW, OR_MASK_FC);
     57  WRITE_BR(CSEL_ROM, _RAM_BASE, BR_READ_ONLY, BR_FC_NULL, BR_ENABLED);
     58  WRITE_OR(CSEL_RAM, _RAM_SIZE, RAM_WAIT_STATES, OR_MASK_RW, OR_MASK_FC);
     59  WRITE_BR(CSEL_RAM, _ROM_BASE, BR_READ_WRITE, BR_FC_NULL, BR_ENABLED);
    5260
    5361#if defined(CSEL_1)
  • c/src/lib/libbsp/m68k/ods68302/startup/debugger

    rdda8f5dc r5e2dce0  
    4949}
    5050
     51
     52RAM_BASE = DEFINED(RAM_BASE) ? RAM_BASE : 0x00000000;
     53RAM_SIZE = DEFINED(RAM_SIZE) ? RAM_SIZE : 0x00100000;
     54ROM_BASE = DEFINED(ROM_BASE) ? ROM_BASE : 0x00010000;
     55ROM_SIZE = DEFINED(ROM_SIZE) ? ROM_SIZE : 0x00100000;
     56MC68302_BASE = DEFINED(MC68302_BASE) ? MC68302_BASE : 0x00700000;
    5157m302 = MC68302_BASE;
    5258_VBR = 0;               /* location of the VBR table (in RAM) */
  • c/src/lib/libbsp/m68k/ods68302/startup/linkcmds

    rdda8f5dc r5e2dce0  
    171171}
    172172
     173RAM_BASE = DEFINED(RAM_BASE) ? RAM_BASE : 0x00000000;
     174RAM_SIZE = DEFINED(RAM_SIZE) ? RAM_SIZE : 0x00100000;
     175ROM_BASE = DEFINED(ROM_BASE) ? ROM_BASE : 0x00C00000;
     176ROM_SIZE = DEFINED(ROM_SIZE) ? ROM_SIZE : 0x00100000;
     177MC68302_BASE = DEFINED(MC68302_BASE) ? MC68302_BASE : 0x00700000;
    173178m302 = MC68302_BASE;
    174179_VBR = ADDR(.vtable);           /* location of the VBR table (in RAM) */
  • c/src/lib/libbsp/m68k/ods68302/startup/rom

    rdda8f5dc r5e2dce0  
    5151}
    5252
     53RAM_BASE = DEFINED(RAM_BASE) ? RAM_BASE : 0x00000000;
     54RAM_SIZE = DEFINED(RAM_SIZE) ? RAM_SIZE : 0x00100000;
     55ROM_BASE = DEFINED(ROM_BASE) ? ROM_BASE : 0x00C00000;
     56ROM_SIZE = DEFINED(ROM_SIZE) ? ROM_SIZE : 0x00100000;
     57MC68302_BASE = DEFINED(MC68302_BASE) ? MC68302_BASE : 0x00700000;
    5358m302 = MC68302_BASE;
    5459_VBR = 0;               /* location of the VBR table (in RAM) */
  • make/ChangeLog

    rdda8f5dc r5e2dce0  
     12001-11-27      Joel Sherrill <joel@OARcorp.com>,
     2
     3        This was tracked as PR39.
     4        * include/bsp.h, start/cpuboot.c, start/reset.S, startup/debugger,
     5        startup/linkcmds, startup/rom: Eliminated required definition of
     6        macros in the custom file for the BSP to compile.  The ROM and ROM
     7        address and size settings are now linker script items. 
     8
    192001-11-27      Joel Sherrill <joel@OARcorp.com>,
    210
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