Changeset 5cc276e in rtems


Ignore:
Timestamp:
Mar 9, 2017, 1:32:04 PM (3 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
4.11
Children:
7d097c5
Parents:
7e91901
git-author:
Sebastian Huber <sebastian.huber@…> (03/09/17 13:32:04)
git-committer:
Sebastian Huber <sebastian.huber@…> (08/10/17 06:21:04)
Message:

arm: Fix CPU context validation for Cortex-R4

Do not touch the FPSCR[QC] bit since this is DNM/RAZ on Cortex-R4.

Close #3092.

Location:
cpukit/score/cpu/arm
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • cpukit/score/cpu/arm/arm-context-validate.S

    r7e91901 r5cc276e  
    11/*
    2  * Copyright (c) 2013-2014 embedded brains GmbH.  All rights reserved.
     2 * Copyright (c) 2013, 2017 embedded brains GmbH.  All rights reserved.
    33 *
    44 *  embedded brains GmbH
     
    100100        /* R3 contains the FPSCR */
    101101        vmrs    r3, FPSCR
    102         movs    r4, #0x001f
    103 #ifdef ARM_MULTILIB_ARCH_V7M
    104         movt    r4, #0xf000
    105 #else
    106         movt    r4, #0xf800
    107 #endif
     102        ldr     r4, =0xf000001f
    108103        bic     r3, r3, r4
    109104        and     r4, r4, r0
  • cpukit/score/cpu/arm/arm-context-volatile-clobber.S

    r7e91901 r5cc276e  
    11/*
    2  * Copyright (c) 2013-2014 embedded brains GmbH.  All rights reserved.
     2 * Copyright (c) 2013, 2017 embedded brains GmbH.  All rights reserved.
    33 *
    44 *  embedded brains GmbH
     
    3030#ifdef ARM_MULTILIB_VFP
    3131        vmrs    r1, FPSCR
    32         movs    r2, #0x001f
    33         movt    r2, #0xf800
     32        ldr     r2, =0xf000001f
    3433        bic     r1, r1, r2
    3534        and     r2, r2, r0
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