Changeset 5c491aef in rtems for c/src/exec/score/cpu/powerpc/cpu_asm.s
- Timestamp:
- Dec 20, 1995, 3:39:19 PM (25 years ago)
- Branches:
- 4.10, 4.11, 4.8, 4.9, 5, master
- Children:
- c64e4ed4
- Parents:
- 4442d21c
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/exec/score/cpu/powerpc/cpu_asm.s
r4442d21c r5c491aef 1 /* cpu_asm.s 1.0 - 95/08/08 1 2 /* cpu_asm.s 1.1 - 95/12/04 2 3 * 3 4 * This file contains the assembly code for the PowerPC implementation 4 5 * of RTEMS. 5 6 * 6 * Author: Andrew Bray <andy@i-cubed. demon.co.uk>7 * Author: Andrew Bray <andy@i-cubed.co.uk> 7 8 * 8 9 * COPYRIGHT (c) 1995 by i-cubed ltd. … … 672 673 673 674 /* Individual interrupt prologues look like this: 674 * mtsprg{0,1} r0675 * mfsprg2 r0676 * mtmsr r0677 675 * #if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27) 678 676 * #if (PPC_HAS_FPU) … … 684 682 * stwu r1, -(IP_END)(r1) 685 683 * #endif 686 * mfsprg{0,1} r0687 684 * stw r0, IP_0(r1) 688 685 * … … 701 698 PROC (_ISR_Handler): 702 699 #define LABEL(x) x 703 #define MTSAVE(x) mtsprg0 x 704 #define MFSAVE(x) mfsprg0 x 700 #define MTSAVE(x) mtspr sprg0, x 701 #define MFSAVE(x) mfspr x, sprg0 702 #define MTPC(x) mtspr srr0, x 703 #define MFPC(x) mfspr x, srr0 704 #define MTMSR(x) mtspr srr1, x 705 #define MFMSR(x) mfspr x, srr1 705 706 #include "irq_stub.s" 706 707 rfi … … 719 720 #undef MTSAVE 720 721 #undef MFSAVE 722 #undef MTPC 723 #undef MFPC 724 #undef MTMSR 725 #undef MFMSR 721 726 #define LABEL(x) x##_C 722 #define MTSAVE(x) mtsprg1 x 723 #define MFSAVE(x) mfsprg1 x 727 #define MTSAVE(x) mtspr sprg1, x 728 #define MFSAVE(x) mfspr x, sprg1 729 #define MTPC(x) mtspr srr2, x 730 #define MFPC(x) mfspr x, srr2 731 #define MTMSR(x) mtspr srr3, x 732 #define MFMSR(x) mfspr x, srr3 724 733 #include "irq_stub.s" 725 734 rfci
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