Changeset 5bf6ffb in rtems

Timestamp:

Apr 16, 1997, 5:34:40 PM (24 years ago)

Author:

Joel Sherrill <joel.sherrill@…>

Branches:

4.10, 4.11, 4.8, 4.9, 5, master

Children:

34217ccf

Parents:

010e7582

Message:

Added FPSP support for MC68040

Files:

• c/src/exec/score/cpu/m68k/cpu.c (modified) (1 diff)
• c/src/exec/score/cpu/m68k/cpu.h (modified) (1 diff)
• c/src/exec/score/cpu/m68k/m68k.h (modified) (12 diffs)
• cpukit/score/cpu/m68k/cpu.c (modified) (1 diff)

c/src/exec/score/cpu/m68k/cpu.c

@@ -77 +77 @@
   proc_ptr *interrupt_table = NULL;
 
+#if (M68K_HAS_FPSP_PACKAGE == 1)
+  /*
+   *  If this vector being installed is one related to FP, then the
+   *  FPSP will install the handler itself and handle it completely
+   *  with no intervention from RTEMS.
+   */
+
+  if (*_FPSP_install_raw_handler &&
+      (*_FPSP_install_raw_handler)(vector, new_handler, *old_handler))
+        return;
+#endif
+
+
+  /*
+   *  On CPU models without a VBR, it is necessary for there to be some
+   *  header code for each ISR which saves a register, loads the vector
+   *  number, and jumps to _ISR_Handler. 
+   */
+
   m68k_get_vbr( interrupt_table );
-
   *old_handler = interrupt_table[ vector ];
-
 #if ( M68K_HAS_VBR == 1 )
   interrupt_table[ vector ] = new_handler;

c/src/exec/score/cpu/m68k/cpu.h

@@ -475 +475 @@
  */
 
+void _CPU_Context_save_fp(
+  void **fp_context_ptr
+);
+
+/*
+ *  _CPU_Context_restore_fp
+ *
+ *  This routine restores the floating point context passed to it.
+ */
+
 void _CPU_Context_restore_fp(
   void **fp_context_ptr
 );
 
-/*
- *  _CPU_Context_restore_fp
- *
- *  This routine restores the floating point context passed to it.
- */
-
-void _CPU_Context_save_fp(
-  void **fp_context_ptr
-);
+#if (M68K_HAS_FPSP_PACKAGE == 1)
+/*
+ *  Hooks for the Floating Point Support Package (FPSP) provided by Motorola
+ *
+ *  NOTES:  
+ *
+ *  Motorola 68k family CPU's before the 68040 used a coprocessor
+ *  (68881 or 68882) to handle floating point.  The 68040 has internal
+ *  floating point support -- but *not* the complete support provided by
+ *  the 68881 or 68882.  The leftover functions are taken care of by the
+ *  M68040 Floating Point Support Package.  Quoting from the MC68040
+ *  Microprocessors User's Manual, Section 9, Floating-Point Unit (MC68040):
+ *
+ *    "When used with the M68040FPSP, the MC68040 FPU is fully
+ *    compliant with IEEE floating-point standards."
+ *
+ *  M68KFPSPInstallExceptionHandlers is in libcpu/m68k/MODEL/fpsp and
+ *  is invoked early in the application code to insure that proper FP
+ *  behavior is installed.  This is not left to the BSP to call, since
+ *  this would force all applications using that BSP to use FPSP which
+ *  is not necessarily desirable.
+ *
+ *  There is a similar package for the 68060 but RTEMS does not yet
+ *  support the 68060.
+ */
+
+void M68KFPSPInstallExceptionHandlers (void);
+
+SCORE_EXTERN int (*_FPSP_install_raw_handler)(
+  unsigned32 vector,
+  proc_ptr new_handler,
+  proc_ptr *old_handler
+);
+
+#endif
+
+
 #endif
 

c/src/exec/score/cpu/m68k/m68k.h

@@ -38 +38 @@
  *     m68ec040      (no FP)
  *     m68302        (no FP)
+ *     m68332        (no FP)
  *     mcpu32        (no FP)  (includes m68360)
  *
@@ -63 +64 @@
  *  NOTE:
  *    Eventually it would be nice to evaluate doing a lot of this section
- *    by having each model specigy which core it uses and then go from there.
+ *    by having each model specify which core it uses and then go from there.
  */
 
@@ -75 +76 @@
 #define M68K_HAS_PREINDEXING     0
 #define M68K_HAS_EXTB_L          0
+#define M68K_HAS_FPSP_PACKAGE    0
 
 #elif defined(m68020)
@@ -85 +87 @@
 #define M68K_HAS_PREINDEXING     1
 #define M68K_HAS_EXTB_L          1
+#define M68K_HAS_FPSP_PACKAGE    0
  
 #elif defined(m68020_nofp)
@@ -95 +98 @@
 #define M68K_HAS_PREINDEXING     1
 #define M68K_HAS_EXTB_L          1
+#define M68K_HAS_FPSP_PACKAGE    0
  
 #elif defined(m68030)
@@ -105 +109 @@
 #define M68K_HAS_PREINDEXING     1
 #define M68K_HAS_EXTB_L          1
+#define M68K_HAS_FPSP_PACKAGE    0
  
 #elif defined(m68040)
@@ -115 +120 @@
 #define M68K_HAS_PREINDEXING     1
 #define M68K_HAS_EXTB_L          1
+#define M68K_HAS_FPSP_PACKAGE    1
  
 #elif defined(m68lc040)
@@ -125 +131 @@
 #define M68K_HAS_PREINDEXING     1
 #define M68K_HAS_EXTB_L          1
+#define M68K_HAS_FPSP_PACKAGE    0
  
 #elif defined(m68ec040)
@@ -135 +142 @@
 #define M68K_HAS_PREINDEXING     1
 #define M68K_HAS_EXTB_L          1
+#define M68K_HAS_FPSP_PACKAGE    0
 
 #elif defined(m68302)
@@ -145 +153 @@
 #define M68K_HAS_PREINDEXING     0
 #define M68K_HAS_EXTB_L          0
+#define M68K_HAS_FPSP_PACKAGE    0
 
 #elif defined(m68332)
@@ -155 +164 @@
 #define M68K_HAS_PREINDEXING     0
 #define M68K_HAS_EXTB_L          1
+#define M68K_HAS_FPSP_PACKAGE    0
 
 #elif defined(mcpu32)
@@ -165 +175 @@
 #define M68K_HAS_PREINDEXING     1
 #define M68K_HAS_EXTB_L          1
+#define M68K_HAS_FPSP_PACKAGE    0
 
 #else

cpukit/score/cpu/m68k/cpu.c

@@ -77 +77 @@
   proc_ptr *interrupt_table = NULL;
 
+#if (M68K_HAS_FPSP_PACKAGE == 1)
+  /*
+   *  If this vector being installed is one related to FP, then the
+   *  FPSP will install the handler itself and handle it completely
+   *  with no intervention from RTEMS.
+   */
+
+  if (*_FPSP_install_raw_handler &&
+      (*_FPSP_install_raw_handler)(vector, new_handler, *old_handler))
+        return;
+#endif
+
+
+  /*
+   *  On CPU models without a VBR, it is necessary for there to be some
+   *  header code for each ISR which saves a register, loads the vector
+   *  number, and jumps to _ISR_Handler. 
+   */
+
   m68k_get_vbr( interrupt_table );
-
   *old_handler = interrupt_table[ vector ];
-
 #if ( M68K_HAS_VBR == 1 )
   interrupt_table[ vector ] = new_handler;