Changeset 5bf6ffb in rtems


Ignore:
Timestamp:
Apr 16, 1997, 5:34:40 PM (25 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
34217ccf
Parents:
010e7582
Message:

Added FPSP support for MC68040

Files:
4 edited

Legend:

Unmodified
Added
Removed
  • c/src/exec/score/cpu/m68k/cpu.c

    r010e7582 r5bf6ffb  
    7777  proc_ptr *interrupt_table = NULL;
    7878
     79#if (M68K_HAS_FPSP_PACKAGE == 1)
     80  /*
     81   *  If this vector being installed is one related to FP, then the
     82   *  FPSP will install the handler itself and handle it completely
     83   *  with no intervention from RTEMS.
     84   */
     85
     86  if (*_FPSP_install_raw_handler &&
     87      (*_FPSP_install_raw_handler)(vector, new_handler, *old_handler))
     88        return;
     89#endif
     90
     91
     92  /*
     93   *  On CPU models without a VBR, it is necessary for there to be some
     94   *  header code for each ISR which saves a register, loads the vector
     95   *  number, and jumps to _ISR_Handler.
     96   */
     97
    7998  m68k_get_vbr( interrupt_table );
    80 
    8199  *old_handler = interrupt_table[ vector ];
    82 
    83100#if ( M68K_HAS_VBR == 1 )
    84101  interrupt_table[ vector ] = new_handler;
  • c/src/exec/score/cpu/m68k/cpu.h

    r010e7582 r5bf6ffb  
    475475 */
    476476
     477void _CPU_Context_save_fp(
     478  void **fp_context_ptr
     479);
     480
     481/*
     482 *  _CPU_Context_restore_fp
     483 *
     484 *  This routine restores the floating point context passed to it.
     485 */
     486
    477487void _CPU_Context_restore_fp(
    478488  void **fp_context_ptr
    479489);
    480490
    481 /*
    482  *  _CPU_Context_restore_fp
    483  *
    484  *  This routine restores the floating point context passed to it.
    485  */
    486 
    487 void _CPU_Context_save_fp(
    488   void **fp_context_ptr
    489 );
     491#if (M68K_HAS_FPSP_PACKAGE == 1)
     492/*
     493 *  Hooks for the Floating Point Support Package (FPSP) provided by Motorola
     494 *
     495 *  NOTES: 
     496 *
     497 *  Motorola 68k family CPU's before the 68040 used a coprocessor
     498 *  (68881 or 68882) to handle floating point.  The 68040 has internal
     499 *  floating point support -- but *not* the complete support provided by
     500 *  the 68881 or 68882.  The leftover functions are taken care of by the
     501 *  M68040 Floating Point Support Package.  Quoting from the MC68040
     502 *  Microprocessors User's Manual, Section 9, Floating-Point Unit (MC68040):
     503 *
     504 *    "When used with the M68040FPSP, the MC68040 FPU is fully
     505 *    compliant with IEEE floating-point standards."
     506 *
     507 *  M68KFPSPInstallExceptionHandlers is in libcpu/m68k/MODEL/fpsp and
     508 *  is invoked early in the application code to insure that proper FP
     509 *  behavior is installed.  This is not left to the BSP to call, since
     510 *  this would force all applications using that BSP to use FPSP which
     511 *  is not necessarily desirable.
     512 *
     513 *  There is a similar package for the 68060 but RTEMS does not yet
     514 *  support the 68060.
     515 */
     516
     517void M68KFPSPInstallExceptionHandlers (void);
     518
     519SCORE_EXTERN int (*_FPSP_install_raw_handler)(
     520  unsigned32 vector,
     521  proc_ptr new_handler,
     522  proc_ptr *old_handler
     523);
     524
     525#endif
     526
     527
    490528#endif
    491529
  • c/src/exec/score/cpu/m68k/m68k.h

    r010e7582 r5bf6ffb  
    3838 *     m68ec040      (no FP)
    3939 *     m68302        (no FP)
     40 *     m68332        (no FP)
    4041 *     mcpu32        (no FP)  (includes m68360)
    4142 *
     
    6364 *  NOTE:
    6465 *    Eventually it would be nice to evaluate doing a lot of this section
    65  *    by having each model specigy which core it uses and then go from there.
     66 *    by having each model specify which core it uses and then go from there.
    6667 */
    6768
     
    7576#define M68K_HAS_PREINDEXING     0
    7677#define M68K_HAS_EXTB_L          0
     78#define M68K_HAS_FPSP_PACKAGE    0
    7779
    7880#elif defined(m68020)
     
    8587#define M68K_HAS_PREINDEXING     1
    8688#define M68K_HAS_EXTB_L          1
     89#define M68K_HAS_FPSP_PACKAGE    0
    8790 
    8891#elif defined(m68020_nofp)
     
    9598#define M68K_HAS_PREINDEXING     1
    9699#define M68K_HAS_EXTB_L          1
     100#define M68K_HAS_FPSP_PACKAGE    0
    97101 
    98102#elif defined(m68030)
     
    105109#define M68K_HAS_PREINDEXING     1
    106110#define M68K_HAS_EXTB_L          1
     111#define M68K_HAS_FPSP_PACKAGE    0
    107112 
    108113#elif defined(m68040)
     
    115120#define M68K_HAS_PREINDEXING     1
    116121#define M68K_HAS_EXTB_L          1
     122#define M68K_HAS_FPSP_PACKAGE    1
    117123 
    118124#elif defined(m68lc040)
     
    125131#define M68K_HAS_PREINDEXING     1
    126132#define M68K_HAS_EXTB_L          1
     133#define M68K_HAS_FPSP_PACKAGE    0
    127134 
    128135#elif defined(m68ec040)
     
    135142#define M68K_HAS_PREINDEXING     1
    136143#define M68K_HAS_EXTB_L          1
     144#define M68K_HAS_FPSP_PACKAGE    0
    137145
    138146#elif defined(m68302)
     
    145153#define M68K_HAS_PREINDEXING     0
    146154#define M68K_HAS_EXTB_L          0
     155#define M68K_HAS_FPSP_PACKAGE    0
    147156
    148157#elif defined(m68332)
     
    155164#define M68K_HAS_PREINDEXING     0
    156165#define M68K_HAS_EXTB_L          1
     166#define M68K_HAS_FPSP_PACKAGE    0
    157167
    158168#elif defined(mcpu32)
     
    165175#define M68K_HAS_PREINDEXING     1
    166176#define M68K_HAS_EXTB_L          1
     177#define M68K_HAS_FPSP_PACKAGE    0
    167178
    168179#else
  • cpukit/score/cpu/m68k/cpu.c

    r010e7582 r5bf6ffb  
    7777  proc_ptr *interrupt_table = NULL;
    7878
     79#if (M68K_HAS_FPSP_PACKAGE == 1)
     80  /*
     81   *  If this vector being installed is one related to FP, then the
     82   *  FPSP will install the handler itself and handle it completely
     83   *  with no intervention from RTEMS.
     84   */
     85
     86  if (*_FPSP_install_raw_handler &&
     87      (*_FPSP_install_raw_handler)(vector, new_handler, *old_handler))
     88        return;
     89#endif
     90
     91
     92  /*
     93   *  On CPU models without a VBR, it is necessary for there to be some
     94   *  header code for each ISR which saves a register, loads the vector
     95   *  number, and jumps to _ISR_Handler.
     96   */
     97
    7998  m68k_get_vbr( interrupt_table );
    80 
    8199  *old_handler = interrupt_table[ vector ];
    82 
    83100#if ( M68K_HAS_VBR == 1 )
    84101  interrupt_table[ vector ] = new_handler;
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