Changeset 5b6111b in rtems


Ignore:
Timestamp:
Feb 3, 2005, 4:01:04 PM (15 years ago)
Author:
Eric Norum <WENorum@…>
Branches:
4.10, 4.11, 4.8, 4.9, master
Children:
2538e7ae
Parents:
0c20a46
Message:

Add support for interrupt controller allocation. This will provides a
mechanism for applications to find a free level/priority.

Location:
c/src/lib/libbsp/m68k/uC5282
Files:
6 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/m68k/uC5282/clock/clock.c

    r0c20a46 r5b6111b  
    4848        int level;                                                       \
    4949        int preScaleCode = -2;                                           \
    50         int preScaleDivisor = get_CPU_clock_speed() / 1000000;   \
     50        int preScaleDivisor = bsp_get_CPU_clock_speed() / 1000000;       \
    5151        while (preScaleDivisor) {                                        \
    5252            preScaleDivisor >>= 1;                                       \
    5353            preScaleCode++;                                              \
    5454        }                                                                \
     55        bsp_allocate_interrupt(PIT3_IRQ_LEVEL, PIT3_IRQ_PRIORITY);       \
    5556        MCF5282_INTC0_ICR58 = MCF5282_INTC_ICR_IL(PIT3_IRQ_LEVEL) |      \
    5657                              MCF5282_INTC_ICR_IP(PIT3_IRQ_PRIORITY);    \
  • c/src/lib/libbsp/m68k/uC5282/console/console.c

    r0c20a46 r5b6111b  
    137137        info->hwflow   = hwflow;
    138138
    139     clock_speed = get_CPU_clock_speed();
     139    clock_speed = bsp_get_CPU_clock_speed();
    140140    /* determine the baud divisor value */
    141141    divisor = (clock_speed / ( 32 * baud ));
     
    397397        switch(chan) {
    398398        case 0:
     399            bsp_allocate_interrupt(UART0_IRQ_LEVEL, UART0_IRQ_PRIORITY);
    399400            MCF5282_INTC0_ICR13 = MCF5282_INTC_ICR_IL(UART0_IRQ_LEVEL) |
    400401                                  MCF5282_INTC_ICR_IP(UART0_IRQ_PRIORITY);
     
    404405
    405406        case 1:
     407            bsp_allocate_interrupt(UART1_IRQ_LEVEL, UART1_IRQ_PRIORITY);
    406408            MCF5282_INTC0_ICR14 = MCF5282_INTC_ICR_IL(UART1_IRQ_LEVEL) |
    407409                                  MCF5282_INTC_ICR_IP(UART1_IRQ_PRIORITY);
     
    411413
    412414        case 2:
     415            bsp_allocate_interrupt(UART2_IRQ_LEVEL, UART2_IRQ_PRIORITY);
    413416            MCF5282_INTC0_ICR15 = MCF5282_INTC_ICR_IL(UART2_IRQ_LEVEL) |
    414417                                  MCF5282_INTC_ICR_IP(UART2_IRQ_PRIORITY);
  • c/src/lib/libbsp/m68k/uC5282/include/bsp.h

    r0c20a46 r5b6111b  
    6868/* functions */
    6969
    70 unsigned32 get_CPU_clock_speed(void);
     70unsigned32 bsp_get_CPU_clock_speed(void);
     71int bsp_allocate_interrupt(int level, int priority);
    7172unsigned const char *uC5282_gethwaddr(int a);
    7273const char *uC5282_getbenv(const char *a);
  • c/src/lib/libbsp/m68k/uC5282/network/network.c

    r0c20a46 r5b6111b  
    180180    rtems_status_code status;
    181181    rtems_isr_entry old_handler;
    182         unsigned32 clock_speed = get_CPU_clock_speed();
     182        unsigned32 clock_speed = bsp_get_CPU_clock_speed();
    183183
    184184    /*
     
    298298        rtems_panic ("Can't attach MCF5282 FEC RX interrupt handler: %s\n",
    299299                     rtems_status_text(status));
     300    bsp_allocate_interrupt(FEC_IRQ_LEVEL, FEC_IRQ_TX_PRIORITY);
    300301    MCF5282_INTC0_ICR23 = MCF5282_INTC_ICR_IL(FEC_IRQ_LEVEL) |
    301302                          MCF5282_INTC_ICR_IP(FEC_IRQ_TX_PRIORITY);
    302303    MCF5282_INTC0_IMRL &= ~(MCF5282_INTC_IMRL_INT23 | MCF5282_INTC_IMRL_MASKALL);
     304    bsp_allocate_interrupt(FEC_IRQ_LEVEL, FEC_IRQ_RX_PRIORITY);
    303305    MCF5282_INTC0_ICR27 = MCF5282_INTC_ICR_IL(FEC_IRQ_LEVEL) |
    304306                          MCF5282_INTC_ICR_IP(FEC_IRQ_RX_PRIORITY);
  • c/src/lib/libbsp/m68k/uC5282/startup/bspstart.c

    r0c20a46 r5b6111b  
    247247}
    248248
    249 unsigned32 get_CPU_clock_speed(void)
     249unsigned32 bsp_get_CPU_clock_speed(void)
    250250{
    251251    extern char _CPUClockSpeed[];
    252252    return( (unsigned32)_CPUClockSpeed);
     253}
     254
     255/*
     256 * Interrupt controller allocation
     257 */
     258int bsp_allocate_interrupt(int level, int priority)
     259{
     260    static char used[7];
     261    rtems_interrupt_level l;
     262    int ret = -1;
     263
     264    if ((level < 1) || (level > 7) || (priority < 0) || (priority > 7))
     265        return ret;
     266    rtems_interrupt_disable(l);
     267    if ((used[level-1] & (1 << priority)) == 0) {
     268        used[level-1] |= (1 << priority);
     269        ret = 0;
     270    }
     271    rtems_interrupt_enable(l);
     272    return ret;
    253273}
    254274
  • c/src/lib/libbsp/m68k/uC5282/timer/timer.c

    r0c20a46 r5b6111b  
    1111Timer_initialize(void)
    1212{
    13     int preScaleDivisor = get_CPU_clock_speed() / 1000000;
     13    int preScaleDivisor = bsp_get_CPU_clock_speed() / 1000000;
    1414    int div = MCF5282_TIMER_DTMR_CLK_DIV1;
    1515
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