Changeset 587d14f in rtems-docs


Ignore:
Timestamp:
Aug 20, 2018, 2:27:31 PM (15 months ago)
Author:
Amaan Cheval <amaan.cheval@…>
Branches:
master
Children:
9bfda06
Parents:
ad2ca17
git-author:
Amaan Cheval <amaan.cheval@…> (08/20/18 14:27:31)
git-committer:
Joel Sherrill <joel@…> (08/20/18 16:07:53)
Message:

user: Update x86-64 chapter with end-of-GSoC status

File:
1 edited

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  • user/bsps/bsps-x86_64.rst

    rad2ca17 r587d14f  
    137137send its output to the host's ``stdio`` stream.
    138138
     139Paging
     140------
     141
     142During the BSP's initialization, the paging tables are setup to identity-map the
     143first 512GiB, i.e. virtual addresses are the same as physical addresses for the
     144first 512GiB.
     145
     146The page structures are set up statically with 1GiB super-pages.
     147
     148.. note::
     149  Page-faults are not handled.
     150
     151.. warning::
     152  RAM size is not detected dynamically and defaults to 1GiB, if the
     153  configuration-time ``RamSize`` parameter is not used.
     154
     155Interrupt Setup
     156---------------
     157
     158Interrupt vectors ``0`` through ``32`` (i.e. 33 interrupt vectors in total) are
     159setup as "RTEMS interrupts", which can be hooked through
     160``rtems_interrupt_handler_install``.
     161
     162The Interrupt Descriptor Table supports a total of 256 possible vectors (0
     163through 255), which leaves a lot of room for "raw interrupts", which can be
     164hooked through ``_CPU_ISR_install_raw_handler``.
     165
     166Since the APIC needs to be used for the clock driver, the PIC is remapped (IRQ0
     167of the PIC is redirected to vector 32, and so on), and then all interrupts are
     168masked to disable the PIC. In this state, the PIC may _still_ produce spurious
     169interrupts (IRQ7 and IRQ15, redirected to vector 39 and vector 47 respectively).
     170
     171The clock driver triggers the initialization of the APIC and then the APIC
     172timer.
     173
     174The I/O APIC is not supported at the moment.
     175
     176.. note::
     177  IRQ32 is reserved by default for the APIC timer (see following section).
     178
     179  IRQ255 is reserved by default for the APIC's spurious vector.
     180
     181.. warning::
     182  Besides the first 33 vectors (0 through 32), and vector 255 (the APIC spurious
     183  vector), no other handlers are attached by default.
     184
    139185Clock Driver
    140186------------
    141187
    142 The clock driver currently uses the idle thread clock driver.
     188The clock driver currently uses the APIC timer. Since the APIC timer runs at the
     189CPU bus frequency, which can't be detected easily, the PIT is used to calibrate
     190the APIC timer, and then the APIC timer is enabled in periodic mode, with the
     191initial counter setup such that interrupts fire at the same frequency as the
     192clock tick frequency, as requested by ``CONFIGURE_MICROSECONDS_PER_TICK``.
    143193
    144194Console Driver
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