Changeset 56cf340 in rtems


Ignore:
Timestamp:
Oct 10, 2017, 3:24:42 PM (22 months ago)
Author:
Javier Jalle <javier.jalle@…>
Branches:
master
Children:
2727bc7f
Parents:
cc40f0b
git-author:
Javier Jalle <javier.jalle@…> (10/10/17 15:24:42)
git-committer:
Daniel Hellstrom <daniel@…> (11/14/17 09:27:20)
Message:

leon, grspw_router: Allow thread safe per-bit managing of pctrl regs

Location:
c/src/lib/libbsp/sparc/shared
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/sparc/shared/include/grspw_router.h

    rcc40f0b r56cf340  
    219219extern int router_port_ioc(void *d, int port, struct router_port *cfg);
    220220
     221/* Read-modify-write Port Control register */
     222extern int router_port_ctrl_rmw(void *d, int port, uint32_t *oldvalue, uint32_t bitmask, uint32_t value);
     223/* Read-modify-write Port Control2 register */
     224extern int router_port_ctrl2_rmw(void *d, int port, uint32_t *oldvalue, uint32_t bitmask, uint32_t value);
    221225/* Read Port Control register */
    222226extern int router_port_ctrl_get(void *d, int port, uint32_t *ctrl);
     
    224228extern int router_port_ctrl2_get(void *d, int port, uint32_t *ctrl2);
    225229/* Write Port Control Register */
    226 extern int router_port_ctrl_set(void *d, int port, uint32_t ctrl);
     230extern int router_port_ctrl_set(void *d, int port, uint32_t mask, uint32_t ctrl);
    227231/* Write Port Control2 Register */
    228 extern int router_port_ctrl2_set(void *d, int port, uint32_t ctrl2);
     232extern int router_port_ctrl2_set(void *d, int port, uint32_t mask, uint32_t ctrl2);
    229233/* Set Timer Reload Value for a specific port */
    230234extern int router_port_treload_set(void *d, int port, uint32_t reload);
  • c/src/lib/libbsp/sparc/shared/spw/grspw_router.c

    rcc40f0b r56cf340  
    691691        REG_WRITE(&priv->regs->cfgsts, tmp | RTRCFG_WCLEAR);
    692692        tmp = REG_READ(&priv->regs->psts[0]);
    693         REG_WRITE(&priv->regs->psts[0], tmp & PSTSCFG_WCLEAR);
     693        REG_WRITE(&priv->regs->psts[0], (tmp & PSTSCFG_WCLEAR) | PSTSCFG_WCLEAR2);
    694694        for (i=1; i<priv->nports; i++) {
    695695                tmp = REG_READ(&priv->regs->psts[i]);
     
    12631263}
    12641264
     1265int router_port_ctrl_rmw(void *d, int port, uint32_t *oldvalue, uint32_t bitmask, uint32_t value)
     1266{
     1267        struct router_priv *priv = d;
     1268        int error = router_check_port(d, port);
     1269        unsigned int oldctrl, ctrl;
     1270        SPIN_IRQFLAGS(irqflags);
     1271
     1272        if (error)
     1273                return error;
     1274
     1275        SPIN_LOCK_IRQ(&priv->plock[port], irqflags);
     1276
     1277        oldctrl = REG_READ(&priv->regs->pctrl[port]);
     1278        ctrl = ((oldctrl & ~(bitmask)) | (value & bitmask));
     1279        REG_WRITE(&priv->regs->pctrl[port], ctrl);
     1280
     1281        SPIN_UNLOCK_IRQ(&priv->plock[port], irqflags);
     1282
     1283        if (oldvalue != NULL) {
     1284                *oldvalue = oldctrl;
     1285        }
     1286
     1287        return ROUTER_ERR_OK;
     1288}
     1289
     1290int router_port_ctrl2_rmw(void *d, int port, uint32_t *oldvalue, uint32_t bitmask, uint32_t value)
     1291{
     1292        struct router_priv *priv = d;
     1293        int error = router_check_port(d, port);
     1294        unsigned int oldctrl, ctrl;
     1295        SPIN_IRQFLAGS(irqflags);
     1296
     1297        if (error)
     1298                return error;
     1299
     1300        SPIN_LOCK_IRQ(&priv->plock[port], irqflags);
     1301
     1302        oldctrl = REG_READ(&priv->regs->pctrl2[port]);
     1303        ctrl = ((oldctrl & ~(bitmask)) | (value & bitmask));
     1304        REG_WRITE(&priv->regs->pctrl2[port], ctrl);
     1305
     1306        SPIN_UNLOCK_IRQ(&priv->plock[port], irqflags);
     1307
     1308        if (oldvalue != NULL) {
     1309                *oldvalue = oldctrl;
     1310        }
     1311
     1312        return ROUTER_ERR_OK;
     1313}
     1314
    12651315/* Read Port Control register */
    12661316int router_port_ctrl_get(void *d, int port, uint32_t *ctrl)
     
    12861336        struct router_priv *priv = d;
    12871337        int error = router_check_port(d, port);
     1338        SPIN_IRQFLAGS(irqflags);
    12881339
    12891340        if (error)
     
    12941345                return ROUTER_ERR_EINVAL;
    12951346        }
     1347
     1348        SPIN_LOCK_IRQ(&priv->plock[port], irqflags);
    12961349        *sts = REG_READ(&priv->regs->psts[port]);
    12971350        if (port == 0) {
    1298                 REG_WRITE(&priv->regs->psts[port], (*sts) & PSTSCFG_WCLEAR);
     1351                REG_WRITE(&priv->regs->psts[port], ((*sts) & (PSTSCFG_WCLEAR & clrmsk)) | (PSTSCFG_WCLEAR2 & clrmsk));
    12991352        }else{
    13001353                REG_WRITE(&priv->regs->psts[port], (*sts) & PSTS_WCLEAR);
    13011354        }
     1355        SPIN_UNLOCK_IRQ(&priv->plock[port], irqflags);
    13021356        return ROUTER_ERR_OK;
    13031357}
     
    13221376
    13231377/* Write Port Control Register */
    1324 int router_port_ctrl_set(void *d, int port, uint32_t ctrl)
    1325 {
    1326         struct router_priv *priv = d;
    1327         SPIN_IRQFLAGS(irqflags);
    1328         int error = router_check_port(d, port);
    1329 
    1330         if (error)
    1331                 return error;
    1332 
    1333         SPIN_LOCK_IRQ(&priv->plock[port], irqflags);
    1334 
    1335         REG_WRITE(&priv->regs->pctrl[port],ctrl); /* this is not SMP safe? */
    1336 
    1337         SPIN_UNLOCK_IRQ(&priv->plock[port], irqflags);
    1338 
    1339         return ROUTER_ERR_OK;
     1378int router_port_ctrl_set(void *d, int port, uint32_t mask, uint32_t ctrl)
     1379{
     1380        return router_port_ctrl_rmw(d, port, NULL, mask, ctrl);
    13401381}
    13411382
    13421383/* Write Port Control2 Register */
    1343 int router_port_ctrl2_set(void *d, int port, uint32_t ctrl2)
    1344 {
    1345         struct router_priv *priv = d;
    1346         int error = router_check_port(d, port);
    1347 
    1348         if (error)
    1349                 return error;
    1350 
    1351         REG_WRITE(&priv->regs->pctrl2[port],ctrl2);
    1352 
    1353         return ROUTER_ERR_OK;
     1384int router_port_ctrl2_set(void *d, int port, uint32_t mask, uint32_t ctrl2)
     1385{
     1386        return router_port_ctrl_rmw(d, port, NULL, mask, ctrl2);
    13541387}
    13551388
     
    14301463int router_port_disable(void *d, int port)
    14311464{
    1432         struct router_priv *priv = d;
    1433         unsigned int ctrl;
    1434         SPIN_IRQFLAGS(irqflags);
    1435         int error = router_check_port(d, port);
    1436 
    1437         if (error)
    1438                 return error;
    1439 
    1440         SPIN_LOCK_IRQ(&priv->plock[port], irqflags);
    1441 
    1442         ctrl = REG_READ(&priv->regs->pctrl[port]);
    1443         REG_WRITE(&priv->regs->pctrl[port], (ctrl | PCTRL_DI));
    1444 
    1445         SPIN_UNLOCK_IRQ(&priv->plock[port], irqflags);
    1446 
    1447         return ROUTER_ERR_OK;
     1465        return router_port_ctrl_rmw(d, port, NULL, PCTRL_DI, PCTRL_DI);
    14481466}
    14491467
    14501468int router_port_enable(void *d, int port)
    14511469{
    1452         struct router_priv *priv = d;
    1453         unsigned int ctrl;
    1454         SPIN_IRQFLAGS(irqflags);
    1455         int error = router_check_port(d, port);
    1456 
    1457         if (error)
    1458                 return error;
    1459 
    1460         SPIN_LOCK_IRQ(&priv->plock[port], irqflags);
    1461 
    1462         ctrl = REG_READ(&priv->regs->pctrl[port]);
    1463         REG_WRITE(&priv->regs->pctrl[port], (ctrl & ~(PCTRL_DI)));
    1464 
    1465         SPIN_UNLOCK_IRQ(&priv->plock[port], irqflags);
    1466 
    1467         return ROUTER_ERR_OK;
     1470        return router_port_ctrl_rmw(d, port, NULL, PCTRL_DI, 0);
    14681471}
    14691472
    14701473int router_port_link_stop(void *d, int port)
    14711474{
    1472         struct router_priv *priv = d;
    1473         unsigned int ctrl;
    1474         SPIN_IRQFLAGS(irqflags);
    1475         int error = router_check_port(d, port);
    1476 
    1477         if (error)
    1478                 return error;
    1479 
    1480         SPIN_LOCK_IRQ(&priv->plock[port], irqflags);
    1481 
    1482         ctrl = REG_READ(&priv->regs->pctrl[port]);
    1483         REG_WRITE(&priv->regs->pctrl[port], ((ctrl & ~(PCTRL_LS) )| (PCTRL_LD)));
    1484 
    1485         SPIN_UNLOCK_IRQ(&priv->plock[port], irqflags);
    1486 
    1487         return ROUTER_ERR_OK;
     1475        return router_port_ctrl_rmw(d, port, NULL, PCTRL_LD | PCTRL_LS, PCTRL_LD);
    14881476}
    14891477
    14901478int router_port_link_start(void *d, int port)
    14911479{
    1492         struct router_priv *priv = d;
    1493         unsigned int ctrl;
    1494         SPIN_IRQFLAGS(irqflags);
    1495         int error = router_check_port(d, port);
    1496 
    1497         if (error)
    1498                 return error;
    1499 
    1500         SPIN_LOCK_IRQ(&priv->plock[port], irqflags);
    1501 
    1502         ctrl = REG_READ(&priv->regs->pctrl[port]);
    1503         REG_WRITE(&priv->regs->pctrl[port], ((ctrl & ~(PCTRL_LD) )| (PCTRL_LS)));
    1504 
    1505         SPIN_UNLOCK_IRQ(&priv->plock[port], irqflags);
    1506 
    1507         return ROUTER_ERR_OK;
     1480        return router_port_ctrl_rmw(d, port, NULL, PCTRL_LD | PCTRL_LS, PCTRL_LS);
    15081481}
    15091482
Note: See TracChangeset for help on using the changeset viewer.