Index: c/src/lib/libbsp/sparc64/ChangeLog
===================================================================
--- c/src/lib/libbsp/sparc64/ChangeLog	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/ChangeLog	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,90 @@
+2010-06-17	Joel Sherrill <joel.sherrill@oarcorp.com>
+
+	* ChangeLog, Makefile.am, acinclude.m4, configure.ac, shared/asm/asm.S,
+	shared/clock/ckinit.c, shared/console/conscfg.c,
+	shared/helenos/LICENSE, shared/helenos/README,
+	shared/helenos/boot/genarch/balloc.c,
+	shared/helenos/boot/genarch/ofw.c,
+	shared/helenos/boot/genarch/ofw_tree.c,
+	shared/helenos/boot/generic/string.c,
+	shared/helenos/boot/include/align.h,
+	shared/helenos/boot/include/balloc.h,
+	shared/helenos/boot/include/gentypes.h,
+	shared/helenos/boot/include/main.h,
+	shared/helenos/boot/include/ofw.h,
+	shared/helenos/boot/include/ofw_tree.h,
+	shared/helenos/boot/include/ofwarch.h,
+	shared/helenos/boot/include/register.h,
+	shared/helenos/boot/include/stack.h,
+	shared/helenos/boot/include/types.h,
+	shared/helenos/boot/sparc64/loader/main.c,
+	shared/helenos/boot/sparc64/loader/ofwarch.c,
+	shared/helenos/boot/sparc64/loader/ofwasm.S,
+	shared/helenos/kernel/genarch/include/ofw/ofw_tree.h,
+	shared/helenos/kernel/generic/include/align.h,
+	shared/helenos/kernel/sparc64/include/arch.h,
+	shared/helenos/kernel/sparc64/include/boot.h,
+	shared/helenos/kernel/sparc64/include/regdef.h,
+	shared/helenos/kernel/sparc64/include/stack.h,
+	shared/helenos/kernel/sparc64/include/mm/cache_spec.h,
+	shared/helenos/kernel/sparc64/include/mm/frame.h,
+	shared/helenos/kernel/sparc64/include/mm/mmu.h,
+	shared/helenos/kernel/sparc64/include/mm/page.h,
+	shared/helenos/kernel/sparc64/include/mm/tlb.h,
+	shared/helenos/kernel/sparc64/include/mm/tte.h,
+	shared/helenos/kernel/sparc64/include/mm/sun4u/frame.h,
+	shared/helenos/kernel/sparc64/include/mm/sun4u/mmu.h,
+	shared/helenos/kernel/sparc64/include/mm/sun4u/page.h,
+	shared/helenos/kernel/sparc64/include/mm/sun4u/tlb.h,
+	shared/helenos/kernel/sparc64/include/mm/sun4u/tte.h,
+	shared/helenos/kernel/sparc64/include/sun4u/arch.h,
+	shared/helenos/kernel/sparc64/src/cache.S,
+	shared/helenos/kernel/sparc64/src/sun4u/takemmu.S,
+	shared/include/asm.h, shared/include/traptable.h,
+	shared/start/start.S, shared/start/trap_table.S,
+	shared/startup/bspgetworkarea.c, shared/startup/bspstart.c,
+	shared/startup/linkcmds, shared/startup/setvec.c: New files.
+
+2010-06-05  Gedare Bloom <gedare@gwmail.gwu.edu>
+
+	* sun4u/ usiii/: Moved sun4u to usiii.
+
+2010-05-13  Gedare Bloom <gedare@gwmail.gwu.edu>
+
+	* shared/startup/linkcmds: Some alignment changes, added some sections.
+	* helenos/loader/ofwasm.S: clear g4 register after calling ofw_cif. 
+
+2010-05-12  Gedare Bloom <gedare@gwmail.gwu.edu>
+
+	* helenos/: New subdir to encapsulate sources taken from HelenOS.
+
+2010-05-10  Gedare Bloom <gedare@gwmail.gwu.edu>
+
+	* shared/ofw/: Move sun4v/ofw to shared/ofw.
+
+2010-05-10  Gedare Bloom <gedare@gwmail.gwu.edu>
+
+	* shared/startup/ sun4v/startup: Move sun4v/startup to shared/startup.
+
+2010-05-10  Gedare Bloom <gedare@gwmail.gwu.edu>
+
+	* shared/start/start.S: cleaned up. should bootstrap any sparc64 target.
+
+2010-05-10  Gedare Bloom <gedare@gwmail.gwu.edu>
+
+	* sun4u/: New BSP directory
+	* shared/: Shared directory added
+
+2010-05-02  Gedare Bloom <gedare@gwmail.gwu.edu>
+
+	* sparc64/sun4v/Makefile.am sparc64/m5sim/Makefile.am:
+		Link to new libcpu directories and sources.
+
+2010-05-02  Gedare Bloom <gedare@gwmail.gwu.edu>
+
+	* m5sim: new directory for BSP for M5 syscall emulator of UltraSparc T1
+
+2009-10-19	Eugen Leontie <eugen@gwu.edu>
+
+	* ChangeLog, Makefile.am, acinclude.m4, configure.ac: New files.
+
Index: c/src/lib/libbsp/sparc64/Makefile.am
===================================================================
--- c/src/lib/libbsp/sparc64/Makefile.am	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/Makefile.am	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,13 @@
+##
+## $Id$
+##
+
+ACLOCAL_AMFLAGS = -I ../../../aclocal
+
+## Descend into the @RTEMS_BSP_FAMILY@ directory
+SUBDIRS = @RTEMS_BSP_FAMILY@
+
+EXTRA_DIST = 
+
+include $(top_srcdir)/../../../automake/subdirs.am
+include $(top_srcdir)/../../../automake/local.am
Index: c/src/lib/libbsp/sparc64/acinclude.m4
===================================================================
--- c/src/lib/libbsp/sparc64/acinclude.m4	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/acinclude.m4	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,12 @@
+# RTEMS_CHECK_BSPDIR(RTEMS_BSP_FAMILY)
+AC_DEFUN([RTEMS_CHECK_BSPDIR],
+[
+  case "$1" in
+  niagara )
+    AC_CONFIG_SUBDIRS([niagara]);;
+  usiii )
+    AC_CONFIG_SUBDIRS([usiii]);;
+  *)
+    AC_MSG_ERROR([Invalid BSP]);;
+  esac
+])
Index: c/src/lib/libbsp/sparc64/configure.ac
===================================================================
--- c/src/lib/libbsp/sparc64/configure.ac	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/configure.ac	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,25 @@
+## Process this file with autoconf to produce a configure script.
+## 
+## $Id$
+
+AC_PREREQ(2.60)
+AC_INIT([rtems-c-src-lib-libbsp-sparc64],[_RTEMS_VERSION],[http://www.rtems.org/bugzilla])
+
+# GAB: ./shared is used by sparc v7/8 bsps
+# AC_CONFIG_SRCDIR([shared])
+
+RTEMS_TOP(../../../../..)
+
+RTEMS_CANONICAL_TARGET_CPU
+AM_INIT_AUTOMAKE([no-define foreign 1.10])
+AM_MAINTAINER_MODE
+
+RTEMS_ENV_RTEMSBSP
+
+RTEMS_PROJECT_ROOT
+
+RTEMS_CHECK_BSPDIR([$RTEMS_BSP_FAMILY])
+
+# Explicitly list all Makefiles here
+AC_CONFIG_FILES([Makefile])
+AC_OUTPUT
Index: c/src/lib/libbsp/sparc64/shared/asm/asm.S
===================================================================
--- c/src/lib/libbsp/sparc64/shared/asm/asm.S	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/asm/asm.S	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,19 @@
+/*
+ * Copyright (c) 2010
+ * Gedare Bloom
+ *
+ * The license and distribution terms for this file may be found in the file
+ * LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
+ * 
+ * $Id$
+ */
+
+#include <rtems/asm.h>
+
+.text
+
+PUBLIC(halt)
+  .global halt
+  SYM(halt):
+	b halt
+	nop
Index: c/src/lib/libbsp/sparc64/shared/clock/ckinit.c
===================================================================
--- c/src/lib/libbsp/sparc64/shared/clock/ckinit.c	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/clock/ckinit.c	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,118 @@
+/*  ckinit.c
+ *
+ *  This file provides a template for the clock device driver initialization.
+ *
+ *  Modified for sun4v - niagara
+ *
+ *  COPYRIGHT (c) 1989-1999.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  Modifications Copyright (c) 2010 Gedare Bloom.
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.com/license/LICENSE.
+ *
+ *  $Id$
+ */
+
+#include <stdlib.h>
+
+#include <rtems.h>
+#include <bsp.h>
+#include <bspopts.h>
+#include <boot/ofw.h>
+
+/* this is default frequency for simics simulator of niagara. Use the 
+ * get_Frequency function to determine the CPU clock frequency at runtime.
+ */
+#define CPU_FREQ (5000000)
+
+uint64_t sparc64_cycles_per_tick;
+
+/* TICK_CMPR and STICK_CMPR trigger soft interrupt 14 */
+#define CLOCK_VECTOR SPARC_SYNCHRONOUS_TRAP(0x4E)
+
+static unsigned int get_Frequency(void)
+{
+	phandle root = ofw_find_device("/");
+	unsigned int freq;
+	if (ofw_get_property(root, "clock-frequency", &freq, sizeof(freq)) <= 0) {
+		printk("Unable to determine frequency, default: 0x%x\n",CPU_FREQ);
+		return CPU_FREQ;
+	}
+
+	return freq;
+} 
+
+
+void Clock_driver_support_at_tick(void)
+{
+  uint64_t tick_reg;
+  int bit_mask;
+
+
+  bit_mask = SPARC_SOFTINT_TM_MASK | SPARC_SOFTINT_SM_MASK | (1<<14);
+  sparc64_clear_interrupt_bits(bit_mask);
+
+  /* Note: sun4v uses stick_cmpr for clock driver for M5 simulator, which 
+   * does not currently have tick_cmpr implemented */
+  /* TODO: this could be more efficiently implemented as a single assembly 
+   * inline */
+#if defined (SUN4U)
+  sparc64_read_tick(tick_reg);
+#elif defined (SUN4V)
+  sparc64_read_stick(tick_reg);
+#endif
+  tick_reg &= ~(1UL<<63); /* mask out NPT bit, prevents int_dis from being set */
+
+  tick_reg += sparc64_cycles_per_tick;
+
+#if defined (SUN4U)
+  sparc64_write_tick_cmpr(tick_reg);
+#elif defined (SUN4V)
+  sparc64_write_stick_cmpr(tick_reg);
+#endif
+}
+
+#define Clock_driver_support_install_isr(_new, _old) \
+  do { \
+    _old = set_vector( _new, CLOCK_VECTOR, 1 ); \
+  } while ( 0 )
+
+void Clock_driver_support_initialize_hardware(void)
+{
+  uint64_t tick_reg; 	
+  int bit_mask;
+
+
+  bit_mask = SPARC_SOFTINT_TM_MASK | SPARC_SOFTINT_SM_MASK | (1<<14);
+  sparc64_clear_interrupt_bits(bit_mask);
+
+  sparc64_cycles_per_tick = rtems_configuration_get_microseconds_per_tick()*(get_Frequency()/1000000);
+
+#if defined (SUN4U)
+  sparc64_read_tick(tick_reg);
+#elif defined (SUN4V)
+  sparc64_read_stick(tick_reg);
+#endif
+
+  tick_reg &= ~(1UL<<63); /* mask out NPT bit, prevents int_dis from being set */
+  tick_reg += sparc64_cycles_per_tick;
+
+#if defined (SUN4U)
+  sparc64_write_tick_cmpr(tick_reg);
+#elif defined (SUN4V)
+  sparc64_write_stick_cmpr(tick_reg);
+#endif
+}
+
+
+#define Clock_driver_support_shutdown_hardware( ) \
+  do { \
+    \
+  } while ( 0 )
+
+
+#include "../../../shared/clockdrv_shell.h"
+
Index: c/src/lib/libbsp/sparc64/shared/console/conscfg.c
===================================================================
--- c/src/lib/libbsp/sparc64/shared/console/conscfg.c	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/console/conscfg.c	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,115 @@
+/*
+ *  COPYRIGHT (c) 2010 Eugen Leontie.
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.com/license/LICENSE.
+ *
+ *  $Id$
+ */
+
+
+#include <bsp.h>
+
+#include <libchip/serial.h>
+
+extern void ofw_write(const char *,const int );
+extern void ofw_read(void *,int );
+
+int sun4v_console_device_first_open(int major, int minor, void *arg)
+{
+	return 0;
+}
+
+static ssize_t sun4v_console_poll_write(int minor, const char *buf, size_t n)
+{
+	ofw_write(buf, n);
+	return 0;
+}
+
+void sun4v_console_deviceInitialize (int minor)
+{
+	
+}
+
+int sun4v_console_poll_read(int minor){
+	int a;
+	ofw_read(&a,1);
+	if(a!=0){
+		return a>>24;
+	}
+	return -1;
+}
+
+
+bool sun4v_console_deviceProbe (int minor){
+	return true;
+}
+
+/*
+ *  Polled mode functions
+ */
+console_fns pooled_functions={
+ sun4v_console_deviceProbe, /*bool    (*deviceProbe)(int minor);*/
+ sun4v_console_device_first_open, /*int     (*deviceFirstOpen)(int major, int minor, void *arg);*/
+ NULL, /*int     (*deviceLastClose)(int major, int minor, void *arg);*/
+ sun4v_console_poll_read, /*int     (*deviceRead)(int minor);*/
+ sun4v_console_poll_write, /*ssize_t     (*deviceWrite)(int minor, const char *buf, size_t len);*/
+ sun4v_console_deviceInitialize, /*void    (*deviceInitialize)(int minor);*/
+ NULL, /*void    (*deviceWritePolled)(int minor, char cChar);*/
+ NULL, /*int     (*deviceSetAttributes)(int minor, const struct termios *t);*/
+ NULL /*bool    deviceOutputUsesInterrupts;*/
+};
+
+console_flow sun4v_console_console_flow={
+  NULL,/*int (*deviceStopRemoteTx)(int minor);*/
+  NULL/*int (*deviceStartRemoteTx)(int minor);*/
+};
+
+
+console_tbl     Console_Port_Tbl[] = {
+{
+  "/dev/console",                          /* sDeviceName */
+   SERIAL_CUSTOM,                    	   /* deviceType */
+   &pooled_functions,                      /* pDeviceFns */
+   NULL,              						/* deviceProbe, assume it is there */
+   &sun4v_console_console_flow,             /* pDeviceFlow */
+   0,                                      /* ulMargin */
+   0,                                      /* ulHysteresis */
+   (void *) NULL,               /* NULL */ /* pDeviceParams */
+   0,  									   /* ulCtrlPort1 */
+   0,                   				   /* ulCtrlPort2 */
+   1,                          	           /* ulDataPort */
+   NULL,                                   /* getRegister */
+   NULL,                                   /* setRegister */
+   NULL, /* unused */                      /* getData */
+   NULL, /* unused */                      /* setData */
+   0,                             		   /* ulClock */
+   0      							   	   /* ulIntVector -- base for port */
+},
+};
+
+
+
+/*
+ *  Declare some information used by the console driver
+ */
+
+#define NUM_CONSOLE_PORTS 1
+
+unsigned long  Console_Port_Count = NUM_CONSOLE_PORTS;
+
+console_data  Console_Port_Data[NUM_CONSOLE_PORTS];
+
+rtems_device_minor_number  Console_Port_Minor;
+
+
+/* putchar/getchar for printk */
+
+static void bsp_out_char (char c)
+{
+  ofw_write(&c, 1);
+}
+
+BSP_output_char_function_type BSP_output_char = bsp_out_char;
+
Index: c/src/lib/libbsp/sparc64/shared/helenos/LICENSE
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/LICENSE	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/LICENSE	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,10 @@
+Copyright (C) 2001-2009 HelenOS project
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without modification, are permitted provided that the following conditions are met:
+
+    * Redistributions of source code must retain the above copyright notice, this list of conditions and the following disclaimer.
+    * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following disclaimer in the documentation and/or other materials provided with the distribution.
+    * The name of the author may not be used to endorse or promote products derived from this software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Index: c/src/lib/libbsp/sparc64/shared/helenos/README
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/README	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/README	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,53 @@
+# 
+# $Id$
+#
+
+The sources in this directory are from the HelenOS project.
+See: http://www.helenos.org
+
+These sources are from release 0.4.2 
+See: http://www.helenos.org/releases/HelenOS-0.4.2.tar.bz2
+
+Unless otherwise indicated, these files are licensed under a BSD-like 
+license without advertising clause.
+See: http://www.helenos.org/license
+Or the file LICENSE in this directory.
+
+Source modifications are mostly documented in the individual source code files.
+Source that is removed is discarded by #ifdef 0 ... #endif blocks.
+
+The subdirectories here correspond to the following subdirectories in the 
+HelenOS source tree (as of release 0.4.2):
+
+boot
+HelenOS-0.4.2/boot
+Various subdirectories related to booting the sparc64
+
+boot/genarch
+HelenOS-0.4.2/boot/genarch
+
+boot/generic
+HelenOS-0.4.2/boot/generic
+
+boot/include
+Various .h files from the following directories:
+  HelenOS-0.4.2/boot/genarch
+  HelenOS-0.4.2/boot/generic
+  HelenOS-0.4.2/boot/arch/sparc64/loader
+
+boot/sparc64
+HelenOS-0.4.2/boot/arch/sparc64
+
+kernel
+HelenOS-0.4.2/kernel
+Various subdirectories related to kernel code and services for the sparc64
+
+kernel/genarch
+HelenOS-0.4.2/kernel/genarch
+
+kernel/generic
+HelenOS-0.4.2/kernel/generic
+
+kernel/sparc64
+HelenOS-0.4.2/kernel/arch/sparc64/
+
Index: c/src/lib/libbsp/sparc64/shared/helenos/boot/genarch/balloc.c
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/boot/genarch/balloc.c	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/boot/genarch/balloc.c	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * $Id$
+ *
+ * Modifications are made to compile for RTEMS. Removes asm.h and replaces 
+ * the necessary defines in-line
+ *
+ */
+
+
+#include <boot/balloc.h>
+#if 0
+#include <asm.h>
+#endif
+#include <boot/types.h>
+#include <boot/align.h>
+
+static ballocs_t *ballocs;
+static uintptr_t phys_base;
+
+void balloc_init(ballocs_t *ball, uintptr_t base, uintptr_t kernel_base)
+{
+	ballocs = ball;
+	phys_base = base;
+	ballocs->base = kernel_base;
+	ballocs->size = 0;
+}
+
+void *balloc(size_t size, size_t alignment)
+{
+	/* Enforce minimal alignment. */
+	alignment = ALIGN_UP(alignment, 4);
+	
+	uintptr_t addr = phys_base + ALIGN_UP(ballocs->size, alignment);
+	
+	if (ALIGN_UP(ballocs->size, alignment) + size > BALLOC_MAX_SIZE)
+		return NULL;
+	
+	ballocs->size = ALIGN_UP(ballocs->size, alignment) + size;
+	
+	return (void *) addr;
+}
+
+void *balloc_rebase(void *ptr)
+{
+	return (void *) ((uintptr_t) ptr - phys_base + ballocs->base);
+}
Index: c/src/lib/libbsp/sparc64/shared/helenos/boot/genarch/ofw.c
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/boot/genarch/ofw.c	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/boot/genarch/ofw.c	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,466 @@
+/*
+ * Copyright (c) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * $Id$
+ *
+ * Modifications are made to compile for RTEMS. Removes asm.h and printf.h.
+ * Adds asm.h (rtems bsp). Adds ofw_read() and ofw_stdin variable. Uses 
+ * printk instead of puts for error messages.
+ *
+ */
+
+#include <bsp.h>
+#include <rtems/bspIo.h>
+
+#include <boot/ofw.h>
+#include <boot/ofwarch.h>
+#if 0
+#include <boot/printf.h>
+#include <boot/asm.h>
+#endif
+#include <boot/types.h>
+#include <string.h>
+#include <asm.h>
+
+#define RED(i)    (((i) >> 5) & ((1 << 3) - 1))
+#define GREEN(i)  (((i) >> 3) & ((1 << 2) - 1))
+#define BLUE(i)   ((i) & ((1 << 3) - 1))
+#define CLIP(i)   ((i) <= 255 ? (i) : 255)
+
+uintptr_t ofw_cif;
+
+phandle ofw_chosen;
+ihandle ofw_stdout;
+ihandle ofw_stdin;
+
+phandle ofw_root;
+ihandle ofw_mmu;
+ihandle ofw_memory_prop;
+phandle ofw_memory;
+
+void ofw_init(void)
+{
+	ofw_chosen = ofw_find_device("/chosen");
+	if (ofw_chosen == -1)
+		halt();
+	
+	if (ofw_get_property(ofw_chosen, "stdout", &ofw_stdout,
+	    sizeof(ofw_stdout)) <= 0)
+		ofw_stdout = 0;
+	
+  if (ofw_get_property(ofw_chosen, "stdin", &ofw_stdin,
+		sizeof(ofw_stdin)) <= 0)
+		ofw_stdin = 0;
+
+	ofw_root = ofw_find_device("/");
+	if (ofw_root == -1) {
+		printk("\r\nError: Unable to find / device, halted.\r\n");
+		halt();
+	}
+	
+	if (ofw_get_property(ofw_chosen, "mmu", &ofw_mmu,
+	    sizeof(ofw_mmu)) <= 0) {
+		printk("\r\nError: Unable to get mmu property, halted.\r\n");
+		halt();
+	}
+	if (ofw_get_property(ofw_chosen, "memory", &ofw_memory_prop,
+	    sizeof(ofw_memory_prop)) <= 0) {
+		printk("\r\nError: Unable to get memory property, halted.\r\n");
+		halt();
+	}
+	
+	ofw_memory = ofw_find_device("/memory");
+	if (ofw_memory == -1) {
+		printk("\r\nError: Unable to find /memory device, halted.\r\n");
+		halt();
+	}
+}
+
+/** Perform a call to OpenFirmware client interface.
+ *
+ * @param service String identifying the service requested.
+ * @param nargs   Number of input arguments.
+ * @param nret    Number of output arguments. This includes the return
+ *                value.
+ * @param rets    Buffer for output arguments or NULL. The buffer must
+ *                accommodate nret - 1 items.
+ *
+ * @return Return value returned by the client interface.
+ *
+ */
+unsigned long
+ofw_call(const char *service, const int nargs, const int nret, ofw_arg_t *rets,
+    ...)
+{
+	va_list list;
+	ofw_args_t args;
+	int i;
+	
+	args.service = (ofw_arg_t) service;
+	args.nargs = nargs;
+	args.nret = nret;
+	
+	va_start(list, rets);
+	for (i = 0; i < nargs; i++)
+		args.args[i] = va_arg(list, ofw_arg_t);
+	va_end(list);
+	
+	for (i = 0; i < nret; i++)
+		args.args[i + nargs] = 0;
+	
+	(void) ofw(&args);
+
+	for (i = 1; i < nret; i++)
+		rets[i - 1] = args.args[i + nargs];
+
+	return args.args[nargs];
+}
+
+phandle ofw_find_device(const char *name)
+{
+	return ofw_call("finddevice", 1, 1, NULL, name);
+}
+
+int ofw_get_property(const phandle device, const char *name, void *buf,
+    const int buflen)
+{
+	return ofw_call("getprop", 4, 1, NULL, device, name, buf, buflen);
+}
+
+int ofw_get_proplen(const phandle device, const char *name)
+{
+	return ofw_call("getproplen", 2, 1, NULL, device, name);
+}
+
+int ofw_next_property(const phandle device, char *previous, char *buf)
+{
+	return ofw_call("nextprop", 3, 1, NULL, device, previous, buf);
+}
+
+int ofw_package_to_path(const phandle device, char *buf, const int buflen)
+{
+	return ofw_call("package-to-path", 3, 1, NULL, device, buf, buflen);
+}
+
+unsigned int ofw_get_address_cells(const phandle device)
+{
+	unsigned int ret = 1;
+	
+	if (ofw_get_property(device, "#address-cells", &ret, sizeof(ret)) <= 0)
+		if (ofw_get_property(ofw_root, "#address-cells", &ret,
+		    sizeof(ret)) <= 0)
+			ret = OFW_ADDRESS_CELLS;
+	
+	return ret;
+}
+
+unsigned int ofw_get_size_cells(const phandle device)
+{
+	unsigned int ret;
+	
+	if (ofw_get_property(device, "#size-cells", &ret, sizeof(ret)) <= 0)
+		if (ofw_get_property(ofw_root, "#size-cells", &ret,
+		    sizeof(ret)) <= 0)
+			ret = OFW_SIZE_CELLS;
+	
+	return ret;
+}
+
+phandle ofw_get_child_node(const phandle node)
+{
+	return ofw_call("child", 1, 1, NULL, node);
+}
+
+phandle ofw_get_peer_node(const phandle node)
+{
+	return ofw_call("peer", 1, 1, NULL, node);
+}
+
+static ihandle ofw_open(const char *name)
+{
+	return ofw_call("open", 1, 1, NULL, name);
+}
+
+
+void ofw_write(const char *str, const int len)
+{
+	if (ofw_stdout == 0)
+		return;
+	
+	ofw_call("write", 3, 1, NULL, ofw_stdout, str, len);
+}
+
+void ofw_read(void *str, const int len)
+{
+  if (ofw_stdin == 0)
+    return;
+
+  ofw_call("read", 3, 1, NULL, ofw_stdin, str, len);
+}
+
+void *ofw_translate(const void *virt)
+{
+	ofw_arg_t result[4];
+	int shift;
+
+	if (ofw_call("call-method", 4, 5, result, "translate", ofw_mmu,
+	    virt, 0) != 0) {
+		printk("Error: MMU method translate() failed, halting.\n");
+		halt();
+	}
+
+	if (ofw_translate_failed(result[0]))
+		return NULL;
+
+	if (sizeof(unative_t) == 8)
+		shift = 32;
+	else
+		shift = 0;
+
+	return (void *) ((result[2] << shift) | result[3]);
+}
+
+void *ofw_claim_virt(const void *virt, const unsigned int len)
+{
+	ofw_arg_t retaddr;
+
+	if (ofw_call("call-method", 5, 2, &retaddr, "claim", ofw_mmu, 0, len,
+	    virt) != 0) {
+		printk("Error: MMU method claim() failed, halting.\n");
+		halt();
+	}
+
+	return (void *) retaddr;
+}
+
+static void *ofw_claim_phys_internal(const void *phys, const unsigned int len, const unsigned int alignment)
+{
+	/*
+	 * Note that the return value check will help
+	 * us to discover conflicts between OpenFirmware
+	 * allocations and our use of physical memory.
+	 * It is better to detect collisions here
+	 * than to cope with weird errors later.
+	 *
+	 * So this is really not to make the loader
+	 * more generic; it is here for debugging
+	 * purposes.
+	 */
+	
+	if (sizeof(unative_t) == 8) {
+		ofw_arg_t retaddr[2];
+		int shift = 32;
+		
+		if (ofw_call("call-method", 6, 3, retaddr, "claim",
+		    ofw_memory_prop, alignment, len, ((uintptr_t) phys) >> shift,
+		    ((uintptr_t) phys) & ((uint32_t) -1)) != 0) {
+			printk("Error: memory method claim() failed, halting.\n");
+			halt();
+		}
+		
+		return (void *) ((retaddr[0] << shift) | retaddr[1]);
+	} else {
+		ofw_arg_t retaddr[1];
+		
+		if (ofw_call("call-method", 5, 2, retaddr, "claim",
+		    ofw_memory_prop, alignment, len, (uintptr_t) phys) != 0) {
+			printk("Error: memory method claim() failed, halting.\n");
+			halt();
+		}
+		
+		return (void *) retaddr[0];
+	}
+}
+
+void *ofw_claim_phys(const void *phys, const unsigned int len)
+{
+	return ofw_claim_phys_internal(phys, len, 0);
+}
+
+void *ofw_claim_phys_any(const unsigned int len, const unsigned int alignment)
+{
+	return ofw_claim_phys_internal(NULL, len, alignment);
+}
+
+int ofw_map(const void *phys, const void *virt, const unsigned int size, const int mode)
+{
+	uintptr_t phys_hi, phys_lo;
+
+	if (sizeof(unative_t) == 8) {
+		int shift = 32;
+		phys_hi = (uintptr_t) phys >> shift;
+		phys_lo = (uintptr_t) phys & 0xffffffff;
+	} else {
+		phys_hi = 0;
+		phys_lo = (uintptr_t) phys;
+	}
+
+	return ofw_call("call-method", 7, 1, NULL, "map", ofw_mmu, mode, size,
+	    virt, phys_hi, phys_lo);
+}
+
+/** Save OpenFirmware physical memory map.
+ *
+ * @param map Memory map structure where the map will be saved.
+ *
+ * @return Zero on failure, non-zero on success.
+ */
+int ofw_memmap(memmap_t *map)
+{
+	unsigned int ac = ofw_get_address_cells(ofw_memory) /
+	    (sizeof(uintptr_t) / sizeof(uint32_t));
+	unsigned int sc = ofw_get_size_cells(ofw_memory) /
+	    (sizeof(uintptr_t) / sizeof(uint32_t));
+
+	uintptr_t buf[((ac + sc) * MEMMAP_MAX_RECORDS)];
+	int ret = ofw_get_property(ofw_memory, "reg", buf, sizeof(buf));
+	if (ret <= 0)		/* ret is the number of written bytes */
+		return false;
+
+	int pos;
+	map->total = 0;
+	map->count = 0;
+	for (pos = 0; (pos < ret / sizeof(uintptr_t)) &&
+	    (map->count < MEMMAP_MAX_RECORDS); pos += ac + sc) {
+		void *start = (void *) (buf[pos + ac - 1]);
+		unsigned int size = buf[pos + ac + sc - 1];
+
+		/*
+		 * This is a hot fix of the issue which occurs on machines
+		 * where there are holes in the physical memory (such as
+		 * SunBlade 1500). Should we detect a hole in the physical
+		 * memory, we will ignore any memory detected behind
+		 * the hole and pretend the hole does not exist.
+		 */
+		if ((map->count > 0) && (map->zones[map->count - 1].start +
+		    map->zones[map->count - 1].size < start))
+			break;
+
+		if (size > 0) {
+			map->zones[map->count].start = start;
+			map->zones[map->count].size = size;
+			map->count++;
+			map->total += size;
+		}
+	}
+	
+	return true;
+}
+
+static void ofw_setup_screen(phandle handle)
+{
+	/* Check for device type */
+	char device_type[OFW_TREE_PROPERTY_MAX_VALUELEN];
+	if (ofw_get_property(handle, "device_type", device_type, OFW_TREE_PROPERTY_MAX_VALUELEN) <= 0)
+		return;
+	
+	device_type[OFW_TREE_PROPERTY_MAX_VALUELEN - 1] = '\0';
+	if (strcmp(device_type, "display") != 0)
+		return;
+	
+	/* Check for 8 bit depth */
+	uint32_t depth;
+	if (ofw_get_property(handle, "depth", &depth, sizeof(uint32_t)) <= 0)
+		depth = 0;
+	
+	/* Get device path */
+	static char path[OFW_TREE_PATH_MAX_LEN + 1];
+	size_t len = ofw_package_to_path(handle, path, OFW_TREE_PATH_MAX_LEN);
+	if (len == -1)
+		return;
+	
+	path[len] = '\0';
+	
+	/* Open the display to initialize it */
+	ihandle screen = ofw_open(path);
+	if (screen == -1)
+		return;
+	
+	if (depth == 8) {
+		/* Setup the palette so that the (inverted) 3:2:3 scheme is usable */
+		unsigned int i;
+		for (i = 0; i < 256; i++) {
+			ofw_call("call-method", 6, 1, NULL, "color!", screen,
+			    255 - i, CLIP(BLUE(i) * 37), GREEN(i) * 85, CLIP(RED(i) * 37));
+		}
+	}
+}
+
+static void ofw_setup_screens_internal(phandle current)
+{
+	while ((current != 0) && (current != -1)) {
+		ofw_setup_screen(current);
+		
+		/*
+		 * Recursively process the potential child node.
+		 */
+		phandle child = ofw_get_child_node(current);
+		if ((child != 0) && (child != -1))
+			ofw_setup_screens_internal(child);
+		
+		/*
+		 * Iteratively process the next peer node.
+		 * Note that recursion is a bad idea here.
+		 * Due to the topology of the OpenFirmware device tree,
+		 * the nesting of peer nodes could be to wide and the
+		 * risk of overflowing the stack is too real.
+		 */
+		phandle peer = ofw_get_peer_node(current);
+		if ((peer != 0) && (peer != -1)) {
+			current = peer;
+			/*
+			 * Process the peer in next iteration.
+			 */
+			continue;
+		}
+		
+		/*
+		 * No more peers on this level.
+		 */
+		break;
+	}
+}
+
+/** Setup all screens which can be detected.
+ *
+ * Open all screens which can be detected and set up the palette for the 8-bit
+ * color depth configuration so that the 3:2:3 color scheme can be used.
+ * Check that setting the palette makes sense (the color depth is not greater
+ * than 8).
+ *
+ */
+void ofw_setup_screens(void)
+{
+	ofw_setup_screens_internal(ofw_root);
+}
+
+void ofw_quiesce(void)
+{
+	ofw_call("quiesce", 0, 0, NULL);
+}
Index: c/src/lib/libbsp/sparc64/shared/helenos/boot/genarch/ofw_tree.c
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/boot/genarch/ofw_tree.c	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/boot/genarch/ofw_tree.c	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,257 @@
+/*
+ * Copyright (c) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * $Id$
+ *
+ * Modifications are made to compile for RTEMS. Removes asm.h and memstr.h.
+ *
+ */
+
+
+#include <boot/ofw_tree.h>
+#include <boot/ofw.h>
+#include <boot/ofwarch.h>
+#include <boot/types.h>
+#include <string.h>
+#include <boot/balloc.h>
+#if 0
+#include <asm.h>
+#include <memstr.h>
+#endif
+
+static ofw_tree_node_t *ofw_tree_node_alloc(void)
+{
+	return balloc(sizeof(ofw_tree_node_t), sizeof(ofw_tree_node_t));
+}
+
+static ofw_tree_property_t *ofw_tree_properties_alloc(unsigned count)
+{
+	return balloc(count * sizeof(ofw_tree_property_t),
+	    sizeof(ofw_tree_property_t));
+}
+
+static void *ofw_tree_space_alloc(size_t size)
+{
+	/*
+	 * What we do here is a nasty hack :-)
+	 * Problem: string property values that are allocated via this
+	 * function typically do not contain the trailing '\0'. This
+	 * is very uncomfortable for kernel, which is supposed to deal
+	 * with the properties.
+	 * Solution: when allocating space via this function, we always
+	 * allocate space for the extra '\0' character that we store
+	 * behind the requested memory.
+	 */
+	char *addr = balloc(size + 1, size);
+	if (addr)
+		addr[size] = '\0';
+	
+	return addr;
+}
+
+/** Transfer information from one OpenFirmware node into its memory
+ * representation.
+ *
+ * Transfer entire information from the OpenFirmware device tree 'current' node
+ * to its memory representation in 'current_node'. This function recursively
+ * processes all node's children. Node's peers are processed iteratively in
+ * order to prevent stack from overflowing.
+ *
+ * @param current_node Pointer to uninitialized ofw_tree_node structure that
+ *                     will become the memory represenation of 'current'.
+ * @param parent_node  Parent ofw_tree_node structure or NULL in case of root
+ *                     node.
+ * @param current      OpenFirmware phandle to the current device tree node.
+ *
+ */
+static void ofw_tree_node_process(ofw_tree_node_t *current_node,
+    ofw_tree_node_t *parent_node, phandle current)
+{
+	while (current_node) {
+		/*
+		 * Initialize node.
+		 */
+		current_node->parent = (ofw_tree_node_t *) balloc_rebase(parent_node);
+		current_node->peer = NULL;
+		current_node->child = NULL;
+		current_node->node_handle = current;
+		current_node->properties = 0;
+		current_node->property = NULL;
+		current_node->device = NULL;
+		
+		/*
+		 * Get the disambigued name.
+		 */
+		static char path[OFW_TREE_PATH_MAX_LEN + 1];
+		size_t len = ofw_package_to_path(current, path, OFW_TREE_PATH_MAX_LEN);
+		if (len == -1)
+			return;
+		
+		path[len] = '\0';
+		
+		/* Find last slash */
+		int i;
+		for (i = len - 1; (i >= 0) && (path[i] != '/'); i--);
+		
+		/* Do not include the slash */
+		i++;
+		len -= i;
+		
+		/* Add space for trailing '\0' */
+		char *da_name = ofw_tree_space_alloc(len + 1);
+		if (!da_name)
+			return;
+		
+		memcpy(da_name, &path[i], len);
+		da_name[len] = '\0';
+		current_node->da_name = (char *) balloc_rebase(da_name);
+		
+		/*
+		 * Recursively process the potential child node.
+		 */
+		phandle child = ofw_get_child_node(current);
+		if ((child != 0) && (child != -1)) {
+			ofw_tree_node_t *child_node = ofw_tree_node_alloc();
+			if (child_node) {
+				ofw_tree_node_process(child_node, current_node,
+				    child);
+				current_node->child =
+				    (ofw_tree_node_t *) balloc_rebase(child_node);
+			}
+		}
+		
+		/*
+		 * Count properties.
+		 */
+		static char name[OFW_TREE_PROPERTY_MAX_NAMELEN];
+		static char name2[OFW_TREE_PROPERTY_MAX_NAMELEN];
+		name[0] = '\0';
+		while (ofw_next_property(current, name, name2) == 1) {
+			current_node->properties++;
+			memcpy(name, name2, OFW_TREE_PROPERTY_MAX_NAMELEN);
+		}
+		
+		if (!current_node->properties)
+			return;
+		
+		/*
+		 * Copy properties.
+		 */
+		ofw_tree_property_t *property =
+		    ofw_tree_properties_alloc(current_node->properties);
+		if (!property)
+			return;
+		
+		name[0] = '\0';
+		for (i = 0; ofw_next_property(current, name, name2) == 1; i++) {
+			if (i == current_node->properties)
+				break;
+			
+			memcpy(name, name2, OFW_TREE_PROPERTY_MAX_NAMELEN);
+			memcpy(property[i].name, name, OFW_TREE_PROPERTY_MAX_NAMELEN);
+			property[i].name[OFW_TREE_PROPERTY_MAX_NAMELEN - 1] = '\0';
+			
+			size_t size = ofw_get_proplen(current, name);
+			property[i].size = size;
+			
+			if (size) {
+				void *buf = ofw_tree_space_alloc(size);
+				if (buf) {
+					/*
+					 * Copy property value to memory node.
+					 */
+					(void) ofw_get_property(current, name, buf, size);
+					property[i].value = balloc_rebase(buf);
+				}
+			} else
+				property[i].value = NULL;
+		}
+		
+		/* Just in case we ran out of memory. */
+		current_node->properties = i;
+		current_node->property = (ofw_tree_property_t *) balloc_rebase(property);
+		
+		
+		/*
+		 * Iteratively process the next peer node.
+		 * Note that recursion is a bad idea here.
+		 * Due to the topology of the OpenFirmware device tree,
+		 * the nesting of peer nodes could be to wide and the
+		 * risk of overflowing the stack is too real.
+		 */
+		phandle peer = ofw_get_peer_node(current);
+		if ((peer != 0) && (peer != -1)) {
+			ofw_tree_node_t *peer_node = ofw_tree_node_alloc();
+			if (peer_node) {
+				current_node->peer = (ofw_tree_node_t *) balloc_rebase(peer_node);
+				current_node = peer_node;
+				current = peer;
+				/*
+				 * Process the peer in next iteration.
+				 */
+				continue;
+			}
+		}
+		
+		/*
+		 * No more peers on this level.
+		 */
+		break;
+	}
+}
+
+/** Construct memory representation of OpenFirmware device tree.
+ *
+ * @return NULL on failure or kernel pointer to the root node.
+ *
+ */
+ofw_tree_node_t *ofw_tree_build(void)
+{
+	ofw_tree_node_t *root = ofw_tree_node_alloc();
+	if (root)
+		ofw_tree_node_process(root, NULL, ofw_root);
+	
+	/*
+	 * The firmware client interface does not automatically include the
+	 * "ssm" node in the list of children of "/". A nasty yet working
+	 * solution is to explicitly stick "ssm" to the OFW tree.
+	 */
+	phandle ssm_node = ofw_find_device("/ssm@0,0");
+	if (ssm_node != -1) {
+		ofw_tree_node_t *ssm = ofw_tree_node_alloc();
+		if (ssm) {
+			ofw_tree_node_process(ssm, root,
+			    ofw_find_device("/ssm@0,0"));
+			ssm->peer = root->child;
+			root->child = (ofw_tree_node_t *) balloc_rebase(ssm);
+		}
+	}
+	
+	return (ofw_tree_node_t *) balloc_rebase(root);
+}
Index: c/src/lib/libbsp/sparc64/shared/helenos/boot/generic/string.c
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/boot/generic/string.c	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/boot/generic/string.c	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,213 @@
+/*
+ * Copyright (c) 2001-2004 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup generic	
+ * @{
+ */
+
+/*
+ * $Id$
+ *
+ * Modifications are made to compile for RTEMS. Remove strncpy() and atoi() 
+ *
+ */
+
+
+#include <string.h>
+
+/**
+ * @file
+ * @brief	String manipulation functions.
+ */
+
+/** Return number of characters in a string.
+ *
+ * @param str		NULL terminated string.
+ *
+ * @return		Number of characters in str.
+ */
+size_t strlen(const char *str)
+{
+	int i;
+	
+	for (i = 0; str[i]; i++)
+		;
+	
+	return i;
+}
+
+/** Compare two NULL terminated strings.
+ *
+ * Do a char-by-char comparison of two NULL terminated strings.
+ * The strings are considered equal iff they consist of the same
+ * characters on the minimum of their lengths.
+ *
+ * @param src		First string to compare.
+ * @param dst		Second string to compare.
+ *
+ * @return		0 if the strings are equal, -1 if first is smaller,
+ * 			1 if second smaller.
+ *
+ */
+int strcmp(const char *src, const char *dst)
+{
+	for (; *src && *dst; src++, dst++) {
+		if (*src < *dst)
+			return -1;
+		if (*src > *dst)
+			return 1;
+	}
+	if (*src == *dst)
+		return 0;
+	if (!*src)
+		return -1;
+	return 1;
+}
+
+
+/** Compare two NULL terminated strings.
+ *
+ * Do a char-by-char comparison of two NULL terminated strings.
+ * The strings are considered equal iff they consist of the same
+ * characters on the minimum of their lengths and specified maximal
+ * length.
+ *
+ * @param src		First string to compare.
+ * @param dst		Second string to compare.
+ * @param len		Maximal length for comparison.
+ *
+ * @return		0 if the strings are equal, -1 if first is smaller,
+ * 			1 if second smaller.
+ *
+ */
+int strncmp(const char *src, const char *dst, size_t len)
+{
+	int i;
+	
+	for (i = 0; *src && *dst && i < len; src++, dst++, i++) {
+		if (*src < *dst)
+			return -1;
+		if (*src > *dst)
+			return 1;
+	}
+	if (i == len || *src == *dst)
+		return 0;
+	if (!*src)
+		return -1;
+	return 1;
+}
+#if 0
+/** Copy NULL terminated string.
+ *
+ * Copy at most 'len' characters from string 'src' to 'dest'.
+ * If 'src' is shorter than 'len', '\0' is inserted behind the
+ * last copied character.
+ *
+ * @param src		Source string.
+ * @param dest		Destination buffer.
+ * @param len		Size of destination buffer.
+ */
+void strncpy(char *dest, const char *src, size_t len)
+{
+	int i;
+	for (i = 0; i < len; i++) {
+		if (!(dest[i] = src[i]))
+			return;
+	}
+	dest[i-1] = '\0';
+}
+
+/** Convert ascii representation to unative_t.
+ *
+ * Supports 0x for hexa & 0 for octal notation.
+ * Does not check for overflows, does not support negative numbers
+ *
+ * @param text		Textual representation of number.
+ * @return		Converted number or 0 if no valid number found.
+ */
+unative_t atoi(const char *text)
+{
+	int base = 10;
+	unative_t result = 0;
+
+	if (text[0] == '0' && text[1] == 'x') {
+		base = 16;
+		text += 2;
+	} else if (text[0] == '0')
+		base = 8;
+
+	while (*text) {
+		if (base != 16 &&
+		    ((*text >= 'A' && *text <= 'F') ||
+		    (*text >='a' && *text <='f')))
+			break;
+		if (base == 8 && *text >='8')
+			break;
+
+		if (*text >= '0' && *text <= '9') {
+			result *= base;
+			result += *text - '0';
+		} else if (*text >= 'A' && *text <= 'F') {
+			result *= base;
+			result += *text - 'A' + 10;
+		} else if (*text >= 'a' && *text <= 'f') {
+			result *= base;
+			result += *text - 'a' + 10;
+		} else
+			break;
+		text++;
+	}
+
+	return result;
+}
+#endif
+/** Move piece of memory to another, possibly overlapping, location.
+ *
+ * @param dst		Destination address.
+ * @param src		Source address.
+ * @param len		Number of bytes to move.
+ *
+ * @return		Destination address.
+ */
+void *memmove(void *dst, const void *src, size_t len)
+{
+	char *d = dst;
+	const char *s = src;
+	if (s < d) {
+		while (len--)
+			*(d + len) = *(s + len);
+	} else {
+		while (len--)
+			*d++ = *s++;
+	}
+	
+	return dst;
+}
+
+/** @}
+ */
Index: c/src/lib/libbsp/sparc64/shared/helenos/boot/include/align.h
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/boot/include/align.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/boot/include/align.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup generic
+ * @{
+ */
+/** @file
+ */
+
+#ifndef BOOT_ALIGN_H_
+#define BOOT_ALIGN_H_
+
+/** Align to the nearest higher address.
+ *
+ * @param addr  Address or size to be aligned.
+ * @param align Size of alignment, must be power of 2.
+ */
+#define ALIGN_UP(addr, align) (((addr) + ((align) - 1)) & ~((align) - 1))
+
+#endif
+
+/** @}
+ */
Index: c/src/lib/libbsp/sparc64/shared/helenos/boot/include/balloc.h
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/boot/include/balloc.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/boot/include/balloc.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * $Id$
+ *
+ * Modifications are made to compile for RTEMS. Move BALLOC_MAX_SIZE from 
+ * asm.h to here.
+ *
+ */
+
+
+#ifndef BOOT_BALLOC_H_
+#define BOOT_BALLOC_H_
+
+#include <boot/types.h>
+
+#define BALLOC_MAX_SIZE  (128 * 1024)
+
+typedef struct {
+	uintptr_t base;
+	size_t size;
+} ballocs_t;
+
+extern void balloc_init(ballocs_t *ball, uintptr_t base, uintptr_t kernel_base);
+extern void *balloc(size_t size, size_t alignment);
+extern void *balloc_rebase(void *ptr);
+
+#endif
Index: c/src/lib/libbsp/sparc64/shared/helenos/boot/include/gentypes.h
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/boot/include/gentypes.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/boot/include/gentypes.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup generic	
+ * @{
+ */
+/** @file
+ */
+
+#ifndef BOOT_GENTYPES_H_
+#define BOOT_GENTYPES_H_
+
+#define NULL 0
+#define false 0
+#define true 1
+
+typedef unsigned long size_t;
+
+#endif
+
+/** @}
+ */
Index: c/src/lib/libbsp/sparc64/shared/helenos/boot/include/main.h
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/boot/include/main.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/boot/include/main.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,75 @@
+/*
+ * Copyright (c) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef BOOT_sparc64_MAIN_H_
+#define BOOT_sparc64_MAIN_H_
+
+#include <boot/ofw.h>
+#include <boot/ofw_tree.h>
+#include <boot/balloc.h>
+#include <boot/types.h>
+
+#define KERNEL_VIRTUAL_ADDRESS  0x400000
+
+#define TASKMAP_MAX_RECORDS  32
+
+/** Size of buffer for storing task name in task_t. */
+#define BOOTINFO_TASK_NAME_BUFLEN  32
+
+#define BSP_PROCESSOR  1
+#define AP_PROCESSOR   0
+
+#define SUBARCH_US   1
+#define SUBARCH_US3  3
+
+typedef struct {
+	void *addr;
+	uint32_t size;
+	char name[BOOTINFO_TASK_NAME_BUFLEN];
+} task_t;
+
+typedef struct {
+	uint32_t count;
+	task_t tasks[TASKMAP_MAX_RECORDS];
+} taskmap_t;
+
+typedef struct {
+	uintptr_t physmem_start;
+	taskmap_t taskmap;
+	memmap_t memmap;
+	ballocs_t ballocs;
+	ofw_tree_node_t *ofw_root;
+} bootinfo_t;
+
+extern uint32_t silo_ramdisk_image;
+extern uint32_t silo_ramdisk_size;
+
+extern void start(void);
+extern void bootstrap(void);
+
+#endif
Index: c/src/lib/libbsp/sparc64/shared/helenos/boot/include/ofw.h
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/boot/include/ofw.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/boot/include/ofw.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,115 @@
+/*
+ * Copyright (c) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef BOOT_OFW_H_
+#define BOOT_OFW_H_
+
+#include <boot/types.h>
+#include <stdarg.h>
+
+#define MEMMAP_MAX_RECORDS  32
+#define MAX_OFW_ARGS        12
+
+#define OFW_TREE_PATH_MAX_LEN           256
+#define OFW_TREE_PROPERTY_MAX_NAMELEN   32
+#define OFW_TREE_PROPERTY_MAX_VALUELEN  64
+
+typedef unative_t ofw_arg_t;
+typedef unsigned int ihandle;
+typedef unsigned int phandle;
+
+/** OpenFirmware command structure
+ *
+ */
+typedef struct {
+	ofw_arg_t service;             /**< Command name. */
+	ofw_arg_t nargs;               /**< Number of in arguments. */
+	ofw_arg_t nret;                /**< Number of out arguments. */
+	ofw_arg_t args[MAX_OFW_ARGS];  /**< List of arguments. */
+} ofw_args_t;
+
+typedef struct {
+	void *start;
+	uint32_t size;
+} memzone_t;
+
+typedef struct {
+	uint32_t total;
+	uint32_t count;
+	memzone_t zones[MEMMAP_MAX_RECORDS];
+} memmap_t;
+
+typedef struct {
+	uint32_t info;
+	uint32_t addr_hi;
+	uint32_t addr_lo;
+} pci_addr_t;
+
+typedef struct {
+	pci_addr_t addr;
+	uint32_t size_hi;
+	uint32_t size_lo;
+} pci_reg_t;
+
+extern uintptr_t ofw_cif;
+
+extern phandle ofw_chosen;
+extern ihandle ofw_stdout;
+extern phandle ofw_root;
+extern ihandle ofw_mmu;
+extern phandle ofw_memory;
+
+extern void ofw_init(void);
+
+extern void ofw_write(const char *str, const int len);
+
+extern int ofw_get_property(const phandle device, const char *name, void *buf, const int buflen);
+extern int ofw_get_proplen(const phandle device, const char *name);
+extern int ofw_next_property(const phandle device, char *previous, char *buf);
+
+extern phandle ofw_get_child_node(const phandle node);
+extern phandle ofw_get_peer_node(const phandle node);
+extern phandle ofw_find_device(const char *name);
+
+extern int ofw_package_to_path(const phandle device, char *buf, const int buflen);
+
+extern int ofw(ofw_args_t *arg);
+extern unsigned long ofw_call(const char *service, const int nargs, const int nret, ofw_arg_t *rets, ...);
+extern unsigned int ofw_get_address_cells(const phandle device);
+extern unsigned int ofw_get_size_cells(const phandle device);
+extern void *ofw_translate(const void *virt);
+extern int ofw_translate_failed(ofw_arg_t flag);
+extern void *ofw_claim_virt(const void *virt, const unsigned int len);
+extern void *ofw_claim_phys(const void *virt, const unsigned int len);
+extern void *ofw_claim_phys_any(const unsigned int len, const unsigned int alignment);
+extern int ofw_map(const void *phys, const void *virt, const unsigned int size, const int mode);
+extern int ofw_memmap(memmap_t *map);
+extern void ofw_setup_screens(void);
+extern void ofw_quiesce(void);
+
+#endif
Index: c/src/lib/libbsp/sparc64/shared/helenos/boot/include/ofw_tree.h
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/boot/include/ofw_tree.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/boot/include/ofw_tree.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef BOOT_OFW_TREE_H_
+#define BOOT_OFW_TREE_H_
+
+#include <boot/types.h>
+#include <boot/ofw.h>
+
+
+/** Memory representation of OpenFirmware device tree node property. */
+typedef struct {
+	char name[OFW_TREE_PROPERTY_MAX_NAMELEN];
+	size_t size;
+	void *value;
+} ofw_tree_property_t;
+
+/** Memory representation of OpenFirmware device tree node. */
+typedef struct ofw_tree_node {
+	struct ofw_tree_node *parent;
+	struct ofw_tree_node *peer;
+	struct ofw_tree_node *child;
+	
+	uint32_t node_handle;           /**< Old OpenFirmware node handle. */
+	
+	char *da_name;                  /**< Disambigued name. */
+	
+	unsigned int properties;        /**< Number of properties. */
+	ofw_tree_property_t *property;
+	
+	void *device;                   /**< Member used solely by the kernel. */
+} ofw_tree_node_t;
+
+extern ofw_tree_node_t *ofw_tree_build(void);
+
+#endif
Index: c/src/lib/libbsp/sparc64/shared/helenos/boot/include/ofwarch.h
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/boot/include/ofwarch.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/boot/include/ofwarch.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef BOOT_sparc64_OFWARCH_H_
+#define BOOT_sparc64_OFWARCH_H_
+
+#include "main.h"
+#include "types.h"
+
+#define OFW_ADDRESS_CELLS  2
+#define OFW_SIZE_CELLS     2
+
+extern int ofw_cpu(uint16_t mid_mask, uintptr_t physmem_start);
+extern int ofw_get_physmem_start(uintptr_t *start);
+
+#endif
Index: c/src/lib/libbsp/sparc64/shared/helenos/boot/include/register.h
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/boot/include/register.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/boot/include/register.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef BOOT_sparc64_REGISTER_H_
+#define BOOT_sparc64_REGISTER_H_
+
+#define PSTATE_IE_BIT    2
+#define PSTATE_PRIV_BIT  4
+#define PSTATE_AM_BIT    8
+
+#define ASI_ICBUS_CONFIG        0x4a
+#define ICBUS_CONFIG_MID_SHIFT  17
+
+#endif
Index: c/src/lib/libbsp/sparc64/shared/helenos/boot/include/stack.h
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/boot/include/stack.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/boot/include/stack.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef BOOT_sparc64_STACK_H_
+#define BOOT_sparc64_STACK_H_
+
+#define STACK_ALIGNMENT              16
+#define STACK_BIAS                   2047
+#define STACK_WINDOW_SAVE_AREA_SIZE  (16 * 8)
+
+#endif
Index: c/src/lib/libbsp/sparc64/shared/helenos/boot/include/types.h
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/boot/include/types.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/boot/include/types.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,44 @@
+/*
+ * Copyright (c) 2006 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef BOOT_sparc64_TYPES_H_
+#define BOOT_sparc64_TYPES_H_
+
+#include <boot/gentypes.h>
+
+typedef signed char int8_t;
+
+typedef unsigned char uint8_t;
+typedef unsigned short uint16_t;
+typedef unsigned int uint32_t;
+typedef unsigned long uint64_t;
+
+typedef uint64_t uintptr_t;
+typedef uint64_t unative_t;
+
+#endif
Index: c/src/lib/libbsp/sparc64/shared/helenos/boot/sparc64/loader/main.c
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/boot/sparc64/loader/main.c	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/boot/sparc64/loader/main.c	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,439 @@
+/*
+ * Copyright (c) 2005 Martin Decky
+ * Copyright (c) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/*
+ * $Id$
+ *
+ * Modifications are made to switch to using printk rather than printf,
+ * and to remove portions of the HelenOS bootstrap process that are 
+ * unnecessary on RTEMS.  The removed code is elided with #if 0 ... #endif
+ * blocks.
+ *
+ * Removes some header files. Adds back some missing defines.
+ */
+
+#define RTEMS
+
+#include <bsp.h>
+#include <rtems/bspIo.h>
+
+#include <boot/main.h>
+#include <boot/balloc.h>
+#include <boot/ofw.h>
+#include <boot/ofw_tree.h>
+#include <boot/ofwarch.h>
+#include <boot/align.h>
+
+#if 0
+#include "asm.h"
+#include <printf.h>
+#include "_components.h"
+#include <macros.h>
+#include <string.h>
+#include <memstr.h>
+#endif
+
+#include <asm.h>
+
+#define PAGE_WIDTH  14
+#define PAGE_SIZE   (1 << PAGE_WIDTH)
+
+static bootinfo_t bootinfo;
+#if 0
+static component_t components[COMPONENTS];
+static char *release = STRING(RELEASE);
+
+#ifdef REVISION
+	static char *revision = ", revision " STRING(REVISION);
+#else
+	static char *revision = "";
+#endif
+
+#ifdef TIMESTAMP
+	static char *timestamp = "\nBuilt on " STRING(TIMESTAMP);
+#else
+	static char *timestamp = "";
+#endif
+#endif
+
+#if 0
+/** UltraSPARC subarchitecture - 1 for US, 3 for US3, 0 for other */
+static uint8_t subarchitecture = 0;
+#endif
+
+#if 0
+/**
+ * mask of the MID field inside the ICBUS_CONFIG register shifted by
+ * MID_SHIFT bits to the right
+ */
+static uint16_t mid_mask;
+#endif
+
+#if 0
+/** Print version information. */
+static void version_print(void)
+{
+	printk("HelenOS SPARC64 Bootloader\nRelease %s%s%s\n"
+	    "Copyright (c) 2006 HelenOS project\n",
+	    release, revision, timestamp);
+}
+#endif
+
+/* the lowest ID (read from the VER register) of some US3 CPU model */
+#define FIRST_US3_CPU  0x14
+
+/* the greatest ID (read from the VER register) of some US3 CPU model */
+#define LAST_US3_CPU   0x19
+
+/* UltraSPARC IIIi processor implementation code */
+#define US_IIIi_CODE   0x15
+
+/* max. length of the "compatible" property of the root node */
+#define COMPATIBLE_PROP_MAXLEN	64
+
+/*
+ * HelenOS bootloader will use these constants to distinguish particular
+ * UltraSPARC architectures
+ */
+#define COMPATIBLE_SUN4U	10
+#define COMPATIBLE_SUN4V	20
+
+/** US architecture. COMPATIBLE_SUN4U for sun4v, COMPATIBLE_SUN4V for sun4u */
+static uint8_t architecture;
+
+/**
+ * Detects the UltraSPARC architecture (sun4u and sun4v currently supported)
+ * by inspecting the property called "compatible" in the OBP root node.
+ */
+static void detect_architecture(void)
+{
+	phandle root = ofw_find_device("/");
+	char compatible[COMPATIBLE_PROP_MAXLEN];
+
+	if (ofw_get_property(root, "compatible", compatible,
+			COMPATIBLE_PROP_MAXLEN) <= 0) {
+		printk("Unable to determine architecture, default: sun4u.\n");
+		architecture = COMPATIBLE_SUN4U;
+		return;
+	}
+
+	if (strcmp(compatible, "sun4v") == 0) {
+		architecture = COMPATIBLE_SUN4V;
+	} else {
+		/*
+	 	 * As not all sun4u machines have "sun4u" in their "compatible"
+ 	 	 * OBP property (e.g. Serengeti's OBP "compatible" property is
+ 	 	 * "SUNW,Serengeti"), we will by default fallback to sun4u if
+	 	 * an unknown value of the "compatible" property is encountered.
+ 		 */
+		architecture = COMPATIBLE_SUN4U;
+	}
+}
+
+#if 0
+/**
+ * Detects the subarchitecture (US, US3) of the sun4u
+ * processor. Sets the global variables "subarchitecture" and "mid_mask" to
+ * correct values.
+ */
+static void detect_subarchitecture(void)
+{
+	uint64_t v;
+	asm volatile (
+		"rdpr %%ver, %0\n"
+		: "=r" (v)
+	);
+	
+	v = (v << 16) >> 48;
+	if ((v >= FIRST_US3_CPU) && (v <= LAST_US3_CPU)) {
+		subarchitecture = SUBARCH_US3;
+		if (v == US_IIIi_CODE)
+			mid_mask = (1 << 5) - 1;
+		else
+			mid_mask = (1 << 10) - 1;
+	} else if (v < FIRST_US3_CPU) {
+		subarchitecture = SUBARCH_US;
+		mid_mask = (1 << 5) - 1;
+	} else
+		printk("\nThis CPU is not supported by HelenOS.");
+}
+#endif
+
+#if 0
+/**
+ * Performs sun4u-specific initialization. The components are expected
+ * to be already copied and boot allocator initialized.
+ *
+ * @param base	kernel base virtual address
+ * @param top	virtual address above which the boot allocator
+ * 		can make allocations
+ */
+static void bootstrap_sun4u(void *base, unsigned int top)
+{
+	void *balloc_base;
+	/*
+  	 * Claim and map the physical memory for the boot allocator.
+  	 * Initialize the boot allocator.
+  	 */
+	balloc_base = base + ALIGN_UP(top, PAGE_SIZE);
+	(void) ofw_claim_phys(bootinfo.physmem_start + balloc_base,
+	    BALLOC_MAX_SIZE);
+	(void) ofw_map(bootinfo.physmem_start + balloc_base, balloc_base,
+	    BALLOC_MAX_SIZE, -1);
+	balloc_init(&bootinfo.ballocs, (uintptr_t) balloc_base,
+	    (uintptr_t) balloc_base);
+#if 0	
+	printf("Setting up screens...");
+	ofw_setup_screens();
+	printf("done.\n");
+#endif
+#if 0
+	printf("Canonizing OpenFirmware device tree...");
+#endif
+	bootinfo.ofw_root = ofw_tree_build();
+#if 0
+	printf("done.\n");
+#endif
+#if 0
+#ifdef CONFIG_AP
+	printf("Checking for secondary processors...");
+	if (!ofw_cpu(mid_mask, bootinfo.physmem_start))
+		printf("Error: unable to get CPU properties\n");
+	printf("done.\n");
+#endif
+#endif
+}
+#endif
+
+#if 0
+/**
+ *  * Performs sun4v-specific initialization. The components are expected
+ *   * to be already copied and boot allocator initialized.
+ *    */
+static void bootstrap_sun4v(void)
+{
+	/*
+	 * When SILO booted, the OBP had established a virtual to physical
+	 * memory mapping. This mapping is not an identity (because the
+	 * physical memory starts on non-zero address) - this is not
+	 * surprising. But! The mapping even does not map virtual address
+	 * 0 onto the starting address of the physical memory, but onto an
+	 * address which is 0x400000 bytes higher. The reason is that the
+	 * OBP had already used the memory just at the beginning of the
+	 * physical memory, so that memory cannot be used by SILO (nor
+	 * bootloader). As for now, we solve it by a nasty workaround:
+	 * we pretend that the physical memory starts 0x400000 bytes further
+	 * than it actually does (and hence pretend that the physical memory
+	 * is 0x400000 bytes smaller). Of course, the value 0x400000 will most
+	 * probably depend on the machine and OBP version (the workaround now
+	 * works on Simics). A solution would be to inspect the "available"
+	 * property of the "/memory" node to find out which parts of memory
+	 * are used by OBP and redesign the algorithm of copying
+	 * kernel/init tasks/ramdisk from the bootable image to memory
+	 * (which we must do anyway because of issues with claiming the memory
+	 * on Serengeti).
+ 	 */
+	bootinfo.physmem_start += 0x400000;
+	bootinfo.memmap.zones[0].start += 0x400000;
+	bootinfo.memmap.zones[0].size -= 0x400000;
+#if 0
+	printf("The sun4v init finished.");
+#endif
+}
+#endif
+
+void bootstrap(void)
+{
+#if 0
+	void *base = (void *) KERNEL_VIRTUAL_ADDRESS;
+	unsigned int top = 0;
+	unsigned int i;
+	unsigned int j;
+#endif
+
+  detect_architecture();
+#if 0
+	init_components(components);
+#endif
+	
+	if (!ofw_get_physmem_start(&bootinfo.physmem_start)) {
+		printk("Error: unable to get start of physical memory.\n");
+		halt();
+	}
+	
+	if (!ofw_memmap(&bootinfo.memmap)) {
+		printk("Error: unable to get memory map, halting.\n");
+		halt();
+	}
+	
+	if (bootinfo.memmap.total == 0) {
+		printk("Error: no memory detected, halting.\n");
+		halt();
+	}
+	
+	/*
+	 * SILO for some reason adds 0x400000 and subtracts
+	 * bootinfo.physmem_start to/from silo_ramdisk_image.
+	 * We just need plain physical address so we fix it up.
+	 */
+	if (silo_ramdisk_image) {
+		silo_ramdisk_image += bootinfo.physmem_start;
+		silo_ramdisk_image -= 0x400000;
+		
+		/* Install 1:1 mapping for the RAM disk. */
+		if (ofw_map((void *) ((uintptr_t) silo_ramdisk_image),
+		    (void *) ((uintptr_t) silo_ramdisk_image),
+		    silo_ramdisk_size, -1) != 0) {
+			printk("Failed to map RAM disk.\n");
+			halt();
+		}
+	}
+	
+  printk("\nMemory statistics (total %d MB, starting at %x)\n",
+	    bootinfo.memmap.total >> 20, bootinfo.physmem_start);
+	printk(" %x: kernel entry point\n", KERNEL_VIRTUAL_ADDRESS);
+	printk(" %x: boot info structure\n", &bootinfo);
+
+#if 0
+	/*
+	 * Figure out destination address for each component.
+	 * In this phase, we don't copy the components yet because we want to
+	 * to be careful not to overwrite anything, especially the components
+	 * which haven't been copied yet.
+	 */
+	bootinfo.taskmap.count = 0;
+	for (i = 0; i < COMPONENTS; i++) {
+		printf(" %P: %s image (size %d bytes)\n", components[i].start,
+		    components[i].name, components[i].size);
+		top = ALIGN_UP(top, PAGE_SIZE);
+		if (i > 0) {
+			if (bootinfo.taskmap.count == TASKMAP_MAX_RECORDS) {
+				printf("Skipping superfluous components.\n");
+				break;
+			}
+			
+			bootinfo.taskmap.tasks[bootinfo.taskmap.count].addr =
+			    base + top;
+			bootinfo.taskmap.tasks[bootinfo.taskmap.count].size =
+			    components[i].size;
+			strncpy(bootinfo.taskmap.tasks[
+			    bootinfo.taskmap.count].name, components[i].name,
+			    BOOTINFO_TASK_NAME_BUFLEN);
+			bootinfo.taskmap.count++;
+		}
+		top += components[i].size;
+	}
+	
+	printf("\n");
+
+	/* Do not consider RAM disk */
+	j = bootinfo.taskmap.count - 1;
+	
+	if (silo_ramdisk_image) {
+		/* Treat the RAM disk as the last bootinfo task. */
+		if (bootinfo.taskmap.count == TASKMAP_MAX_RECORDS) {
+			printf("Skipping RAM disk.\n");
+			goto skip_ramdisk;
+		}
+		
+		top = ALIGN_UP(top, PAGE_SIZE);
+		bootinfo.taskmap.tasks[bootinfo.taskmap.count].addr = 
+		    base + top;
+		bootinfo.taskmap.tasks[bootinfo.taskmap.count].size =
+		    silo_ramdisk_size;
+		bootinfo.taskmap.count++;
+		printf("Copying RAM disk...");
+		
+		/*
+		 * Claim and map the whole ramdisk as it may exceed the area
+		 * given to us by SILO.
+		 */
+		(void) ofw_claim_phys(base + top, silo_ramdisk_size);
+		(void) ofw_map(bootinfo.physmem_start + base + top, base + top,
+		    silo_ramdisk_size, -1);
+		memmove(base + top, (void *) ((uintptr_t) silo_ramdisk_image),
+		    silo_ramdisk_size);
+		
+		printf("done.\n");
+		top += silo_ramdisk_size;
+	}
+skip_ramdisk:
+	
+	/*
+	 * Now we can proceed to copy the components. We do it in reverse order
+	 * so that we don't overwrite anything even if the components overlap
+	 * with base.
+	 */
+	printf("Copying tasks...");
+	for (i = COMPONENTS - 1; i > 0; i--, j--) {
+		printf("%s ", components[i].name);
+		
+		/*
+		 * At this point, we claim the physical memory that we are
+		 * going to use. We should be safe in case of the virtual
+		 * address space because the OpenFirmware, according to its
+		 * SPARC binding, should restrict its use of virtual memory
+		 * to addresses from [0xffd00000; 0xffefffff] and
+		 * [0xfe000000; 0xfeffffff].
+		 *
+		 * XXX We don't map this piece of memory. We simply rely on
+		 *     SILO to have it done for us already in this case.
+		 */
+		(void) ofw_claim_phys(bootinfo.physmem_start +
+		    bootinfo.taskmap.tasks[j].addr,
+		    ALIGN_UP(components[i].size, PAGE_SIZE));
+		
+		memcpy((void *) bootinfo.taskmap.tasks[j].addr,
+		    components[i].start, components[i].size);
+		
+	}
+	printf(".\n");
+	
+	printf("Copying kernel...");
+	(void) ofw_claim_phys(bootinfo.physmem_start + base,
+	    ALIGN_UP(components[0].size, PAGE_SIZE));
+	memcpy(base, components[0].start, components[0].size);
+	printf("done.\n");
+	
+	/* perform architecture-specific initialization */
+	if (architecture == COMPATIBLE_SUN4U) {
+		bootstrap_sun4u(base, top);
+	} else if (architecture == COMPATIBLE_SUN4V) {
+		bootstrap_sun4v();
+	} else {
+		printf("Unknown architecture.\n");
+		halt();
+	}
+	
+	printf("Booting the kernel...\n");
+	jump_to_kernel((void *) KERNEL_VIRTUAL_ADDRESS,
+	    bootinfo.physmem_start | BSP_PROCESSOR, &bootinfo,
+	    sizeof(bootinfo), subarchitecture);
+#endif
+}
Index: c/src/lib/libbsp/sparc64/shared/helenos/boot/sparc64/loader/ofwarch.c
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/boot/sparc64/loader/ofwarch.c	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/boot/sparc64/loader/ofwarch.c	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,184 @@
+/*
+ * Copyright (c) 2005 Martin Decky
+ * Copyright (c) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/**
+ * @file
+ * @brief Architecture dependent parts of OpenFirmware interface.
+ */
+
+/*
+ * $Id$
+ *
+ * Modifications are made to compile for RTEMS. Removes asm.h and printf.h.
+ * Removes write().
+ *
+ */
+
+
+#include <boot/ofwarch.h>
+#include <boot/ofw.h>
+#include <string.h>
+#include <boot/register.h>
+#include <boot/main.h>
+#if 0
+#include "asm.h"
+#include <printf.h>
+#endif
+
+#if 0 /* contaminates libc */
+void write(const char *str, const int len)
+{
+	int i;
+	
+	for (i = 0; i < len; i++) {
+		if (str[i] == '\n')
+			ofw_write("\r", 1);
+		ofw_write(&str[i], 1);
+	}
+}
+#endif
+
+int ofw_translate_failed(ofw_arg_t flag)
+{
+	return flag != -1;
+}
+
+/**
+ * Starts all CPUs represented by following siblings of the given node,
+ * except for the current CPU.
+ *
+ * @param child         The first child of the OFW tree node whose children
+ *                      represent CPUs to be woken up.
+ * @param current_mid   MID of the current CPU, the current CPU will
+ *                      (of course) not be woken up.
+ * @param physmem_start Starting address of the physical memory.
+ *
+ * @return Number of CPUs which have the same parent node as
+ *         "child".
+ *
+ */
+static int wake_cpus_in_node(phandle child, uint64_t current_mid,
+    uintptr_t physmem_start)
+{
+	int cpus;
+	
+	for (cpus = 0; (child != 0) && (child != -1);
+	    child = ofw_get_peer_node(child), cpus++) {
+		char type_name[OFW_TREE_PROPERTY_MAX_VALUELEN];
+		
+		if (ofw_get_property(child, "device_type", type_name,
+		    OFW_TREE_PROPERTY_MAX_VALUELEN) > 0) {
+			type_name[OFW_TREE_PROPERTY_MAX_VALUELEN - 1] = 0;
+			if (strcmp(type_name, "cpu") == 0) {
+				uint32_t mid;
+				
+				/*
+				 * "upa-portid" for US, "portid" for US-III,
+				 * "cpuid" for US-IV
+				 */
+				if ((ofw_get_property(child, "upa-portid", &mid, sizeof(mid)) <= 0)
+				    && (ofw_get_property(child, "portid", &mid, sizeof(mid)) <= 0)
+				    && (ofw_get_property(child, "cpuid", &mid, sizeof(mid)) <= 0))
+					continue;
+				
+				if (current_mid != mid) {
+					/*
+					 * Start secondary processor.
+					 */
+					(void) ofw_call("SUNW,start-cpu", 3, 1,
+					    NULL, child, KERNEL_VIRTUAL_ADDRESS,
+					    physmem_start | AP_PROCESSOR);
+				}
+			}
+		}
+	}
+	
+	return cpus;
+}
+
+/**
+ * Finds out the current CPU's MID and wakes up all AP processors.
+ */
+int ofw_cpu(uint16_t mid_mask, uintptr_t physmem_start)
+{
+	/* Get the current CPU MID */
+	uint64_t current_mid;
+	
+	asm volatile (
+		"ldxa [%1] %2, %0\n"
+		: "=r" (current_mid)
+		: "r" (0), "i" (ASI_ICBUS_CONFIG)
+	);
+	
+	current_mid >>= ICBUS_CONFIG_MID_SHIFT;
+	current_mid &= mid_mask;
+	
+	/* Wake up the CPUs */
+	
+	phandle cpus_parent = ofw_find_device("/ssm@0,0");
+	if ((cpus_parent == 0) || (cpus_parent == -1))
+		cpus_parent = ofw_find_device("/");
+	
+	phandle node = ofw_get_child_node(cpus_parent);
+	int cpus = wake_cpus_in_node(node, current_mid, physmem_start);
+	while ((node != 0) && (node != -1)) {
+		char name[OFW_TREE_PROPERTY_MAX_VALUELEN];
+		
+		if (ofw_get_property(node, "name", name,
+		    OFW_TREE_PROPERTY_MAX_VALUELEN) > 0) {
+			name[OFW_TREE_PROPERTY_MAX_VALUELEN - 1] = 0;
+			if (strcmp(name, "cmp") == 0) {
+				phandle subnode = ofw_get_child_node(node);
+				cpus += wake_cpus_in_node(subnode,
+					current_mid, physmem_start);
+			}
+		}
+		node = ofw_get_peer_node(node);
+	}
+	
+	return cpus;
+}
+
+/** Get physical memory starting address.
+ *
+ * @param start Pointer to variable where the physical memory starting
+ *              address will be stored.
+ *
+ * @return Non-zero on succes, zero on failure.
+ *
+ */
+int ofw_get_physmem_start(uintptr_t *start)
+{
+	uint32_t memreg[4];
+	if (ofw_get_property(ofw_memory, "reg", &memreg, sizeof(memreg)) <= 0)
+		return 0;
+	
+	*start = (((uint64_t) memreg[0]) << 32) | memreg[1];
+	return 1;
+}
Index: c/src/lib/libbsp/sparc64/shared/helenos/boot/sparc64/loader/ofwasm.S
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/boot/sparc64/loader/ofwasm.S	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/boot/sparc64/loader/ofwasm.S	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,64 @@
+#
+# Copyright (c) 2006 Martin Decky
+# Copyright (c) 2006 Jakub Jermar 
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+/*
+ * $Id$
+ *
+ * This code is originally in asm.S. This is the only function used from that
+ * file, so it has been relocated to this new file ofw.S which is not actually
+ * located in the HelenOS code base.
+ */
+
+#include <boot/stack.h>
+#include <boot/register.h>
+
+.register %g2, #scratch
+.register %g3, #scratch
+
+.text
+
+.global ofw
+ofw:
+	save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
+	set ofw_cif, %l0
+	ldx [%l0], %l0
+	
+	rdpr  %pstate, %l1
+	and  %l1, ~PSTATE_AM_BIT, %l2
+	wrpr  %l2, 0, %pstate
+	
+	jmpl %l0, %o7
+	mov %i0, %o0
+
+  clr %g4     ! correction for gcc's ABI change
+
+	wrpr %l1, 0, %pstate
+	
+	ret
+	restore %o0, 0, %o0
Index: c/src/lib/libbsp/sparc64/shared/helenos/kernel/genarch/include/ofw/ofw_tree.h
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/kernel/genarch/include/ofw/ofw_tree.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/kernel/genarch/include/ofw/ofw_tree.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,88 @@
+/*
+ * Copyright (c) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef KERN_OFW_TREE_H_
+#define KERN_OFW_TREE_H_
+
+#include <arch/types.h>
+#include <typedefs.h>
+
+#define OFW_TREE_PROPERTY_MAX_NAMELEN  32
+
+/** Memory representation of OpenFirmware device tree node property. */
+typedef struct {
+	char name[OFW_TREE_PROPERTY_MAX_NAMELEN];
+	size_t size;
+	void *value;
+} ofw_tree_property_t;
+
+/** Memory representation of OpenFirmware device tree node. */
+typedef struct ofw_tree_node {
+	struct ofw_tree_node *parent;
+	struct ofw_tree_node *peer;
+	struct ofw_tree_node *child;
+	
+	uint32_t node_handle;           /**< Old OpenFirmware node handle. */
+	
+	char *da_name;                  /**< Disambigued name. */
+	
+	unsigned int properties;        /**< Number of properties. */
+	ofw_tree_property_t *property;
+	
+	/**
+	 * Pointer to a structure representing respective device.
+	 * Its semantics is device dependent.
+	 */
+	void *device;
+} ofw_tree_node_t;
+
+/* Walker for visiting OpenFirmware device tree nodes. */
+typedef bool (* ofw_tree_walker_t)(ofw_tree_node_t *, void *);
+
+extern void ofw_tree_init(ofw_tree_node_t *);
+extern void ofw_tree_print(void);
+
+extern const char *ofw_tree_node_name(const ofw_tree_node_t *);
+extern ofw_tree_node_t *ofw_tree_lookup(const char *);
+extern ofw_tree_property_t *ofw_tree_getprop(const ofw_tree_node_t *,
+    const char *);
+extern void ofw_tree_walk_by_device_type(const char *, ofw_tree_walker_t,
+    void *);
+
+extern ofw_tree_node_t *ofw_tree_find_child(ofw_tree_node_t *, const char *);
+extern ofw_tree_node_t *ofw_tree_find_child_by_device_type(ofw_tree_node_t *,
+    const char *);
+
+extern ofw_tree_node_t *ofw_tree_find_peer_by_device_type(ofw_tree_node_t *,
+    const char *);
+extern ofw_tree_node_t *ofw_tree_find_peer_by_name(ofw_tree_node_t *,
+    const char *);
+extern ofw_tree_node_t *ofw_tree_find_node_by_handle(ofw_tree_node_t *,
+    uint32_t);
+
+#endif
Index: c/src/lib/libbsp/sparc64/shared/helenos/kernel/generic/include/align.h
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/kernel/generic/include/align.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/kernel/generic/include/align.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,59 @@
+/*
+ * Copyright (c) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup generic
+ * @ingroup others
+ * @{
+ */
+/**
+ * @file
+ * @brief Macros for making values and addresses aligned.
+ */
+
+#ifndef KERN_ALIGN_H_
+#define KERN_ALIGN_H_
+
+/** Align to the nearest lower address.
+ *
+ * @param s Address or size to be aligned.
+ * @param a Size of alignment, must be power of 2.
+ */
+#define ALIGN_DOWN(s, a)  ((s) & ~((a) - 1))
+
+
+/** Align to the nearest higher address.
+ *
+ * @param s Address or size to be aligned.
+ * @param a Size of alignment, must be power of 2.
+ */
+#define ALIGN_UP(s, a)  (((s) + ((a) - 1)) & ~((a) - 1))
+
+#endif
+
+/** @}
+ */
Index: c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/arch.h
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/arch.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/arch.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,61 @@
+/*
+ * Copyright (c) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup sparc64	
+ * @{
+ */
+/**
+ * @file
+ * @brief	Various sparc64-specific macros.
+ */
+
+#ifndef KERN_sparc64_ARCH_H_
+#define KERN_sparc64_ARCH_H_
+
+#if defined (SUN4U)
+#include <arch/sun4u/arch.h>
+#elif defined (SUN4V)
+#include <arch/sun4v/arch.h>
+#endif
+
+#define ASI_AIUP		0x10	/** Access to primary context with user privileges. */
+#define ASI_AIUS		0x11	/** Access to secondary context with user privileges. */
+
+#define NWINDOWS		8	/** Number of register window sets. */
+
+#ifndef __ASM__
+
+extern void arch_pre_main(void);
+
+#endif /* __ASM__ */
+
+
+#endif
+
+/** @}
+ */
Index: c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/boot.h
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/boot.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/boot.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,98 @@
+/*
+ * Copyright (c) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup sparc64	
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_sparc64_BOOT_H_
+#define KERN_sparc64_BOOT_H_
+
+#if 0
+#define VMA			0x400000
+#endif
+#define VMA     0x4000
+#define LMA			VMA
+
+#ifndef __ASM__
+#ifndef __LINKER__
+
+#include <config.h>
+#include <arch/types.h>
+#include <genarch/ofw/ofw_tree.h>
+
+#define TASKMAP_MAX_RECORDS	32
+#define MEMMAP_MAX_RECORDS	32
+
+#define BOOTINFO_TASK_NAME_BUFLEN 32
+
+typedef struct {
+	void * addr;
+	uint32_t size;
+	char name[BOOTINFO_TASK_NAME_BUFLEN];
+} utask_t;
+
+typedef struct {
+	uint32_t count;
+	utask_t tasks[TASKMAP_MAX_RECORDS];
+} taskmap_t;
+
+typedef struct {
+	uintptr_t start;
+	uint32_t size;
+} memzone_t;
+
+typedef struct {
+	uint32_t total;
+	uint32_t count;
+	memzone_t zones[MEMMAP_MAX_RECORDS];
+} memmap_t;
+
+/** Bootinfo structure.
+ *
+ * Must be in sync with bootinfo structure used by the boot loader.
+ */
+typedef struct {
+	uintptr_t physmem_start;
+	taskmap_t taskmap;
+	memmap_t memmap;
+	ballocs_t ballocs;
+	ofw_tree_node_t *ofw_root;
+} bootinfo_t;
+
+extern bootinfo_t bootinfo;
+
+#endif
+#endif
+
+#endif
+
+/** @}
+ */
Index: c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/mm/cache_spec.h
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/mm/cache_spec.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/mm/cache_spec.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2008 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup sparc64mm	
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_sparc64_CACHE_SPEC_H_
+#define KERN_sparc64_CACHE_SPEC_H_
+
+/*
+ * The following macros are valid for the following processors:
+ *
+ * 	UltraSPARC, UltraSPARC II, UltraSPARC IIi, UltraSPARC III,
+ * 	UltraSPARC III+, UltraSPARC IV, UltraSPARC IV+
+ * 
+ * Should we support other UltraSPARC processors, we need to make sure that
+ * the macros are defined correctly for them.
+ */
+ 
+#if defined (US)
+#define DCACHE_SIZE		(16 * 1024)
+#elif defined (US3)
+#define DCACHE_SIZE		(64 * 1024)
+#endif
+#define DCACHE_LINE_SIZE	32	
+
+#endif
+
+/** @}
+ */
Index: c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/mm/frame.h
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/mm/frame.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/mm/frame.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup sparc64mm	
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_sparc64_FRAME_H_
+#define KERN_sparc64_FRAME_H_
+
+#if defined (SUN4U)
+#include <arch/mm/sun4u/frame.h>
+#elif defined (SUN4V)
+#include <arch/mm/sun4v/frame.h>
+#endif
+
+#endif
+
+/** @}
+ */
Index: c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/mm/mmu.h
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/mm/mmu.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/mm/mmu.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup sparc64mm	
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_sparc64_MMU_H_
+#define KERN_sparc64_MMU_H_
+
+#if defined (SUN4U)
+#include <arch/mm/sun4u/mmu.h>
+#elif defined (SUN4V)
+#include <arch/mm/sun4v/mmu.h>
+#endif
+
+
+#endif
+
+/** @}
+ */
Index: c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/mm/page.h
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/mm/page.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/mm/page.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,84 @@
+/*
+ * Copyright (c) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup sparc64mm	
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_sparc64_PAGE_H_
+#define KERN_sparc64_PAGE_H_
+
+#include <arch/mm/frame.h>
+
+/*
+ * On the TLB and TSB level, we still use 8K pages, which are supported by the
+ * MMU.
+ */
+#define MMU_PAGE_WIDTH	MMU_FRAME_WIDTH
+#define MMU_PAGE_SIZE	MMU_FRAME_SIZE
+
+/*
+ * On the page table level, we use 16K pages. 16K pages are not supported by
+ * the MMU but we emulate them with pairs of 8K pages.
+ */
+#define PAGE_WIDTH	FRAME_WIDTH
+#define PAGE_SIZE	FRAME_SIZE
+
+#define MMU_PAGES_PER_PAGE	(1 << (PAGE_WIDTH - MMU_PAGE_WIDTH))
+
+#ifdef KERNEL
+
+#ifndef __ASM__
+
+#include <arch/interrupt.h>
+
+extern uintptr_t physmem_base;
+
+#define KA2PA(x)	(((uintptr_t) (x)) + physmem_base)
+#define PA2KA(x)	(((uintptr_t) (x)) - physmem_base)
+
+typedef union {
+	uintptr_t address;
+	struct {
+		uint64_t vpn : 51;		/**< Virtual Page Number. */
+		unsigned offset : 13;		/**< Offset. */
+	} __attribute__ ((packed));
+} page_address_t;
+
+extern void page_arch_init(void);
+
+#endif /* !def __ASM__ */
+
+#endif /* KERNEL */
+
+#endif
+
+/** @}
+ */
Index: c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/mm/sun4u/frame.h
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/mm/sun4u/frame.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/mm/sun4u/frame.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,87 @@
+/*
+ * Copyright (c) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup sparc64mm	
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_sparc64_SUN4U_FRAME_H_
+#define KERN_sparc64_SUN4U_FRAME_H_
+
+/*
+ * Page size supported by the MMU.
+ * For 8K there is the nasty illegal virtual aliasing problem.
+ * Therefore, the kernel uses 8K only internally on the TLB and TSB levels.
+ */
+#define MMU_FRAME_WIDTH		13	/* 8K */
+#define MMU_FRAME_SIZE		(1 << MMU_FRAME_WIDTH)
+
+/*
+ * Page size exported to the generic memory management subsystems.
+ * This page size is not directly supported by the MMU, but we can emulate
+ * each 16K page with a pair of adjacent 8K pages.
+ */
+#define FRAME_WIDTH		14	/* 16K */
+#define FRAME_SIZE		(1 << FRAME_WIDTH)
+
+#ifdef KERNEL
+#ifndef __ASM__
+
+#include <arch/types.h>
+
+union frame_address {
+	uintptr_t address;
+	struct {
+#if defined (US)
+		unsigned : 23;
+		uint64_t pfn : 28;		/**< Physical Frame Number. */
+#elif defined (US3)
+		unsigned : 21;
+		uint64_t pfn : 30;		/**< Physical Frame Number. */
+#endif
+		unsigned offset : 13;		/**< Offset. */
+	} __attribute__ ((packed));
+};
+
+typedef union frame_address frame_address_t;
+
+extern uintptr_t last_frame;
+extern uintptr_t end_of_identity;
+
+extern void frame_arch_init(void);
+#define physmem_print()
+
+#endif
+#endif
+
+#endif
+
+/** @}
+ */
Index: c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/mm/sun4u/mmu.h
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/mm/sun4u/mmu.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/mm/sun4u/mmu.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,123 @@
+/*
+ * Copyright (c) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup sparc64mm	
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_sparc64_sun4u_MMU_H_
+#define KERN_sparc64_sun4u_MMU_H_
+
+#if defined(US)
+/* LSU Control Register ASI. */
+#define ASI_LSU_CONTROL_REG		0x45	/**< Load/Store Unit Control Register. */
+#endif
+
+/* I-MMU ASIs. */
+#define ASI_IMMU			0x50
+#define ASI_IMMU_TSB_8KB_PTR_REG	0x51	
+#define ASI_IMMU_TSB_64KB_PTR_REG	0x52
+#define ASI_ITLB_DATA_IN_REG		0x54
+#define ASI_ITLB_DATA_ACCESS_REG	0x55
+#define ASI_ITLB_TAG_READ_REG		0x56
+#define ASI_IMMU_DEMAP			0x57
+
+/* Virtual Addresses within ASI_IMMU. */
+#define VA_IMMU_TSB_TAG_TARGET		0x0	/**< IMMU TSB tag target register. */
+#define VA_IMMU_SFSR			0x18	/**< IMMU sync fault status register. */
+#define VA_IMMU_TSB_BASE		0x28	/**< IMMU TSB base register. */
+#define VA_IMMU_TAG_ACCESS		0x30	/**< IMMU TLB tag access register. */
+#if defined (US3)
+#define VA_IMMU_PRIMARY_EXTENSION	0x48	/**< IMMU TSB primary extension register */
+#define VA_IMMU_NUCLEUS_EXTENSION	0x58	/**< IMMU TSB nucleus extension register */
+#endif
+
+
+/* D-MMU ASIs. */
+#define ASI_DMMU			0x58
+#define ASI_DMMU_TSB_8KB_PTR_REG	0x59	
+#define ASI_DMMU_TSB_64KB_PTR_REG	0x5a
+#define ASI_DMMU_TSB_DIRECT_PTR_REG	0x5b
+#define ASI_DTLB_DATA_IN_REG		0x5c
+#define ASI_DTLB_DATA_ACCESS_REG	0x5d
+#define ASI_DTLB_TAG_READ_REG		0x5e
+#define ASI_DMMU_DEMAP			0x5f
+
+/* Virtual Addresses within ASI_DMMU. */
+#define VA_DMMU_TSB_TAG_TARGET		0x0	/**< DMMU TSB tag target register. */
+#define VA_PRIMARY_CONTEXT_REG		0x8	/**< DMMU primary context register. */
+#define VA_SECONDARY_CONTEXT_REG	0x10	/**< DMMU secondary context register. */
+#define VA_DMMU_SFSR			0x18	/**< DMMU sync fault status register. */
+#define VA_DMMU_SFAR			0x20	/**< DMMU sync fault address register. */
+#define VA_DMMU_TSB_BASE		0x28	/**< DMMU TSB base register. */
+#define VA_DMMU_TAG_ACCESS		0x30	/**< DMMU TLB tag access register. */
+#define VA_DMMU_VA_WATCHPOINT_REG	0x38	/**< DMMU VA data watchpoint register. */
+#define VA_DMMU_PA_WATCHPOINT_REG	0x40	/**< DMMU PA data watchpoint register. */
+#if defined (US3)
+#define VA_DMMU_PRIMARY_EXTENSION	0x48	/**< DMMU TSB primary extension register */
+#define VA_DMMU_SECONDARY_EXTENSION	0x50	/**< DMMU TSB secondary extension register */
+#define VA_DMMU_NUCLEUS_EXTENSION	0x58	/**< DMMU TSB nucleus extension register */
+#endif
+
+#ifndef __ASM__
+
+#include <arch/asm.h>
+#include <arch/barrier.h>
+#include <arch/types.h>
+
+#if defined(US)
+/** LSU Control Register. */
+typedef union {
+	uint64_t value;
+	struct {
+		unsigned : 23;
+		unsigned pm : 8;
+		unsigned vm : 8;
+		unsigned pr : 1;
+		unsigned pw : 1;
+		unsigned vr : 1;
+		unsigned vw : 1;
+		unsigned : 1;
+		unsigned fm : 16;	
+		unsigned dm : 1;	/**< D-MMU enable. */
+		unsigned im : 1;	/**< I-MMU enable. */
+		unsigned dc : 1;	/**< D-Cache enable. */
+		unsigned ic : 1;	/**< I-Cache enable. */
+		
+	} __attribute__ ((packed));
+} lsu_cr_reg_t;
+#endif /* US */
+
+#endif /* !def __ASM__ */
+
+#endif
+
+/** @}
+ */
Index: c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/mm/sun4u/page.h
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/mm/sun4u/page.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/mm/sun4u/page.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,84 @@
+/*
+ * Copyright (c) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup sparc64mm	
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_sparc64_PAGE_H_
+#define KERN_sparc64_PAGE_H_
+
+#include <arch/mm/frame.h>
+
+/*
+ * On the TLB and TSB level, we still use 8K pages, which are supported by the
+ * MMU.
+ */
+#define MMU_PAGE_WIDTH	MMU_FRAME_WIDTH
+#define MMU_PAGE_SIZE	MMU_FRAME_SIZE
+
+/*
+ * On the page table level, we use 16K pages. 16K pages are not supported by
+ * the MMU but we emulate them with pairs of 8K pages.
+ */
+#define PAGE_WIDTH	FRAME_WIDTH
+#define PAGE_SIZE	FRAME_SIZE
+
+#define MMU_PAGES_PER_PAGE	(1 << (PAGE_WIDTH - MMU_PAGE_WIDTH))
+
+#ifdef KERNEL
+
+#ifndef __ASM__
+
+#include <arch/interrupt.h>
+
+extern uintptr_t physmem_base;
+
+#define KA2PA(x)	(((uintptr_t) (x)) + physmem_base)
+#define PA2KA(x)	(((uintptr_t) (x)) - physmem_base)
+
+typedef union {
+	uintptr_t address;
+	struct {
+		uint64_t vpn : 51;		/**< Virtual Page Number. */
+		unsigned offset : 13;		/**< Offset. */
+	} __attribute__ ((packed));
+} page_address_t;
+
+extern void page_arch_init(void);
+
+#endif /* !def __ASM__ */
+
+#endif /* KERNEL */
+
+#endif
+
+/** @}
+ */
Index: c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/mm/sun4u/tlb.h
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/mm/sun4u/tlb.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/mm/sun4u/tlb.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,693 @@
+/*
+ * Copyright (c) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup sparc64mm	
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_sparc64_TLB_sun4u_H_
+#define KERN_sparc64_TLB_sun4u_H_
+
+#if defined (US)
+#define ITLB_ENTRY_COUNT		64
+#define DTLB_ENTRY_COUNT		64
+#define DTLB_MAX_LOCKED_ENTRIES		DTLB_ENTRY_COUNT
+#endif
+
+/** TLB_DSMALL is the only of the three DMMUs that can hold locked entries. */
+#if defined (US3)
+#define DTLB_MAX_LOCKED_ENTRIES		16
+#endif
+
+#define MEM_CONTEXT_KERNEL		0
+#define MEM_CONTEXT_TEMP		1
+
+/** Page sizes. */
+#define PAGESIZE_8K	0
+#define PAGESIZE_64K	1
+#define PAGESIZE_512K	2
+#define PAGESIZE_4M	3
+
+/** Bit width of the TLB-locked portion of kernel address space. */
+#define KERNEL_PAGE_WIDTH       22	/* 4M */
+
+/* TLB Demap Operation types. */
+#define TLB_DEMAP_PAGE		0
+#define TLB_DEMAP_CONTEXT	1
+#if defined (US3)
+#define TLB_DEMAP_ALL		2
+#endif
+
+#define TLB_DEMAP_TYPE_SHIFT	6
+
+/* TLB Demap Operation Context register encodings. */
+#define TLB_DEMAP_PRIMARY	0
+#define TLB_DEMAP_SECONDARY	1
+#define TLB_DEMAP_NUCLEUS	2
+
+/* There are more TLBs in one MMU in US3, their codes are defined here. */
+#if defined (US3)
+/* D-MMU: one small (16-entry) TLB and two big (512-entry) TLBs */
+#define TLB_DSMALL	0
+#define TLB_DBIG_0	2
+#define TLB_DBIG_1	3
+	
+/* I-MMU: one small (16-entry) TLB and one big TLB */
+#define TLB_ISMALL	0
+#define TLB_IBIG	2
+#endif
+
+#define TLB_DEMAP_CONTEXT_SHIFT	4
+
+/* TLB Tag Access shifts */
+#define TLB_TAG_ACCESS_CONTEXT_SHIFT	0
+#define TLB_TAG_ACCESS_CONTEXT_MASK	((1 << 13) - 1)
+#define TLB_TAG_ACCESS_VPN_SHIFT	13
+
+#ifndef __ASM__
+
+#include <arch/mm/tte.h>
+#include <arch/mm/mmu.h>
+#include <arch/mm/page.h>
+#include <arch/asm.h>
+#include <arch/barrier.h>
+#include <arch/types.h>
+#include <arch/register.h>
+#include <arch/cpu.h>
+
+union tlb_context_reg {
+	uint64_t v;
+	struct {
+		unsigned long : 51;
+		unsigned context : 13;		/**< Context/ASID. */
+	} __attribute__ ((packed));
+};
+typedef union tlb_context_reg tlb_context_reg_t;
+
+/** I-/D-TLB Data In/Access Register type. */
+typedef tte_data_t tlb_data_t;
+
+/** I-/D-TLB Data Access Address in Alternate Space. */
+
+#if defined (US)
+
+union tlb_data_access_addr {
+	uint64_t value;
+	struct {
+		uint64_t : 55;
+		unsigned tlb_entry : 6;
+		unsigned : 3;
+	} __attribute__ ((packed));
+};
+typedef union tlb_data_access_addr dtlb_data_access_addr_t;
+typedef union tlb_data_access_addr dtlb_tag_read_addr_t;
+typedef union tlb_data_access_addr itlb_data_access_addr_t;
+typedef union tlb_data_access_addr itlb_tag_read_addr_t;
+
+#elif defined (US3)
+
+/*
+ * In US3, I-MMU and D-MMU have different formats of the data
+ * access register virtual address. In the corresponding
+ * structures the member variable for the entry number is
+ * called "local_tlb_entry" - it contrasts with the "tlb_entry"
+ * for the US data access register VA structure. The rationale
+ * behind this is to prevent careless mistakes in the code
+ * caused by setting only the entry number and not the TLB
+ * number in the US3 code (when taking the code from US). 
+ */
+
+union dtlb_data_access_addr {
+	uint64_t value;
+	struct {
+		uint64_t : 45;
+		unsigned : 1;
+		unsigned tlb_number : 2;
+		unsigned : 4;
+		unsigned local_tlb_entry : 9;
+		unsigned : 3;
+	} __attribute__ ((packed));
+};
+typedef union dtlb_data_access_addr dtlb_data_access_addr_t;
+typedef union dtlb_data_access_addr dtlb_tag_read_addr_t;
+
+union itlb_data_access_addr {
+	uint64_t value;
+	struct {
+		uint64_t : 45;
+		unsigned : 1;
+		unsigned tlb_number : 2;
+		unsigned : 6;
+		unsigned local_tlb_entry : 7;
+		unsigned : 3;
+	} __attribute__ ((packed));
+};
+typedef union itlb_data_access_addr itlb_data_access_addr_t;
+typedef union itlb_data_access_addr itlb_tag_read_addr_t;
+
+#endif
+
+/** I-/D-TLB Tag Read Register. */
+union tlb_tag_read_reg {
+	uint64_t value;
+	struct {
+		uint64_t vpn : 51;	/**< Virtual Address bits 63:13. */
+		unsigned context : 13;	/**< Context identifier. */
+	} __attribute__ ((packed));
+};
+typedef union tlb_tag_read_reg tlb_tag_read_reg_t;
+typedef union tlb_tag_read_reg tlb_tag_access_reg_t;
+
+
+/** TLB Demap Operation Address. */
+union tlb_demap_addr {
+	uint64_t value;
+	struct {
+		uint64_t vpn: 51;	/**< Virtual Address bits 63:13. */
+#if defined (US)
+		unsigned : 6;		/**< Ignored. */
+		unsigned type : 1;	/**< The type of demap operation. */
+#elif defined (US3)
+		unsigned : 5;		/**< Ignored. */
+		unsigned type: 2;	/**< The type of demap operation. */
+#endif
+		unsigned context : 2;	/**< Context register selection. */
+		unsigned : 4;		/**< Zero. */
+	} __attribute__ ((packed));
+};
+typedef union tlb_demap_addr tlb_demap_addr_t;
+
+/** TLB Synchronous Fault Status Register. */
+union tlb_sfsr_reg {
+	uint64_t value;
+	struct {
+#if defined (US)
+		unsigned long : 40;	/**< Implementation dependent. */
+		unsigned asi : 8;	/**< ASI. */
+		unsigned : 2;
+		unsigned ft : 7;	/**< Fault type. */
+#elif defined (US3)
+		unsigned long : 39;	/**< Implementation dependent. */
+		unsigned nf : 1;	/**< Non-faulting load. */
+		unsigned asi : 8;	/**< ASI. */
+		unsigned tm : 1;	/**< I-TLB miss. */
+		unsigned : 3;		/**< Reserved. */
+		unsigned ft : 5;	/**< Fault type. */
+#endif
+		unsigned e : 1;		/**< Side-effect bit. */
+		unsigned ct : 2;	/**< Context Register selection. */
+		unsigned pr : 1;	/**< Privilege bit. */
+		unsigned w : 1;		/**< Write bit. */
+		unsigned ow : 1;	/**< Overwrite bit. */
+		unsigned fv : 1;	/**< Fault Valid bit. */
+	} __attribute__ ((packed));
+};
+typedef union tlb_sfsr_reg tlb_sfsr_reg_t;
+
+#if defined (US3)
+
+/*
+ * Functions for determining the number of entries in TLBs. They either return
+ * a constant value or a value based on the CPU autodetection.
+ */
+
+/**
+ * Determine the number of entries in the DMMU's small TLB. 
+ */
+static inline uint16_t tlb_dsmall_size(void)
+{
+	return 16;
+}
+
+/**
+ * Determine the number of entries in each DMMU's big TLB. 
+ */
+static inline uint16_t tlb_dbig_size(void)
+{
+	return 512;
+}
+
+/**
+ * Determine the number of entries in the IMMU's small TLB. 
+ */
+static inline uint16_t tlb_ismall_size(void)
+{
+	return 16;
+}
+
+/**
+ * Determine the number of entries in the IMMU's big TLB. 
+ */
+static inline uint16_t tlb_ibig_size(void)
+{
+	if (((ver_reg_t) ver_read()).impl == IMPL_ULTRASPARCIV_PLUS)
+		return 512;
+	else
+		return 128;
+}
+
+#endif
+
+/** Read MMU Primary Context Register.
+ *
+ * @return		Current value of Primary Context Register.
+ */
+static inline uint64_t mmu_primary_context_read(void)
+{
+	return asi_u64_read(ASI_DMMU, VA_PRIMARY_CONTEXT_REG);
+}
+
+/** Write MMU Primary Context Register.
+ *
+ * @param v		New value of Primary Context Register.
+ */
+static inline void mmu_primary_context_write(uint64_t v)
+{
+	asi_u64_write(ASI_DMMU, VA_PRIMARY_CONTEXT_REG, v);
+	flush_pipeline();
+}
+
+/** Read MMU Secondary Context Register.
+ *
+ * @return		Current value of Secondary Context Register.
+ */
+static inline uint64_t mmu_secondary_context_read(void)
+{
+	return asi_u64_read(ASI_DMMU, VA_SECONDARY_CONTEXT_REG);
+}
+
+/** Write MMU Primary Context Register.
+ *
+ * @param v		New value of Primary Context Register.
+ */
+static inline void mmu_secondary_context_write(uint64_t v)
+{
+	asi_u64_write(ASI_DMMU, VA_SECONDARY_CONTEXT_REG, v);
+	flush_pipeline();
+}
+
+#if defined (US)
+
+/** Read IMMU TLB Data Access Register.
+ *
+ * @param entry		TLB Entry index.
+ *
+ * @return		Current value of specified IMMU TLB Data Access
+ * 			Register.
+ */
+static inline uint64_t itlb_data_access_read(size_t entry)
+{
+	itlb_data_access_addr_t reg;
+	
+	reg.value = 0;
+	reg.tlb_entry = entry;
+	return asi_u64_read(ASI_ITLB_DATA_ACCESS_REG, reg.value);
+}
+
+/** Write IMMU TLB Data Access Register.
+ *
+ * @param entry		TLB Entry index.
+ * @param value		Value to be written.
+ */
+static inline void itlb_data_access_write(size_t entry, uint64_t value)
+{
+	itlb_data_access_addr_t reg;
+	
+	reg.value = 0;
+	reg.tlb_entry = entry;
+	asi_u64_write(ASI_ITLB_DATA_ACCESS_REG, reg.value, value);
+	flush_pipeline();
+}
+
+/** Read DMMU TLB Data Access Register.
+ *
+ * @param entry		TLB Entry index.
+ *
+ * @return		Current value of specified DMMU TLB Data Access
+ * 			Register.
+ */
+static inline uint64_t dtlb_data_access_read(size_t entry)
+{
+	dtlb_data_access_addr_t reg;
+	
+	reg.value = 0;
+	reg.tlb_entry = entry;
+	return asi_u64_read(ASI_DTLB_DATA_ACCESS_REG, reg.value);
+}
+
+/** Write DMMU TLB Data Access Register.
+ *
+ * @param entry		TLB Entry index.
+ * @param value		Value to be written.
+ */
+static inline void dtlb_data_access_write(size_t entry, uint64_t value)
+{
+	dtlb_data_access_addr_t reg;
+	
+	reg.value = 0;
+	reg.tlb_entry = entry;
+	asi_u64_write(ASI_DTLB_DATA_ACCESS_REG, reg.value, value);
+	membar();
+}
+
+/** Read IMMU TLB Tag Read Register.
+ *
+ * @param entry		TLB Entry index.
+ *
+ * @return		Current value of specified IMMU TLB Tag Read Register.
+ */
+static inline uint64_t itlb_tag_read_read(size_t entry)
+{
+	itlb_tag_read_addr_t tag;
+
+	tag.value = 0;
+	tag.tlb_entry =	entry;
+	return asi_u64_read(ASI_ITLB_TAG_READ_REG, tag.value);
+}
+
+/** Read DMMU TLB Tag Read Register.
+ *
+ * @param entry		TLB Entry index.
+ *
+ * @return		Current value of specified DMMU TLB Tag Read Register.
+ */
+static inline uint64_t dtlb_tag_read_read(size_t entry)
+{
+	dtlb_tag_read_addr_t tag;
+
+	tag.value = 0;
+	tag.tlb_entry =	entry;
+	return asi_u64_read(ASI_DTLB_TAG_READ_REG, tag.value);
+}
+
+#elif defined (US3)
+
+
+/** Read IMMU TLB Data Access Register.
+ *
+ * @param tlb		TLB number (one of TLB_ISMALL or TLB_IBIG)
+ * @param entry		TLB Entry index.
+ *
+ * @return		Current value of specified IMMU TLB Data Access
+ * 			Register.
+ */
+static inline uint64_t itlb_data_access_read(int tlb, size_t entry)
+{
+	itlb_data_access_addr_t reg;
+	
+	reg.value = 0;
+	reg.tlb_number = tlb;
+	reg.local_tlb_entry = entry;
+	return asi_u64_read(ASI_ITLB_DATA_ACCESS_REG, reg.value);
+}
+
+/** Write IMMU TLB Data Access Register.
+ * @param tlb		TLB number (one of TLB_ISMALL or TLB_IBIG)
+ * @param entry		TLB Entry index.
+ * @param value		Value to be written.
+ */
+static inline void itlb_data_access_write(int tlb, size_t entry,
+	uint64_t value)
+{
+	itlb_data_access_addr_t reg;
+	
+	reg.value = 0;
+	reg.tlb_number = tlb;
+	reg.local_tlb_entry = entry;
+	asi_u64_write(ASI_ITLB_DATA_ACCESS_REG, reg.value, value);
+	flush_pipeline();
+}
+
+/** Read DMMU TLB Data Access Register.
+ *
+ * @param tlb		TLB number (one of TLB_DSMALL, TLB_DBIG, TLB_DBIG) 
+ * @param entry		TLB Entry index.
+ *
+ * @return		Current value of specified DMMU TLB Data Access
+ * 			Register.
+ */
+static inline uint64_t dtlb_data_access_read(int tlb, size_t entry)
+{
+	dtlb_data_access_addr_t reg;
+	
+	reg.value = 0;
+	reg.tlb_number = tlb;
+	reg.local_tlb_entry = entry;
+	return asi_u64_read(ASI_DTLB_DATA_ACCESS_REG, reg.value);
+}
+
+/** Write DMMU TLB Data Access Register.
+ *
+ * @param tlb		TLB number (one of TLB_DSMALL, TLB_DBIG_0, TLB_DBIG_1)  
+ * @param entry		TLB Entry index.
+ * @param value		Value to be written.
+ */
+static inline void dtlb_data_access_write(int tlb, size_t entry,
+	uint64_t value)
+{
+	dtlb_data_access_addr_t reg;
+	
+	reg.value = 0;
+	reg.tlb_number = tlb;
+	reg.local_tlb_entry = entry;
+	asi_u64_write(ASI_DTLB_DATA_ACCESS_REG, reg.value, value);
+	membar();
+}
+
+/** Read IMMU TLB Tag Read Register.
+ *
+ * @param tlb		TLB number (one of TLB_ISMALL or TLB_IBIG) 
+ * @param entry		TLB Entry index.
+ *
+ * @return		Current value of specified IMMU TLB Tag Read Register.
+ */
+static inline uint64_t itlb_tag_read_read(int tlb, size_t entry)
+{
+	itlb_tag_read_addr_t tag;
+
+	tag.value = 0;
+	tag.tlb_number = tlb;
+	tag.local_tlb_entry = entry;
+	return asi_u64_read(ASI_ITLB_TAG_READ_REG, tag.value);
+}
+
+/** Read DMMU TLB Tag Read Register.
+ *
+ * @param tlb		TLB number (one of TLB_DSMALL, TLB_DBIG_0, TLB_DBIG_1)
+ * @param entry		TLB Entry index.
+ *
+ * @return		Current value of specified DMMU TLB Tag Read Register.
+ */
+static inline uint64_t dtlb_tag_read_read(int tlb, size_t entry)
+{
+	dtlb_tag_read_addr_t tag;
+
+	tag.value = 0;
+	tag.tlb_number = tlb;
+	tag.local_tlb_entry = entry;
+	return asi_u64_read(ASI_DTLB_TAG_READ_REG, tag.value);
+}
+
+#endif
+
+
+/** Write IMMU TLB Tag Access Register.
+ *
+ * @param v		Value to be written.
+ */
+static inline void itlb_tag_access_write(uint64_t v)
+{
+	asi_u64_write(ASI_IMMU, VA_IMMU_TAG_ACCESS, v);
+	flush_pipeline();
+}
+
+/** Read IMMU TLB Tag Access Register.
+ *
+ * @return		Current value of IMMU TLB Tag Access Register.
+ */
+static inline uint64_t itlb_tag_access_read(void)
+{
+	return asi_u64_read(ASI_IMMU, VA_IMMU_TAG_ACCESS);
+}
+
+/** Write DMMU TLB Tag Access Register.
+ *
+ * @param v		Value to be written.
+ */
+static inline void dtlb_tag_access_write(uint64_t v)
+{
+	asi_u64_write(ASI_DMMU, VA_DMMU_TAG_ACCESS, v);
+	membar();
+}
+
+/** Read DMMU TLB Tag Access Register.
+ *
+ * @return 		Current value of DMMU TLB Tag Access Register.
+ */
+static inline uint64_t dtlb_tag_access_read(void)
+{
+	return asi_u64_read(ASI_DMMU, VA_DMMU_TAG_ACCESS);
+}
+
+
+/** Write IMMU TLB Data in Register.
+ *
+ * @param v		Value to be written.
+ */
+static inline void itlb_data_in_write(uint64_t v)
+{
+	asi_u64_write(ASI_ITLB_DATA_IN_REG, 0, v);
+	flush_pipeline();
+}
+
+/** Write DMMU TLB Data in Register.
+ *
+ * @param v		Value to be written.
+ */
+static inline void dtlb_data_in_write(uint64_t v)
+{
+	asi_u64_write(ASI_DTLB_DATA_IN_REG, 0, v);
+	membar();
+}
+
+/** Read ITLB Synchronous Fault Status Register.
+ *
+ * @return		Current content of I-SFSR register.
+ */
+static inline uint64_t itlb_sfsr_read(void)
+{
+	return asi_u64_read(ASI_IMMU, VA_IMMU_SFSR);
+}
+
+/** Write ITLB Synchronous Fault Status Register.
+ *
+ * @param v		New value of I-SFSR register.
+ */
+static inline void itlb_sfsr_write(uint64_t v)
+{
+	asi_u64_write(ASI_IMMU, VA_IMMU_SFSR, v);
+	flush_pipeline();
+}
+
+/** Read DTLB Synchronous Fault Status Register.
+ *
+ * @return		Current content of D-SFSR register.
+ */
+static inline uint64_t dtlb_sfsr_read(void)
+{
+	return asi_u64_read(ASI_DMMU, VA_DMMU_SFSR);
+}
+
+/** Write DTLB Synchronous Fault Status Register.
+ *
+ * @param v		New value of D-SFSR register.
+ */
+static inline void dtlb_sfsr_write(uint64_t v)
+{
+	asi_u64_write(ASI_DMMU, VA_DMMU_SFSR, v);
+	membar();
+}
+
+/** Read DTLB Synchronous Fault Address Register.
+ *
+ * @return		Current content of D-SFAR register.
+ */
+static inline uint64_t dtlb_sfar_read(void)
+{
+	return asi_u64_read(ASI_DMMU, VA_DMMU_SFAR);
+}
+
+/** Perform IMMU TLB Demap Operation.
+ *
+ * @param type		Selects between context and page demap (and entire MMU
+ * 			demap on US3).
+ * @param context_encoding Specifies which Context register has Context ID for
+ * 			demap.
+ * @param page		Address which is on the page to be demapped.
+ */
+static inline void itlb_demap(int type, int context_encoding, uintptr_t page)
+{
+	tlb_demap_addr_t da;
+	page_address_t pg;
+	
+	da.value = 0;
+	pg.address = page;
+	
+	da.type = type;
+	da.context = context_encoding;
+	da.vpn = pg.vpn;
+	
+	/* da.value is the address within the ASI */ 
+	asi_u64_write(ASI_IMMU_DEMAP, da.value, 0);
+
+	flush_pipeline();
+}
+
+/** Perform DMMU TLB Demap Operation.
+ *
+ * @param type		Selects between context and page demap (and entire MMU
+ * 			demap on US3).
+ * @param context_encoding Specifies which Context register has Context ID for
+ * 			demap.
+ * @param page		Address which is on the page to be demapped.
+ */
+static inline void dtlb_demap(int type, int context_encoding, uintptr_t page)
+{
+	tlb_demap_addr_t da;
+	page_address_t pg;
+	
+	da.value = 0;
+	pg.address = page;
+	
+	da.type = type;
+	da.context = context_encoding;
+	da.vpn = pg.vpn;
+	
+	/* da.value is the address within the ASI */ 
+	asi_u64_write(ASI_DMMU_DEMAP, da.value, 0);
+
+	membar();
+}
+
+extern void fast_instruction_access_mmu_miss(unative_t, istate_t *);
+extern void fast_data_access_mmu_miss(tlb_tag_access_reg_t, istate_t *);
+extern void fast_data_access_protection(tlb_tag_access_reg_t , istate_t *);
+
+extern void dtlb_insert_mapping(uintptr_t, uintptr_t, int, bool, bool);
+
+extern void dump_sfsr_and_sfar(void);
+extern void describe_dmmu_fault(void);
+
+#endif /* !def __ASM__ */
+
+#endif
+
+/** @}
+ */
Index: c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/mm/sun4u/tte.h
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/mm/sun4u/tte.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/mm/sun4u/tte.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,104 @@
+/*
+ * Copyright (c) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup sparc64mm	
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_sparc64_sun4u_TTE_H_
+#define KERN_sparc64_sun4u_TTE_H_
+
+#define TTE_G		(1 << 0)
+#define TTE_W		(1 << 1)
+#define TTE_P		(1 << 2)
+#define TTE_E		(1 << 3)
+#define TTE_CV		(1 << 4)
+#define TTE_CP		(1 << 5)
+#define TTE_L		(1 << 6)
+
+#define TTE_V_SHIFT	63
+#define TTE_SIZE_SHIFT	61
+
+#ifndef __ASM__
+
+#include <arch/types.h>
+
+/* TTE tag's VA_tag field contains bits <63:VA_TAG_PAGE_SHIFT> of the VA */
+#define VA_TAG_PAGE_SHIFT	22
+
+/** Translation Table Entry - Tag. */
+union tte_tag {
+	uint64_t value;
+	struct {
+		unsigned g : 1;		/**< Global. */
+		unsigned : 2;		/**< Reserved. */
+		unsigned context : 13;	/**< Context identifier. */
+		unsigned : 6;		/**< Reserved. */
+		uint64_t va_tag : 42;	/**< Virtual Address Tag, bits 63:22. */
+	} __attribute__ ((packed));
+};
+
+typedef union tte_tag tte_tag_t;
+
+/** Translation Table Entry - Data. */
+union tte_data {
+	uint64_t value;
+	struct {
+		unsigned v : 1;		/**< Valid. */
+		unsigned size : 2;	/**< Page size of this entry. */
+		unsigned nfo : 1;	/**< No-Fault-Only. */
+		unsigned ie : 1;	/**< Invert Endianness. */
+		unsigned soft2 : 9;	/**< Software defined field. */
+#if defined (US)
+		unsigned diag : 9;	/**< Diagnostic data. */
+		unsigned pfn : 28;	/**< Physical Address bits, bits 40:13. */
+#elif defined (US3)
+		unsigned : 7;		/**< Reserved. */
+		unsigned pfn : 30;	/**< Physical Address bits, bits 42:13 */
+#endif
+		unsigned soft : 6;	/**< Software defined field. */
+		unsigned l : 1;		/**< Lock. */
+		unsigned cp : 1;	/**< Cacheable in physically indexed cache. */
+		unsigned cv : 1;	/**< Cacheable in virtually indexed cache. */
+		unsigned e : 1;		/**< Side-effect. */
+		unsigned p : 1;		/**< Privileged. */
+		unsigned w : 1;		/**< Writable. */
+		unsigned g : 1;		/**< Global. */
+	} __attribute__ ((packed));
+};
+
+typedef union tte_data tte_data_t;
+
+#endif /* !def __ASM__ */
+
+#endif
+
+/** @}
+ */
Index: c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/mm/tlb.h
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/mm/tlb.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/mm/tlb.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,48 @@
+/*
+ * Copyright (c) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup sparc64mm	
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_sparc64_TLB_H_
+#define KERN_sparc64_TLB_H_
+
+
+#if defined (SUN4U)
+#include <arch/mm/sun4u/tlb.h>
+#elif defined (SUN4V)
+#include <arch/mm/sun4v/tlb.h>
+#endif
+
+#endif
+
+/** @}
+ */
Index: c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/mm/tte.h
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/mm/tte.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/mm/tte.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup sparc64mm	
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_sparc64_TTE_H_
+#define KERN_sparc64_TTE_H_
+
+#if defined (SUN4U)
+#include <arch/mm/sun4u/tte.h>
+#elif defined (SUN4V)
+#include <arch/mm/sun4v/tte.h>
+#endif
+
+#endif
+
+/** @}
+ */
Index: c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/regdef.h
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/regdef.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/regdef.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,67 @@
+/*
+ * Copyright (c) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup sparc64	
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_sparc64_REGDEF_H_
+#define KERN_sparc64_REGDEF_H_
+
+#define PSTATE_IE_BIT	(1 << 1)
+#define PSTATE_AM_BIT	(1 << 3)
+
+#define PSTATE_AG_BIT	(1 << 0)
+#define PSTATE_IG_BIT	(1 << 11)
+#define PSTATE_MG_BIT	(1 << 10)
+
+#define PSTATE_PRIV_BIT	(1 << 2)
+#define PSTATE_PEF_BIT	(1 << 4)
+
+#define TSTATE_PSTATE_SHIFT	8
+#define TSTATE_PRIV_BIT		(PSTATE_PRIV_BIT << TSTATE_PSTATE_SHIFT)
+#define TSTATE_IE_BIT		(PSTATE_IE_BIT << TSTATE_PSTATE_SHIFT)
+#define TSTATE_PEF_BIT		(PSTATE_PEF_BIT << TSTATE_PSTATE_SHIFT)
+
+#define TSTATE_CWP_MASK		0x1f
+
+#define WSTATE_NORMAL(n)	(n)
+#define WSTATE_OTHER(n)		((n) << 3)
+
+/*
+ * The following definitions concern the UPA_CONFIG register on US and the
+ * FIREPLANE_CONFIG register on US3. 
+ */
+#define ICBUS_CONFIG_MID_SHIFT    17
+
+#endif
+
+/** @}
+ */
Index: c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/stack.h
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/stack.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/stack.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,72 @@
+/*
+ * Copyright (c) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup sparc64	
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_sparc64_STACK_H_
+#define KERN_sparc64_STACK_H_
+
+#define STACK_ITEM_SIZE			8
+
+/** According to SPARC Compliance Definition, every stack frame is 16-byte aligned. */
+#define STACK_ALIGNMENT			16
+
+/**
+ * 16-extended-word save area for %i[0-7] and %l[0-7] registers.
+ */
+#define STACK_WINDOW_SAVE_AREA_SIZE	(16 * STACK_ITEM_SIZE)
+
+/**
+ * Six extended words for first six arguments.
+ */
+#define STACK_ARG_SAVE_AREA_SIZE	(6 * STACK_ITEM_SIZE)
+
+/**
+ * By convention, the actual top of the stack is %sp + STACK_BIAS.
+ */
+#define STACK_BIAS            2047
+
+/*
+ * Offsets of arguments on stack.
+ */
+#define STACK_ARG0			0
+#define STACK_ARG1			8
+#define STACK_ARG2			16
+#define STACK_ARG3			24
+#define STACK_ARG4			32
+#define STACK_ARG5			40
+#define STACK_ARG6			48
+
+#endif
+
+/** @}
+ */
Index: c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/sun4u/arch.h
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/sun4u/arch.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/include/sun4u/arch.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,47 @@
+/*
+ * Copyright (c) 2005 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup sparc64	
+ * @{
+ */
+/**
+ * @file
+ * @brief	Various sun4u-specific macros.
+ */
+
+#ifndef KERN_sparc64_sun4u_ARCH_H_
+#define KERN_sparc64_sun4u_ARCH_H_
+
+#define ASI_NUCLEUS_QUAD_LDD	0x24	/** ASI for 16-byte atomic loads. */
+#define ASI_DCACHE_TAG		0x47	/** ASI D-Cache Tag. */
+#define ASI_ICBUS_CONFIG	0x4a	/** ASI of the UPA_CONFIG/FIREPLANE_CONFIG register. */
+
+#endif
+
+/** @}
+ */
Index: c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/src/cache.S
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/src/cache.S	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/src/cache.S	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2006 Jakub Jermar
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <rtems/asm.h>
+#include <arch/arch.h>
+#include <arch/mm/cache_spec.h>
+
+#define DCACHE_TAG_SHIFT	2
+
+.register %g2, #scratch
+.register %g3, #scratch
+
+/** Flush the whole D-cache. */
+.global dcache_flush
+dcache_flush:
+	set (DCACHE_SIZE - DCACHE_LINE_SIZE), %g1
+	stxa %g0, [%g1] ASI_DCACHE_TAG
+0:	membar #Sync
+	subcc %g1, DCACHE_LINE_SIZE, %g1
+	bnz,pt %xcc, 0b
+	stxa %g0, [%g1] ASI_DCACHE_TAG
+	membar #Sync			
+	retl
+	! beware SF Erratum #51, do not put the MEMBAR here
+	nop				
Index: c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/src/sun4u/takemmu.S
===================================================================
--- c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/src/sun4u/takemmu.S	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/src/sun4u/takemmu.S	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,477 @@
+#
+# Copyright (c) 2005 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+/*
+ * $Id$
+ *
+ * This file originally is sparc64/src/sun4u/start.S
+ * A lot of changes are made to the code, because we only need the relevant 
+ * portions for taking over the D- and I-MMUs.
+ *
+ */
+#define RTEMS
+
+#include <rtems/asm.h>
+
+/* RTEMS: moved all of these to a common include directory */
+#if 0
+#include <arch/arch.h>
+#include <arch/cpu.h>
+#include <arch/regdef.h>
+#endif
+#include <arch/boot.h>
+#include <arch/stack.h>
+
+#include <arch/mm/mmu.h>
+#include <arch/mm/tlb.h>
+#include <arch/mm/tte.h>
+
+#if 0
+#ifdef CONFIG_SMP
+#include <arch/context_offset.h>
+#endif
+#endif
+
+.register %g2, #scratch
+.register %g3, #scratch
+#if defined (RTEMS)
+.section BOOTSTRAP
+#endif
+
+#if 0
+.section K_TEXT_START, "ax"
+
+#define BSP_FLAG	1
+
+/*
+ * 2^PHYSMEM_ADDR_SIZE is the size of the physical address space on
+ * a given processor.
+ */
+#if defined (US)
+    #define PHYSMEM_ADDR_SIZE	41
+#elif defined (US3)
+    #define PHYSMEM_ADDR_SIZE	43
+#endif
+#endif
+
+#if defined (RTEMS)
+  #define PHYSMEM_ADDR_SIZE 43
+#endif
+
+#if 0
+/*
+ * Here is where the kernel is passed control from the boot loader.
+ * 
+ * The registers are expected to be in this state:
+ * - %o0 starting address of physical memory + bootstrap processor flag
+ * 	bits 63...1:	physical memory starting address / 2
+ *	bit 0:		non-zero on BSP processor, zero on AP processors
+ * - %o1 bootinfo structure address (BSP only)
+ * - %o2 bootinfo structure size (BSP only)
+ *
+ * Moreover, we depend on boot having established the following environment:
+ * - TLBs are on
+ * - identity mapping for the kernel image
+ */
+.global kernel_image_start
+kernel_image_start:
+	mov BSP_FLAG, %l0
+	and %o0, %l0, %l7			! l7 <= bootstrap processor?
+	andn %o0, %l0, %l6			! l6 <= start of physical memory
+
+	! Get bits (PHYSMEM_ADDR_SIZE - 1):13 of physmem_base.
+	srlx %l6, 13, %l5
+	
+	! l5 <= physmem_base[(PHYSMEM_ADDR_SIZE - 1):13]
+	sllx %l5, 13 + (63 - (PHYSMEM_ADDR_SIZE - 1)), %l5
+	srlx %l5, 63 - (PHYSMEM_ADDR_SIZE - 1), %l5	
+
+	/*
+	 * Setup basic runtime environment.
+	 */
+
+	wrpr %g0, NWINDOWS - 2, %cansave	! set maximum saveable windows
+	wrpr %g0, 0, %canrestore		! get rid of windows we will
+						! never need again
+	wrpr %g0, 0, %otherwin			! make sure the window state is
+						! consistent
+	wrpr %g0, NWINDOWS - 1, %cleanwin	! prevent needless clean_window
+						! traps for kernel
+						
+	wrpr %g0, 0, %wstate			! use default spill/fill trap
+
+	wrpr %g0, 0, %tl			! TL = 0, primary context
+						! register is used
+
+	wrpr %g0, PSTATE_PRIV_BIT, %pstate	! disable interrupts and disable
+						! 32-bit address masking
+
+	wrpr %g0, 0, %pil			! intialize %pil
+#endif
+
+#if defined (RTEMS)
+  /* pass o0 as start of physical memory */
+.global _take_mmu
+_take_mmu:
+	save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
+  mov %i0, %l6
+#endif
+  
+  /* these are copied from above */
+  ! Get bits (PHYSMEM_ADDR_SIZE - 1):13 of physmem_base.
+  srlx %l6, 13, %l5
+
+  ! l5 <= physmem_base[(PHYSMEM_ADDR_SIZE - 1):13]
+  sllx %l5, 13 + (63 - (PHYSMEM_ADDR_SIZE - 1)), %l5
+  srlx %l5, 63 - (PHYSMEM_ADDR_SIZE - 1), %l5
+	
+  /*
+	 * Switch to kernel trap table.
+	 */
+	sethi %hi(trap_table), %g1
+	wrpr %g1, %lo(trap_table), %tba
+
+
+	/* 
+	 * Take over the DMMU by installing locked TTE entry identically
+	 * mapping the first 4M of memory.
+	 *
+	 * In case of DMMU, no FLUSH instructions need to be issued. Because of
+	 * that, the old DTLB contents can be demapped pretty straightforwardly
+	 * and without causing any traps.
+	 */
+
+	wr %g0, ASI_DMMU, %asi
+/*
+#define SET_TLB_DEMAP_CMD(r1, context_id) \
+	set (TLB_DEMAP_CONTEXT << TLB_DEMAP_TYPE_SHIFT) | (context_id << \
+		TLB_DEMAP_CONTEXT_SHIFT), %r1
+*/
+/*	
+	! demap context 0
+	SET_TLB_DEMAP_CMD(g1, TLB_DEMAP_NUCLEUS)
+	stxa %g0, [%g1] ASI_DMMU_DEMAP			
+	membar #Sync
+*/
+#define SET_TLB_TAG(r1, context) \
+	set VMA | (context << TLB_TAG_ACCESS_CONTEXT_SHIFT), %r1
+
+	! write DTLB tag
+	SET_TLB_TAG(g1, MEM_CONTEXT_KERNEL)
+	stxa %g1, [VA_DMMU_TAG_ACCESS] %asi			
+	membar #Sync
+
+#ifdef CONFIG_VIRT_IDX_DCACHE
+#define TTE_LOW_DATA(imm) 	(TTE_CP | TTE_CV | TTE_P | LMA | (imm))
+#else /* CONFIG_VIRT_IDX_DCACHE */
+#define TTE_LOW_DATA(imm) 	(TTE_CP | TTE_P | LMA | (imm))
+#endif /* CONFIG_VIRT_IDX_DCACHE */
+
+#define SET_TLB_DATA(r1, r2, imm) \
+	set TTE_LOW_DATA(imm), %r1; \
+	or %r1, %l5, %r1; \
+	mov PAGESIZE_4M, %r2; \
+	sllx %r2, TTE_SIZE_SHIFT, %r2; \
+	or %r1, %r2, %r1; \
+	mov 1, %r2; \
+	sllx %r2, TTE_V_SHIFT, %r2; \
+	or %r1, %r2, %r1;
+	
+	! write DTLB data and install the kernel mapping
+	SET_TLB_DATA(g1, g2, TTE_L | TTE_W)	! use non-global mapping
+	stxa %g1, [%g0] ASI_DTLB_DATA_IN_REG		
+	membar #Sync
+
+	/*
+	 * Because we cannot use global mappings (because we want to have
+	 * separate 64-bit address spaces for both the kernel and the
+	 * userspace), we prepare the identity mapping also in context 1. This
+	 * step is required by the code installing the ITLB mapping.
+	 */
+/*	! write DTLB tag of context 1 (i.e. MEM_CONTEXT_TEMP)
+	SET_TLB_TAG(g1, MEM_CONTEXT_TEMP)
+	stxa %g1, [VA_DMMU_TAG_ACCESS] %asi			
+	membar #Sync
+
+	! write DTLB data and install the kernel mapping in context 1
+	SET_TLB_DATA(g1, g2, TTE_W)			! use non-global mapping
+	stxa %g1, [%g0] ASI_DTLB_DATA_IN_REG		
+	membar #Sync
+*/
+	/*
+	 * Now is time to take over the IMMU. Unfortunatelly, it cannot be done
+	 * as easily as the DMMU, because the IMMU is mapping the code it
+	 * executes.
+	 *
+	 * [ Note that brave experiments with disabling the IMMU and using the
+	 * DMMU approach failed after a dozen of desparate days with only little
+	 * success. ]
+	 *
+	 * The approach used here is inspired from OpenBSD. First, the kernel
+	 * creates IMMU mapping for itself in context 1 (MEM_CONTEXT_TEMP) and
+	 * switches to it. Context 0 (MEM_CONTEXT_KERNEL) can be demapped
+	 * afterwards and replaced with the kernel permanent mapping. Finally,
+	 * the kernel switches back to context 0 and demaps context 1.
+	 *
+	 * Moreover, the IMMU requires use of the FLUSH instructions. But that
+	 * is OK because we always use operands with addresses already mapped by
+	 * the taken over DTLB.
+	 */
+#if 0	
+	set kernel_image_start, %g5
+#endif
+#if defined (RTEMS)
+  set _take_mmu, %g5
+#endif
+/*	
+	! write ITLB tag of context 1
+	SET_TLB_TAG(g1, MEM_CONTEXT_TEMP)
+	mov VA_DMMU_TAG_ACCESS, %g2
+	stxa %g1, [%g2] ASI_IMMU
+	flush %g5
+
+	! write ITLB data and install the temporary mapping in context 1
+	SET_TLB_DATA(g1, g2, 0)			! use non-global mapping
+	stxa %g1, [%g0] ASI_ITLB_DATA_IN_REG		
+	flush %g5
+	
+	! switch to context 1
+	mov MEM_CONTEXT_TEMP, %g1
+	stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi	! ASI_DMMU is correct here !!!
+	flush %g5
+	
+	! demap context 0
+	SET_TLB_DEMAP_CMD(g1, TLB_DEMAP_NUCLEUS)
+	stxa %g0, [%g1] ASI_IMMU_DEMAP			
+	flush %g5
+*/
+	! write ITLB tag of context 0
+	SET_TLB_TAG(g1, MEM_CONTEXT_KERNEL)
+	mov VA_DMMU_TAG_ACCESS, %g2
+	stxa %g1, [%g2] ASI_IMMU
+	flush %g5
+
+	! write ITLB data and install the permanent kernel mapping in context 0
+	SET_TLB_DATA(g1, g2, TTE_L)		! use non-global mapping
+	stxa %g1, [%g0] ASI_ITLB_DATA_IN_REG		
+	flush %g5
+/*
+	! enter nucleus - using context 0
+	wrpr %g0, 1, %tl
+
+	! demap context 1
+	SET_TLB_DEMAP_CMD(g1, TLB_DEMAP_PRIMARY)
+	stxa %g0, [%g1] ASI_IMMU_DEMAP			
+	flush %g5
+	
+	! set context 0 in the primary context register
+	stxa %g0, [VA_PRIMARY_CONTEXT_REG] %asi	! ASI_DMMU is correct here !!!
+	flush %g5
+	
+	! leave nucleus - using primary context, i.e. context 0
+	wrpr %g0, 0, %tl
+
+  wrpr %g0, 0, %wstate ! default spill/fill trap
+*/
+#if 0
+	brz %l7, 1f				! skip if you are not the bootstrap CPU
+	nop
+
+	/*
+	 * Save physmem_base for use by the mm subsystem.
+	 * %l6 contains starting physical address
+	 */
+	sethi %hi(physmem_base), %l4
+	stx %l6, [%l4 + %lo(physmem_base)]
+
+	/*
+	 * Precompute kernel 8K TLB data template.
+	 * %l5 contains starting physical address
+	 * bits [(PHYSMEM_ADDR_SIZE - 1):13]
+	 */
+	sethi %hi(kernel_8k_tlb_data_template), %l4
+	ldx [%l4 + %lo(kernel_8k_tlb_data_template)], %l3
+	or %l3, %l5, %l3
+	stx %l3, [%l4 + %lo(kernel_8k_tlb_data_template)]
+#endif
+
+	/*
+	 * Flush D-Cache.
+	 */
+	call dcache_flush
+	nop
+
+#if 0
+	/*
+	 * So far, we have not touched the stack.
+	 * It is a good idea to set the kernel stack to a known state now.
+	 */
+	sethi %hi(temporary_boot_stack), %sp
+	or %sp, %lo(temporary_boot_stack), %sp
+	sub %sp, STACK_BIAS, %sp
+
+	sethi %hi(bootinfo), %o0
+	call memcpy				! copy bootinfo
+	or %o0, %lo(bootinfo), %o0
+
+	call arch_pre_main
+	nop
+	
+	call main_bsp
+	nop
+#endif
+
+#if defined (RTEMS)
+  ret
+  restore
+#endif
+
+	/* Not reached. */
+
+0:
+	ba %xcc, 0b
+	nop
+
+#if 0
+1:
+#ifdef CONFIG_SMP
+	/*
+	 * Determine the width of the MID and save its mask to %g3. The width
+	 * is
+	 * 	* 5 for US and US-IIIi,
+	 * 	* 10 for US3 except US-IIIi.
+	 */
+#if defined(US)
+	mov 0x1f, %g3
+#elif defined(US3)
+	mov 0x3ff, %g3
+	rdpr %ver, %g2
+	sllx %g2, 16, %g2
+	srlx %g2, 48, %g2
+	cmp %g2, IMPL_ULTRASPARCIII_I
+	move %xcc, 0x1f, %g3
+#endif
+
+	/*
+	 * Read MID from the processor.
+	 */
+	ldxa [%g0] ASI_ICBUS_CONFIG, %g1
+	srlx %g1, ICBUS_CONFIG_MID_SHIFT, %g1
+	and %g1, %g3, %g1
+
+	/*
+	 * Active loop for APs until the BSP picks them up. A processor cannot
+	 * leave the loop until the global variable 'waking_up_mid' equals its
+	 * MID.
+	 */
+	set waking_up_mid, %g2
+2:
+	ldx [%g2], %g3
+	cmp %g3, %g1
+	bne %xcc, 2b
+	nop
+
+	/*
+	 * Configure stack for the AP.
+	 * The AP is expected to use the stack saved
+	 * in the ctx global variable.
+	 */
+	set ctx, %g1
+	add %g1, OFFSET_SP, %g1
+	ldx [%g1], %o6
+
+	call main_ap
+	nop
+
+	/* Not reached. */
+#endif
+	
+0:
+	ba %xcc, 0b
+	nop
+
+
+.section K_DATA_START, "aw", @progbits
+
+/*
+ * Create small stack to be used by the bootstrap processor. It is going to be
+ * used only for a very limited period of time, but we switch to it anyway,
+ * just to be sure we are properly initialized.
+ */
+
+#define INITIAL_STACK_SIZE	1024
+
+.align STACK_ALIGNMENT
+	.space INITIAL_STACK_SIZE
+.align STACK_ALIGNMENT
+temporary_boot_stack:
+	.space STACK_WINDOW_SAVE_AREA_SIZE
+
+#endif /* 0 */
+
+.data
+
+.align 8
+.global physmem_base		! copy of the physical memory base address
+physmem_base:
+	.quad 0
+
+/*
+ * The fast_data_access_mmu_miss_data_hi label and the end_of_identity and
+ * kernel_8k_tlb_data_template variables are meant to stay together,
+ * aligned on 16B boundary.
+ */
+.global fast_data_access_mmu_miss_data_hi
+.global end_of_identity 
+.global kernel_8k_tlb_data_template
+
+.align 16
+/*
+ * This label is used by the fast_data_access_MMU_miss trap handler.
+ */
+fast_data_access_mmu_miss_data_hi:
+/*
+ * This variable is used by the fast_data_access_MMU_miss trap handler.
+ * In runtime, it is modified to contain the address of the end of physical
+ * memory.
+ */
+end_of_identity:
+	.quad -1 
+/*
+ * This variable is used by the fast_data_access_MMU_miss trap handler.
+ * In runtime, it is further modified to reflect the starting address of
+ * physical memory.
+ */
+kernel_8k_tlb_data_template:
+#ifdef CONFIG_VIRT_IDX_DCACHE
+	.quad ((1 << TTE_V_SHIFT) | (PAGESIZE_8K << TTE_SIZE_SHIFT) | TTE_CP | \
+		 TTE_CV | TTE_P | TTE_W)
+#else /* CONFIG_VIRT_IDX_DCACHE */
+	.quad ((1 << TTE_V_SHIFT) | (PAGESIZE_8K << TTE_SIZE_SHIFT) | TTE_CP | \
+		TTE_P | TTE_W)
+#endif /* CONFIG_VIRT_IDX_DCACHE */
Index: c/src/lib/libbsp/sparc64/shared/include/asm.h
===================================================================
--- c/src/lib/libbsp/sparc64/shared/include/asm.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/include/asm.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,15 @@
+/*
+ * asm.h
+ *
+ * Copyright 2010 Gedare Bloom
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.com/license/LICENSE.
+ *
+ * $Id$
+ */
+
+
+extern void halt( void );
+
Index: c/src/lib/libbsp/sparc64/shared/include/traptable.h
===================================================================
--- c/src/lib/libbsp/sparc64/shared/include/traptable.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/include/traptable.h	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,21 @@
+/*
+ * traptable.h
+ *
+ * Copyright 2010 Gedare Bloom
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.com/license/LICENSE.
+ *
+ * $Id$
+ */
+
+/* This file can be included by assembly code */
+
+#define ENTRY_SIZE (32)
+#define TABLE_SIZE (1024*ENTRY_SIZE)
+
+#ifndef ASM
+extern void* trap_table[TABLE_SIZE];
+#endif
+
Index: c/src/lib/libbsp/sparc64/shared/start/start.S
===================================================================
--- c/src/lib/libbsp/sparc64/shared/start/start.S	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/start/start.S	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,176 @@
+#
+# Copyright (c) 2006 Martin Decky
+# Copyright (c) 2006 Jakub Jermar
+# All rights reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions
+# are met:
+#
+# - Redistributions of source code must retain the above copyright
+#   notice, this list of conditions and the following disclaimer.
+# - Redistributions in binary form must reproduce the above copyright
+#   notice, this list of conditions and the following disclaimer in the
+#   documentation and/or other materials provided with the distribution.
+# - The name of the author may not be used to endorse or promote products
+#   derived from this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+/*
+ * start.S
+ *
+ * Start code for Sparc64 RTEMS
+ *
+ * This is based on the boot.S file of the HelenOS sparc64 architecture.
+ * http://www.helenos.org/
+ * ${helenos}/boot/arch/sparc64/loader/boot.S
+ *
+ * Modifications for the RTEMS executive are 
+ *   COPYRIGHT (c) 2010 Gedare Bloom.
+ *   COPYRIGHT (c) 2010 Eugen Leontie.
+ *
+ * $Id$
+ */
+
+#include <rtems/asm.h>
+#include <rtems/score/cpu.h>
+
+#define PSTATE_PRIV_BIT	4
+
+.register %g2, #scratch
+.register %g3, #scratch
+.register %g6, #scratch
+.register %g7, #scratch
+
+#if 0
+#define _BSP_DEBUG
+#endif
+
+#if _BSP_DEBUG
+/*
+ * This is for debug and script support to identify RTEMS app termination
+ */
+.section 	.data
+	.align 8
+_end_token_string:
+	.asciz "END_TOKEN\n"
+#endif
+
+.section BOOTSTRAP, "ax"
+
+PUBLIC(_start)
+  .global _start
+  SYM(_start):
+    start:
+    b 1f
+    nop
+
+    /*
+     * This header forces SILO to load the image at 0x4000.
+     * More precisely, SILO will think this is an old version of Linux.
+     */
+    .ascii "HdrS"
+    .word 0
+    .half 0
+    .half 0
+    .half 0
+    .half 0
+    .global silo_ramdisk_image
+    silo_ramdisk_image:
+    .word 0
+    .global silo_ramdisk_size
+    silo_ramdisk_size:
+    .word 0
+
+    .align 8
+    1:	
+    /*
+     * Disable interrupts and disable address masking.
+     */
+    wrpr %g0, PSTATE_PRIV_BIT, %pstate
+
+    wrpr %g0, SPARC_NUMBER_OF_REGISTER_WINDOWS - 2, %cansave	! set maximum saveable windows
+    wrpr %g0, 0, %canrestore		! get rid of windows we will never need again
+    wrpr %g0, 0, %otherwin			! make sure the window state is consistent
+    wrpr %g0, SPARC_NUMBER_OF_REGISTER_WINDOWS - 1, %cleanwin	! prevent needless clean_window traps for kernel
+
+  /* g4 needs to be cleared for gcc */
+  mov %g0, %g4
+
+  /* Clear the bss */
+	setx	SYM(bss_start), %l0, %g2	! g2 = start of bss
+	setx	SYM(_end), %l0, %g3		    ! g3 = end of bss
+zerobss:
+	stx	%g0, [%g2]
+	add	%g2, 8, %g2
+	cmp	%g2, %g3
+	bleu,a	zerobss
+	nop
+
+  /* Install stack */
+setstack:
+	set SYM(StackStart), %sp
+	add %sp, -STACK_BIAS, %sp
+
+	setx ofw_cif, %l0, %l1
+ 
+	call ofw_init		! initialize OpenFirmware
+	stx %o4, [%l1]
+
+  call bootstrap
+  nop
+
+  /* BSP-specific pre-bootcard initializations */
+  call SYM(_BSP_init)
+  nop
+
+  /* Set up ISR handler for interrupt enable/disable */
+	setx SYM(syscall), %l0, %o1
+	setx param_space, %l0, %o2
+	call SYM(_CPU_ISR_install_raw_handler)
+	mov 0x100, %o0 
+
+  /* Don't need to copy initialized data to RAM--link puts all in RAM already */
+
+	mov	%g0, %o0		! clear command line passed to main
+	call SYM(boot_card)
+	sub	%sp, 0x60, %sp		! make room on stack (necessary?)
+
+#if _BSP_DEBUG
+  /* execution returns here when RTEMS terminates */
+	sethi %hi(_end_token_string), %g1
+	add %g1, %lo(_end_token_string), %o0
+	call SYM(printk)
+	nop
+#endif
+
+  call SYM(halt)
+  nop
+
+halted:	nop
+	    b SYM(halted)
+
+  .align CPU_ALIGNMENT
+  param_space:
+  	.space 8
+
+    .global _fini
+    _fini:
+    nop
+    nop
+
+    .global _init
+    _init:
+    nop
+    nop
Index: c/src/lib/libbsp/sparc64/shared/start/trap_table.S
===================================================================
--- c/src/lib/libbsp/sparc64/shared/start/trap_table.S	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/start/trap_table.S	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,204 @@
+/*
+ * trap_table.S
+ *
+ * trap code for Sparc64 RTEMS.
+ *
+ *  COPYRIGHT (c) 2010 Gedare Bloom.
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.com/license/LICENSE.
+ * 
+ *  This code defines the space for the trap table used by sun4u.
+ *
+ *  This file is currently unused.
+ *
+ * $Id$
+ */
+
+
+#include <rtems/asm.h>
+#include <rtems/score/cpu.h>
+#include <traptable.h>
+
+#define BAD_TRAP \
+    ta  0; \
+  nop; \
+  nop; \
+  nop; \
+  nop; \
+  nop; \
+  nop; \
+  nop;
+
+.section .ttable
+  .align (TABLE_SIZE)
+PUBLIC(trap_table)
+  SYM(trap_table):
+  .space TABLE_SIZE
+
+/* These are just bogus traps that aren't used ever
+
+.org trap_table + 8*32
+    BAD_TRAP;                                     ! 8 IAE
+.org trap_table + 9*32
+    BAD_TRAP;                                     ! 9
+.org trap_table + 10*32
+    BAD_TRAP;                                     ! A
+
+.org trap_table + 11*32
+    BAD_TRAP;                                     ! B
+.org trap_table + 12*32
+    BAD_TRAP;                                     ! C
+
+.org trap_table + 16*32
+    BAD_TRAP;                                     ! 10 illegal instruction
+.org trap_table + 17*32
+    BAD_TRAP;                                     ! 11 privileged op_code
+
+.org trap_table + 18*32
+    BAD_TRAP;                                     ! 12 unimplemented LDD
+.org trap_table + 19*32
+    BAD_TRAP;                                     ! 13 unimplemented std
+.org trap_table + 20*32
+    BAD_TRAP;                                     ! 14 dae invalid asi
+.org trap_table + 21*32
+    BAD_TRAP;                                     ! 15 dae priv violation
+.org trap_table + 22*32
+    BAD_TRAP;                                     ! 16 dae nc page
+.org trap_table + 23*32
+    BAD_TRAP;                                     ! 17 dae nfo page
+
+.org trap_table + 32*32
+    BAD_TRAP;                                     ! 20 fp_disabled
+.org trap_table + 33*32
+    BAD_TRAP;                                     ! 21 fp_exception_ieee_754
+.org trap_table + 34*32
+    BAD_TRAP;                                     ! 22 fp_exception_other
+
+.org trap_table + 35*32
+    BAD_TRAP;                                     ! 23 tag_overflow
+
+.org trap_table + 36*32
+    BAD_TRAP;                         ! 24-27 clean_window
+
+
+.org trap_table + 40*32
+    BAD_TRAP;                                     ! 28 div by zero
+    
+.org trap_table + 48*32
+    BAD_TRAP;                                     ! 30 data access exception
+
+.org trap_table + 49*32
+    BAD_TRAP;                                     ! 31 data mmu miss
+.org trap_table + 50*32
+    BAD_TRAP;                                     ! 32 data access error
+
+.org trap_table + 52*32
+    BAD_TRAP;                                     ! 34 mem address not aligned 
+.org trap_table + 53*32
+    BAD_TRAP;                                     ! 35 LDDF mem address not aligned 
+.org trap_table + 54*32
+    BAD_TRAP;                                     ! 36 STDF mem addr not aligned
+.org trap_table + 55*32
+    BAD_TRAP;                                     ! 37 privileged action
+.org trap_table + 56*32
+    BAD_TRAP;                                     ! 38 LDQF mem addr not aligned
+.org trap_table + 57*32
+    BAD_TRAP;                                     ! 39 STQF mem addr not aligned
+
+
+.org trap_table + 65*32
+    BAD_TRAP;                                     ! 41-4F
+                                                  ! interrupt_level_n (1-15) 
+.org trap_table + 66*32
+    BAD_TRAP;                                     ! 
+.org trap_table + 67*32
+    BAD_TRAP;                                     ! 
+.org trap_table + 68*32
+    BAD_TRAP;                                     ! 
+.org trap_table + 69*32
+    BAD_TRAP;                                     ! 
+.org trap_table + 70*32
+    BAD_TRAP;                                     ! 
+.org trap_table + 71*32
+    BAD_TRAP;                                     ! 
+.org trap_table + 72*32
+    BAD_TRAP;                                     ! 
+.org trap_table + 73*32
+    BAD_TRAP;                                     ! 
+.org trap_table + 74*32
+    BAD_TRAP;                                     ! 
+.org trap_table + 75*32
+    BAD_TRAP;                                     ! 
+.org trap_table + 76*32
+    BAD_TRAP;                                     ! 
+.org trap_table + 77*32
+    BAD_TRAP;                                     ! 
+.org trap_table + 78*32
+    BAD_TRAP;                                     ! 
+.org trap_table + 79*32
+    BAD_TRAP;                                     ! 
+
+.org trap_table + 124*32
+    BAD_TRAP;                                     ! 7C cpu mondo
+
+.org trap_table + 125*32
+    BAD_TRAP;                                     ! 7D dev mondo
+
+.org trap_table + 128*32
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;          ! 80-83 spill_0_normal
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;          ! 84-87 spill_1_normal
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;          ! 88-8B spill_2_normal
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;          ! 8C-8F spill_3_normal
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;          ! 90-93 spill_4_normal
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;          ! 94-97 spill_5_normal
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;          ! 98-9B spill_6_normal
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;          ! 9C-9F spill_7_normal
+
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;          ! A0-A3 spill_0_other
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;          ! A4-A7 spill_1_other
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;          ! A8-AB spill_2_other
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;          ! AC-AF spill_3_other
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;          ! B0-B3 spill_4_other
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;          ! B4-B7 spill_5_other
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;          ! B8-BB spill_6_other
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;          ! BC-BF spill_7_other
+
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;          ! C0-C3 fill_0_normal
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;          ! C4-C7 fill_1_normal
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;          ! C8-CB fill_2_normal
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;          ! CC-CF fill_3_normal
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;          ! D0-D3 fill_4_normal
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;          ! D4-D7 fill_5_normal
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;          ! D8-DB fill_6_normal
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;          ! DC-DF fill_7_normal
+
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;          ! E0-E3 fill_0_other
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;          ! E4-E7 fill_1_other
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;          ! E8-EB fill_2_other
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;          ! EC-EF fill_3_other
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;          ! F0-F3 fill_4_other
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;          ! F4-F7 fill_5_other
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;          ! F8-FB fill_6_other
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;          ! FC-FF fill_7_other
+
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;                   ! 100-17F trap instruction
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;                                    
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;
+    BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;BAD_TRAP;
+*/
+
Index: c/src/lib/libbsp/sparc64/shared/startup/bspgetworkarea.c
===================================================================
--- c/src/lib/libbsp/sparc64/shared/startup/bspgetworkarea.c	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/startup/bspgetworkarea.c	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,93 @@
+/*
+ *  This routine is an implementation of the bsp_get_work_area()
+ *  that can be used by all BSPs following linkcmds conventions
+ *  regarding heap, stack, and workspace allocation.
+ *
+ *  COPYRIGHT (c) 1989-2008.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.com/license/LICENSE.
+ *
+ *  $Id$
+ */
+
+#include <bsp.h>
+#include <bsp/bootcard.h>
+#ifdef BSP_GET_WORK_AREA_DEBUG
+  #include <rtems/bspIo.h>
+#endif
+
+/*
+ *  These are provided by the linkcmds for ALL of the BSPs which use this file.
+ */
+extern char WorkAreaBase[];
+extern char HeapSize[];
+extern char HeapBase[];
+
+
+/*
+ *  We may get the size information from U-Boot or the linker scripts.
+ */
+#ifdef HAS_UBOOT
+  extern bd_t bsp_uboot_board_info;
+#else
+  extern char RamBase[];
+  extern char RamSize[];
+#endif /* HAS_UBOOT */
+
+/*
+ *  This method returns the base address and size of the area which
+ *  is to be allocated between the RTEMS Workspace and the C Program
+ *  Heap.
+ */
+void bsp_get_work_area(
+  void      **work_area_start,
+  uintptr_t  *work_area_size,
+  void      **heap_start,
+  uintptr_t  *heap_size
+)
+{
+  uintptr_t ram_end;
+
+  #ifdef HAS_UBOOT
+    ram_end = (uintptr_t) bsp_uboot_board_info.bi_memstart +
+                          bsp_uboot_board_info.bi_memsize;
+  #else
+    ram_end = (uintptr_t)RamBase + (uintptr_t)RamSize;
+  #endif
+
+  *work_area_start = WorkAreaBase;
+  *work_area_size  = ram_end - (uintptr_t) WorkAreaBase;
+  *heap_start      = (void*) HeapBase;
+  *heap_size       = (uintptr_t) HeapSize;
+
+  /*
+   *  The following may be helpful in debugging what goes wrong when
+   *  you are allocating the Work Area in a new BSP.
+   */
+  #ifdef BSP_GET_WORK_AREA_DEBUG
+    {
+      void *sp = __builtin_frame_address(0);
+      void *end = *work_area_start + *work_area_size;
+      printk(
+		"bsp_get_work_area\n\r"
+        "work_area_start = 0x%p\n\r"
+        "work_area_size = %d 0x%08x\n\r"
+        "end = 0x%p\n\r"
+        "heap_start = 0x%p\n\r"
+        "heap_size = %d\n\r"
+        "current stack pointer = 0x%p%s\n\r",
+        *work_area_start,
+        *work_area_size,  /* decimal */
+        *work_area_size,  /* hexadecimal */
+        end,
+        *heap_start,
+        *heap_size,
+        sp,
+        ((sp >= *work_area_start && sp <= end) ? " OVERLAPS!" : "")
+     );
+  }
+ #endif
+}
Index: c/src/lib/libbsp/sparc64/shared/startup/bspstart.c
===================================================================
--- c/src/lib/libbsp/sparc64/shared/startup/bspstart.c	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/startup/bspstart.c	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,33 @@
+/*
+ *  This routine starts the application.  It includes application,
+ *  board, and monitor specific initialization and configuration.
+ *  The generic CPU dependent initialization has been performed
+ *  before this routine is invoked.
+ *
+ *  COPYRIGHT (c) 1989-1999.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.com/license/LICENSE.
+ *
+ *  $Id$
+ */
+
+#include <string.h>
+
+#include <bsp.h>
+
+extern void sparc64_install_isr_entries(void);
+
+/*
+ *  bsp_start
+ *
+ *  This routine does the bulk of the system initialization.
+ */
+
+void bsp_start( void )
+{
+/*	bootstrap(); */
+	sparc64_install_isr_entries();
+}
Index: c/src/lib/libbsp/sparc64/shared/startup/linkcmds
===================================================================
--- c/src/lib/libbsp/sparc64/shared/startup/linkcmds	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/startup/linkcmds	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,211 @@
+/*  linkcmds
+ * 
+ *  $Id$
+ */
+
+/*
+ * For alignment, SPARC v9 specifies that instructions are 4-byte aligned, 
+ * and the worst-case alignment requirements for data are for quad-word 
+ * accesses, which must be 16-byte aligned.
+ */
+
+/*
+ * Declare some sizes.
+ */
+RamBase = DEFINED(RamBase) ? RamBase : 0x0;
+RamSize = DEFINED(RamSize) ? RamSize : 16M;
+HeapSize = DEFINED(HeapSize) ? HeapSize : 256k;
+StackSize = DEFINED(StackSize) ? StackSize : 256k;
+
+RAM_END = RamBase + RamSize;
+
+/* Default linker script, for normal executables */
+OUTPUT_FORMAT("elf64-sparc")
+ENTRY(start)
+
+MEMORY
+        {
+	        ram : ORIGIN = 0x0, LENGTH = 16M
+	}
+
+
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .gnu.version   : { *(.gnu.version)	}
+  .gnu.version_d   : { *(.gnu.version_d)	}
+  .gnu.version_r   : { *(.gnu.version_r)	}
+  .rel.init      : { *(.rel.init)		}
+  .rela.init     : { *(.rela.init)	}
+  .rel.text      :
+    {
+      *(.rel.text)
+      *(.rel.text.*)
+      *(.rel.gnu.linkonce.t*)
+    }
+  .rela.text     :
+    {
+      *(.rela.text)
+      *(.rela.text.*)
+      *(.rela.gnu.linkonce.t*)
+    }
+  .rel.fini      : { *(.rel.fini)		}
+  .rela.fini     : { *(.rela.fini)	}
+  .rel.rodata    :
+    {
+      *(.rel.rodata)
+      *(.rel.rodata.*)
+      *(.rel.gnu.linkonce.r*)
+    }
+  .rela.rodata   :
+    {
+      *(.rela.rodata)
+      *(.rela.rodata.*)
+      *(.rela.gnu.linkonce.r*)
+    }
+  .rel.data      :
+    {
+      *(.rel.data)
+      *(.rel.data.*)
+      *(.rel.gnu.linkonce.d*)
+    }
+  .rela.data     :
+    {
+      *(.rela.data)
+      *(.rela.data.*)
+      *(.rela.gnu.linkonce.d*)
+    }
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  /* Internal text space or external memory */
+  .text 0x4000 : AT (0x4000)
+  {
+    *(BOOTSTRAP);
+    *(.text*)
+
+    /*
+     * Special FreeBSD sysctl sections.
+     */
+    . = ALIGN (16);
+    __start_set_sysctl_set = .;
+    *(set_sysctl_*);
+    __stop_set_sysctl_set = ABSOLUTE(.);
+    *(set_domain_*);
+    *(set_pseudo_*);
+
+    *(.eh_frame)
+    . = ALIGN (16);
+
+    *(.gnu.linkonce.t*)
+
+    /*
+     * C++ constructors
+     */
+    /* gcc uses crtbegin.o to find the start of
+       the constructors, so we make sure it is
+       first.  Because this is a wildcard, it
+       doesn't matter if the user does not
+       actually link against crtbegin.o; the
+       linker won't look for a file to match a
+       wildcard.  The wildcard also means that it
+       doesn't matter which directory crtbegin.o
+       is in.  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*crtbegin?.o(.ctors))
+    /* We don't want to include the .ctor section from
+       the crtend.o file until after the sorted ctors.
+       The .ctor section from the crtend file contains the
+       end of ctors marker and it must be last */
+    KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*crtbegin?.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+
+    _rodata_start = . ;
+    *(.rodata*)
+    *(.gnu.linkonce.r*)
+    _erodata = ALIGN( 0x10 ) ;
+
+    etext = ALIGN(2);
+    _etext = . ;
+
+    *(.init)
+    PROVIDE (_fini = .);
+    KEEP (*(.fini))
+    *(.lit)
+    *(.shdata)
+
+     . = ALIGN (16);
+    _endtext = . ;
+  } > ram 
+  
+  .data	  : AT (ADDR (.text) + SIZEOF (.text))
+  {
+     PROVIDE (__data_start = .) ;
+    data_start = . ;
+    _data_start = . ;
+    *(.data)
+    *(.data*)
+    *(.rodata)  /* We need to include .rodata here if gcc is used */
+    *(.rodata*) /* with -fdata-sections.  */
+    *(.gnu.linkonce.d*)
+    . = ALIGN(2);
+    edata = . ;
+    _edata = . ;
+     PROVIDE (__data_end = .) ;
+  } > ram
+ 
+  /* XXX
+   __data_load_start = LOADADDR(.data);
+   __data_load_end = __data_load_start + SIZEOF(.data);
+  */
+   . = ALIGN (16);
+  .dynamic	  : { *(.dynamic) 	} >ram
+  .jcr        : { *(.jcr)     } > ram
+  .shbss      : { *(.shbss)  } > ram
+  .bss        :
+  {
+    FILL(0x00000000);
+    . = ALIGN(16);
+    __bss_start = ALIGN(0x8);
+    bss_start = .;
+    bss_start = .;
+    *(.bss .bss* .gnu.linkonce.b*)
+    *(COMMON)
+    . = ALIGN (16);
+    end = .;
+    _end = .;
+    __end = .;
+  
+    . = ALIGN (16); /* arbitrary alignment */
+    PROVIDE (WorkAreaBase = .);
+    . += HeapSize;
+    PROVIDE (HeapBase = .);
+    . += HeapSize;
+    . += StackSize;
+     PROVIDE (__stack = .);
+     PROVIDE (StackStart = .);
+  } > ram
+
+  /* made-up section for the trap-table, which has a very high alignment */
+  . = ALIGN(1024*32);
+  .ttable   : { *(.ttable) } > ram
+  
+}
+
+
Index: c/src/lib/libbsp/sparc64/shared/startup/setvec.c
===================================================================
--- c/src/lib/libbsp/sparc64/shared/startup/setvec.c	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
+++ c/src/lib/libbsp/sparc64/shared/startup/setvec.c	(revision 566a18061a1a0beb9546af015a73263bb89963c8)
@@ -0,0 +1,59 @@
+/*  set_vector
+ *
+ *  This routine installs an interrupt vector on the sun4v niagara
+ *
+ *  INPUT PARAMETERS:
+ *    handler - interrupt handler entry point
+ *    vector  - vector number
+ *    type    - 0 indicates raw hardware connect
+ *              1 indicates RTEMS interrupt connect
+ *
+ *  OUTPUT PARAMETERS:  NONE
+ *
+ *  RETURNS:
+ *    address of previous interrupt handler
+ *
+ *  COPYRIGHT (c) 1989-1998.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.com/license/LICENSE.
+ *
+ *  $Id$
+ */
+
+#include <bsp.h>
+
+rtems_isr_entry set_vector(                   /* returns old vector */
+  rtems_isr_entry     handler,                /* isr routine        */
+  rtems_vector_number vector,                 /* vector number      */
+  int                 type                    /* RTEMS or RAW intr  */
+)
+{
+  rtems_isr_entry previous_isr;
+  uint32_t      real_trap;
+  uint32_t      source;
+  int bit_mask;
+
+  if ( type )
+    rtems_interrupt_catch( handler, vector, &previous_isr );
+  else 
+    _CPU_ISR_install_raw_handler( vector, handler, (void *)&previous_isr );
+
+  real_trap = SPARC_REAL_TRAP_NUMBER( vector );
+
+  /* check if this is an interrupt, if so, clear and unmask interrupts for
+   * this level
+   */
+  /* Interrupts have real_trap numbers between 0x41 and 0x4F (levels 1 - 15) */
+  if (real_trap >= 0x41 && real_trap <= 0x4F) {
+    source = real_trap - 0x40;
+    bit_mask = 1<<source;
+
+    sparc64_clear_interrupt_bits(bit_mask);
+  }
+
+
+  return previous_isr;
+}
