Changeset 56535aa in rtems


Ignore:
Timestamp:
Feb 15, 2008, 7:10:09 AM (13 years ago)
Author:
Ralf Corsepius <ralf.corsepius@…>
Branches:
4.8
Children:
2928e82
Parents:
dc709596
Message:

2008-02-15 Ralf Corsépius <ralf.corsepius@…>

  • libcsupport/include/motorola/mc68230.h: Prefix defines with MC68230_ to avoid preprocessor clashes.
Location:
cpukit
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • cpukit/ChangeLog

    rdc709596 r56535aa  
     12008-02-15      Ralf Corsépius <ralf.corsepius@rtems.org>
     2
     3        * libcsupport/include/motorola/mc68230.h: Prefix defines with
     4          MC68230_ to avoid preprocessor clashes.
     5
    162008-02-06      Joel Sherrill <joel.sherrill@OARcorp.com>
    27
  • cpukit/libcsupport/include/motorola/mc68230.h

    rdc709596 r56535aa  
    2626
    2727/* Some Motorola IDP User manual defines: */
    28 #define PIT_ADDR        0x00c01003              /* base address of the PIT */
    29 #define REGOFF  0x04                            /* Difference between addresses */
    30 #define VECT    64
    31 #define H1VECT  0x00
    32 #define H2VECT  0x01
    33 #define H3VECT  0x02
    34 #define H4VECT  0x03
     28#define MC68230_PIT_ADDR        0x00c01003              /* base address of the PIT */
     29#define MC68230_REGOFF  0x04                            /* Difference between addresses */
     30#define MC68230_VECT    64
     31#define MC68230_H1VECT  0x00
     32#define MC68230_H2VECT  0x01
     33#define MC68230_H3VECT  0x02
     34#define MC68230_H4VECT  0x03
    3535
    3636/*
    3737 * mc68230 register offsets
    3838 */
    39 #define PGCR    0x00
    40 #define PSRR    1*REGOFF
    41 #define PADDR   2*REGOFF
    42 #define PBDDR   3*REGOFF
    43 #define PCDDR   4*REGOFF
    44 #define PIVR    5*REGOFF
    45 #define PACR    6*REGOFF
    46 #define PBCR    7*REGOFF
    47 #define PADR    8*REGOFF
    48 #define PBDR    9*REGOFF
    49 #define PAAR    10*REGOFF
    50 #define PBAR    11*REGOFF
    51 #define PCDR    12*REGOFF
    52 #define PITSR   13*REGOFF
    53 #define TCR             16*REGOFF
    54 #define TIVR    17*REGOFF
    55 #define CPRH    19*REGOFF
    56 #define CPRM    20*REGOFF
    57 #define CPRL    21*REGOFF
    58 #define CNTRH   23*REGOFF
    59 #define CNTRM   24*REGOFF
    60 #define CNTRL   25*REGOFF
    61 #define TSR             26*REGOFF
     39#define MC68230_PGCR    0x00
     40#define MC68230_PSRR    1*MC68230_REGOFF
     41#define MC68230_PADDR   2*MC68230_REGOFF
     42#define MC68230_PBDDR   3*MC68230_REGOFF
     43#define MC68230_PCDDR   4*MC68230_REGOFF
     44#define MC68230_PIVR    5*MC68230_REGOFF
     45#define MC68230_PACR    6*MC68230_REGOFF
     46#define MC68230_PBCR    7*MC68230_REGOFF
     47#define MC68230_PADR    8*MC68230_REGOFF
     48#define MC68230_PBDR    9*MC68230_REGOFF
     49#define MC68230_PAAR    10*MC68230_REGOFF
     50#define MC68230_PBAR    11*MC68230_REGOFF
     51#define MC68230_PCDR    12*MC68230_REGOFF
     52#define MC68230_PITSR   13*MC68230_REGOFF
     53#define MC68230_TCR     16*MC68230_REGOFF
     54#define MC68230_TIVR    17*MC68230_REGOFF
     55#define MC68230_CPRH    19*MC68230_REGOFF
     56#define MC68230_CPRM    20*MC68230_REGOFF
     57#define MC68230_CPRL    21*MC68230_REGOFF
     58#define MC68230_CNTRH   23*MC68230_REGOFF
     59#define MC68230_CNTRM   24*MC68230_REGOFF
     60#define MC68230_CNTRL   25*MC68230_REGOFF
     61#define MC68230_TSR     26*MC68230_REGOFF
    6262
    6363/* Some RTEMS style defines: */
    64 #ifndef VOL8
    65 #define VOL8( ptr )   ((volatile uint8_t   *)(ptr))
     64#ifndef MC68230_VOL8
     65#define MC68230_VOL8( ptr )   ((volatile uint8_t   *)(ptr))
    6666#endif
    6767
    6868#define MC68230_WRITE( reg, data ) \
    69    *(VOL8(PIT_ADDR+reg)) = (data)
     69   *(MC68230_VOL8(MC68230_PIT_ADDR+reg)) = (data)
    7070
    7171#define MC68230_READ( reg, data ) \
    72    (data) = *(VOL8(PIT_ADDR+reg))
     72   (data) = *(MC68230_VOL8(MC68230_PIT_ADDR+reg))
    7373
    7474#endif
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