Changeset 561f53b in rtems


Ignore:
Timestamp:
Nov 22, 2004, 10:30:59 PM (16 years ago)
Author:
Jennifer Averett <Jennifer.Averett@…>
Children:
f778d4c5
Parents:
24fced7
Message:

2004-11-22 Jennifer Averett <jennifer@…>

PR 581/bsps

  • Makefile.am, bsp_specs, configure.ac, clock/Makefile.am, include/bsp.h, start/Makefile.am, start/start.S, startup/Makefile.am, startup/bspstart.c, startup/linkcmds, vectors/Makefile.am, vectors/vectors.S, wrapup/Makefile.am: Convert PSIM to new exception model.
  • irq/Makefile.am, irq/irq.c, irq/irq.h, irq/irq_asm.S, irq/irq_init.c: New files.
  • clock/clock.c: Removed.
Location:
c/src/lib/libbsp/powerpc/psim
Files:
1 added
1 deleted
16 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/powerpc/psim/ChangeLog

    r24fced7 r561f53b  
     12004-11-22      Jennifer Averett <jennifer@OARcorp.com>
     2
     3        PR 581/bsps
     4        * Makefile.am, bsp_specs, configure.ac, clock/Makefile.am,
     5        include/bsp.h, start/Makefile.am, start/start.S, startup/Makefile.am,
     6        startup/bspstart.c, startup/linkcmds, vectors/Makefile.am,
     7        vectors/vectors.S, wrapup/Makefile.am: Convert PSIM to new exception
     8        model.
     9        * irq/Makefile.am, irq/irq.c, irq/irq.h, irq/irq_asm.S,
     10        irq/irq_init.c: New files.
     11        * clock/clock.c: Removed.
     12
    1132003-12-16      Ralf Corsepius <corsepiu@faw.uni-ulm.de>
    214
  • c/src/lib/libbsp/powerpc/psim/Makefile.am

    r24fced7 r561f53b  
    77# wrapup is the one that actually builds and installs the library
    88#  from the individual .rel files built in other directories
    9 SUBDIRS = include start clock console startup shmsupp timer vectors \
     9SUBDIRS = include start irq clock console startup shmsupp timer vectors\
    1010    @exceptions@ wrapup \
    1111    tools
  • c/src/lib/libbsp/powerpc/psim/bsp_specs

    r24fced7 r561f53b  
    1111
    1212*startfile:
    13 %{!qrtems: %(old_startfile)} %{!nostdlib: %{qrtems:  ecrti%O%s \
     13%{!qrtems: %(old_startfile)} %{!nostdlib: %{qrtems:  ecrti%O%s rtems_crti%O%s  crtbegin.o%s  \
    1414%{!qrtems_debug: start.o%s} \
    1515%{qrtems_debug: start_g.o%s}}}
    16 
    17 *endfile:
    18 %{!qrtems: %(old_endfile)} %{qrtems: ecrtn%O%s}
    1916
    2017*link:
    2118%{!qrtems: %(old_link)} %{qrtems: -Qy -dp -Bstatic -e _start -u __vectors}
    2219
     20*endfile:
     21%{!qrtems: %(old_endfile)} %{qrtems: crtend.o%s ecrtn.o%s}
     22
  • c/src/lib/libbsp/powerpc/psim/clock/Makefile.am

    r24fced7 r561f53b  
    44
    55
    6 PGM = $(ARCH)/clock.rel
     6VPATH = @srcdir@:@srcdir@/../../shared/clock
    77
    8 C_FILES = clock.c
     8C_FILES = p_clock.c
    99C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.$(OBJEXT))
    1010
     
    1818#
    1919
    20 $(PGM): $(OBJS)
    21         $(make-rel)
    22 
    2320# the .rel file built here will be put into libbsp.a by ../wrapup/Makefile
    2421
    25 all-local: $(ARCH) $(OBJS) $(PGM)
    26 
    27 .PRECIOUS: $(PGM)
    28 
    29 EXTRA_DIST = clock.c
     22all-local: $(ARCH) $(OBJS)
    3023
    3124include $(top_srcdir)/../../../../../../automake/local.am
  • c/src/lib/libbsp/powerpc/psim/configure.ac

    r24fced7 r561f53b  
    3939console/Makefile
    4040include/Makefile
     41irq/Makefile
    4142shmsupp/Makefile
    4243start/Makefile
     
    4647wrapup/Makefile])
    4748
    48 RTEMS_PPC_EXCEPTIONS([old])
     49RTEMS_PPC_EXCEPTIONS([new])
    4950
    5051AC_OUTPUT
  • c/src/lib/libbsp/powerpc/psim/include/bsp.h

    r24fced7 r561f53b  
    5555#include <rtems.h>
    5656#include <console.h>
     57#include <libcpu/io.h>
    5758#include <clockdrv.h>
    58 #include <console.h>
    5959#include <iosupp.h>
    60 
    61 /*
    62  *  Define the time limits for RTEMS Test Suite test durations.
    63  *  Long test and short test duration limits are provided.  These
    64  *  values are in seconds and need to be converted to ticks for the
    65  *  application.
    66  *
    67  */
    68 
    69 #define MAX_LONG_TEST_DURATION       300 /* 5 minutes = 300 seconds */
    70 #define MAX_SHORT_TEST_DURATION      3   /* 3 seconds */
    71 
     60#include <bsp/vectors.h>
    7261
    7362/*
    7463 *  Stuff for Time Test 27
    7564 */
     65#if defined(RTEMS_TM27)
     66
     67#include <bsp/irq.h>
    7668
    7769#define MUST_WAIT_FOR_INTERRUPT 1
    7870
    79 #define Install_tm27_vector( _handler ) \
    80   set_vector( (_handler), PPC_IRQ_DECREMENTER, 1 )
     71/* #define Install_tm27_vector( _handler ) \
     72   set_vector( (_handler), PPC_IRQ_DECREMENTER, 1 ) */
     73
     74void nullFunc() {}
     75static rtems_irq_connect_data clockIrqData = {BSP_DECREMENTER,
     76                                              0,
     77                                              (rtems_irq_enable)nullFunc,
     78                                              (rtems_irq_disable)nullFunc,
     79                                              (rtems_irq_is_enabled) nullFunc};
     80
     81void Install_tm27_vector(void (*_handler)())
     82{
     83  clockIrqData.hdl = _handler;
     84  if (!BSP_install_rtems_irq_handler (&clockIrqData)) {
     85        printk("Error installing clock interrupt handler!\n");
     86        rtems_fatal_error_occurred(1);
     87  }
     88}
     89
    8190
    8291#define Cause_tm27_intr()  \
     
    101110    asm volatile( "mtmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
    102111  } while (0)
     112#endif
    103113
    104114/* Constants */
     
    121131 */
    122132
    123 extern int   RAM_START;
    124133extern int   RAM_END;
    125 extern int   RAM_SIZE;
    126 
    127 extern int   PROM_START;
    128 extern int   PROM_END;
    129 extern int   PROM_SIZE;
    130 
    131 extern int   CLOCK_SPEED;
    132 
    133134extern int   end;        /* last address in the program */
    134135
     136
     137#define BSP_Convert_decrementer( _value ) ( (unsigned long long) _value )
     138
    135139/* functions */
    136 
    137 void bsp_start( void );
    138 
    139 void bsp_cleanup( void );
    140140
    141141rtems_isr_entry set_vector(                    /* returns old vector */
     
    145145);
    146146
    147 void DEBUG_puts( char *string );
    148 
    149 void BSP_fatal_return( void );
    150 
    151 void bsp_spurious_initialize( void );
     147void bsp_cleanup( void );
    152148
    153149extern rtems_configuration_table BSP_Configuration;     /* owned by BSP */
    154 
    155150extern rtems_cpu_table           Cpu_table;             /* owned by BSP */
    156 
    157 extern rtems_unsigned32          bsp_isr_level;
    158151
    159152#endif /* ASM */
  • c/src/lib/libbsp/powerpc/psim/irq/irq.c

    r24fced7 r561f53b  
    8686 */
    8787 
     88/*
     89 * Caution : this function assumes the variable "internal_config"
     90 * is already set and that the tables it contains are still valid
     91 * and accessible.
     92 */
     93static void compute_i8259_masks_from_prio ()
     94{
     95  int i;
     96  int j;
     97  /*
     98   * Always mask at least current interrupt to prevent re-entrance
     99   */
     100  for (i=BSP_ISA_IRQ_LOWEST_OFFSET; i < BSP_ISA_IRQ_LOWEST_OFFSET + BSP_ISA_IRQ_NUMBER; i++) {
     101    * ((unsigned short*) &irq_mask_or_tbl[i]) = (1 << i);
     102    for (j = BSP_ISA_IRQ_LOWEST_OFFSET; j < BSP_ISA_IRQ_LOWEST_OFFSET + BSP_ISA_IRQ_NUMBER; j++) {
     103      /*
     104       * Mask interrupts at i8259 level that have a lower priority
     105       */
     106      if (internal_config->irqPrioTbl [i] > internal_config->irqPrioTbl [j]) {
     107        * ((unsigned short*) &irq_mask_or_tbl[i]) |= (1 << j);
     108      }
     109    }
     110  }
     111}
     112
    88113/*
    89114 * This function check that the value given for the irq line
  • c/src/lib/libbsp/powerpc/psim/irq/irq_asm.S

    r24fced7 r561f53b  
    1717 */
    1818       
    19 #include <rtems/asm.h>
     19#include <asm.h>
    2020#include <rtems/score/cpu.h>
    2121#include <bsp/vectors.h>
  • c/src/lib/libbsp/powerpc/psim/start/Makefile.am

    r24fced7 r561f53b  
    33##
    44
    5 S_FILES = start.S
     5VPATH = @srcdir@:@srcdir@/../../shared/start
     6
     7S_FILES = start.S rtems_crti.S
    68S_O_FILES = $(S_FILES:%.S=$(ARCH)/%.$(OBJEXT))
    79
     
    1416# (OPTIONAL) Add local stuff here using +=
    1517#
    16 
    17 install-data-local: $(PROJECT_RELEASE)/lib/start$(LIB_VARIANT).$(OBJEXT)
    18         @$(mkinstalldirs) $(DESTDIR)$(bsplibdir)
    19         $(INSTALL_DATA) $< $(DESTDIR)$(bsplibdir)
     18bsplib_DATA =  $(PROJECT_RELEASE)/lib/start$(LIB_VARIANT).$(OBJEXT)
     19bsplib_DATA += $(PROJECT_RELEASE)/lib/rtems_crti.$(OBJEXT)
    2020
    2121$(PROJECT_RELEASE)/lib/start$(LIB_VARIANT).$(OBJEXT): $(ARCH)/start.$(OBJEXT)
    2222        $(INSTALL_DATA) $< $@
    2323
     24$(PROJECT_RELEASE)/lib/rtems_crti.$(OBJEXT): $(ARCH)/rtems_crti.$(OBJEXT)
     25        $(INSTALL_DATA) $< $@
     26
    2427TMPINSTALL_FILES += $(PROJECT_RELEASE)/lib/start$(LIB_VARIANT).$(OBJEXT)
     28TMPINSTALL_FILES += $(PROJECT_RELEASE)/lib/rtems_crti.$(OBJEXT)
    2529
    26 all-local: $(ARCH) $(OBJS) $(ARCH)/start.$(OBJEXT) $(TMPINSTALL_FILES)
     30all-local: $(ARCH) $(OBJS) $(ARCH)/start.$(OBJEXT) $(ARCH)/rtems_crti.$(OBJEXT) $(TMPINSTALL_FILES)
    2731
    28 .PRECIOUS: $(ARCH)/start.$(OBJEXT)
     32$(OBJS): $(ARCH)
    2933
    30 EXTRA_DIST = start.S
     34.PRECIOUS: $(ARCH)/start.$(OBJEXT) $(ARCH)/rtems_crti.$(OBJEXT)
    3135
    3236include $(top_srcdir)/../../../../../../automake/local.am
  • c/src/lib/libbsp/powerpc/psim/start/start.S

    r24fced7 r561f53b  
    1818 */
    1919
     20#include <asm.h>
     21#include <rtems/score/cpu.h>
     22#include <libcpu/io.h>
    2023#include "ppc-asm.h"
    2124
     
    5457        .long .LCTOC1-.Laddr
    5558
     59        .globl  __rtems_entry_point
     60        .type   __rtems_entry_point,@function
     61__rtems_entry_point:
     62#if 1
    5663        .globl  _start
    5764        .type   _start,@function
    5865_start:
     66#endif
    5967        bl      .Laddr                  /* get current address */
    6068.Laddr:
     
    6573        subf    r4,r4,r5                /* calculate difference between where linked and current */
    6674
     75        bl      __eabi  /* setup EABI and SYSV environment */
    6776        /* clear bss */
    6877        lwz     r6,.Lbss_start(r5)      /* calculate beginning of the BSS */
     
    101110        li      r4, 0                   /* argv */
    102111        li      r3, 0                   /* argc */
     112
    103113        /* Let her rip */
    104114        bl      FUNC_NAME(boot_card)
  • c/src/lib/libbsp/powerpc/psim/startup/Makefile.am

    r24fced7 r561f53b  
    99
    1010C_FILES = bspclean.c bsplibc.c bsppost.c bspstart.c bootcard.c main.c sbrk.c \
    11     setvec.c gnatinstallhandler.c
     11    gnatinstallhandler.c
    1212C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.$(OBJEXT))
    1313
     
    3939.PRECIOUS: $(PGM)
    4040
    41 EXTRA_DIST = bspclean.c bspstart.c device-tree linkcmds setvec.c
     41EXTRA_DIST = bspclean.c bspstart.c device-tree linkcmds
    4242
    4343include $(top_srcdir)/../../../../../../automake/local.am
  • c/src/lib/libbsp/powerpc/psim/startup/bspstart.c

    r24fced7 r561f53b  
    1717#include <string.h>
    1818#include <fcntl.h>
    19 
    2019#include <bsp.h>
     20#include <bsp/irq.h>
    2121#include <rtems/libio.h>
    2222#include <rtems/libcsupport.h>
    2323#include <rtems/bspIo.h>
     24#include <libcpu/cpuIdent.h>
     25#include <libcpu/spr.h>
     26
     27SPR_RW(SPRG0)
     28SPR_RW(SPRG1)
     29
     30
     31extern unsigned long __rtems_end[];
     32
     33void  initialize_exceptions(void);
     34
     35/*  On psim, each click of the decrementer register corresponds
     36 *  to 1 instruction.  By setting this to 100, we are indicating
     37 *  that we are assuming it can execute 100 instructions per
     38 *  microsecond.  This corresponds to sustaining 1 instruction
     39 *  per cycle at 100 Mhz.  Whether this is a good guess or not
     40 *  is anyone's guess.
     41 */
     42
     43extern int PSIM_INSTRUCTIONS_PER_MICROSECOND;
    2444
    2545/*
     
    2747 *  some changes.
    2848 */
    29  
     49
    3050extern rtems_configuration_table  Configuration;
    3151rtems_configuration_table         BSP_Configuration;
    32 
    3352rtems_cpu_table   Cpu_table;
    34 rtems_unsigned32  bsp_isr_level;
    3553
    3654/*
     
    3957
    4058#if 0
    41 extern rtems_unsigned32  rdb_start;
     59extern uint32_t          rdb_start;
    4260#endif
    4361
    4462/*
     63 * PCI Bus Frequency
     64 */
     65 unsigned int BSP_bus_frequency;
     66 /*
     67  *  * Time base divisior (how many tick for 1 second).
     68  *   */
     69 unsigned int BSP_time_base_divisor;
     70
     71
     72
     73/*
    4574 *  Use the shared implementations of the following routines
    4675 */
    47  
     76
    4877void bsp_postdriver_hook(void);
    49 void bsp_libc_init( void *, unsigned32, int );
     78void bsp_libc_init( void *, uint32_t, int );
     79
     80/*
     81 * system init stack and soft ir stack size
     82 */
     83#define INIT_STACK_SIZE 0x1000
     84#define INTR_STACK_SIZE CONFIGURE_INTERRUPT_STACK_MEMORY
     85
     86
     87void BSP_panic(char *s)
     88{
     89    printk("%s PANIC %s\n",_RTEMS_version, s);
     90      __asm__ __volatile ("sc");
     91}
     92
     93void _BSP_Fatal_error(unsigned int v)
     94{
     95    printk("%s PANIC ERROR %x\n",_RTEMS_version, v);
     96      __asm__ __volatile ("sc");
     97}
    5098
    5199/*
     
    59107{
    60108  extern int end;
    61   rtems_unsigned32 heap_start;
    62   rtems_unsigned32 heap_size;
    63 
    64   heap_start = (rtems_unsigned32) &end;
     109  uint32_t        heap_start;
     110  uint32_t        heap_size;
     111
     112  heap_start = (uint32_t) &end;
    65113  if (heap_start & (CPU_ALIGNMENT-1))
    66114    heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1);
     
    85133void bsp_start( void )
    86134{
    87   unsigned char *work_space_start;
    88 
    89 #if 0
    90   /*
    91    * Set MSR to show vectors at 0 XXX
    92    */
    93   _CPU_MSR_Value( msr_value );
    94   msr_value &= ~PPC_MSR_EP;
    95   _CPU_MSR_SET( msr_value );
    96 #endif
     135  unsigned char     *work_space_start;
     136  register uint32_t  intrStack;
     137  register uint32_t *intrStackPtr;
     138
     139  /*
     140   * Note we can not get CPU identification dynamically, so force current_ppc_cpu.
     141   */
     142  current_ppc_cpu = PPC_PSIM;
    97143
    98144  /*
     
    119165  Cpu_table.interrupt_stack_size = CONFIGURE_INTERRUPT_STACK_MEMORY;
    120166
    121   /*
    122    *  The monitor likes the exception table to be at 0x0.
    123    */
    124 
    125   Cpu_table.exceptions_in_RAM = TRUE;
     167  BSP_bus_frequency        = (unsigned int)&PSIM_INSTRUCTIONS_PER_MICROSECOND;
     168  BSP_time_base_divisor    = 1;
     169
     170  /*
     171   *  The simulator likes the exception table to be at 0xfff00000.
     172   */
     173
     174  Cpu_table.exceptions_in_RAM = FALSE;
    126175
    127176  BSP_Configuration.work_space_size += 1024;
    128177
    129   work_space_start = 
     178  work_space_start =
    130179    (unsigned char *)&RAM_END - BSP_Configuration.work_space_size;
    131180
     
    137186  BSP_Configuration.work_space_start = work_space_start;
    138187
    139 }
     188  /*
     189   * Initialize the interrupt related settings
     190   * SPRG1 = software managed IRQ stack
     191   *
     192   * This could be done latter (e.g in IRQ_INIT) but it helps to understand
     193   * some settings below...
     194   */
     195  intrStack = ((uint32_t) __rtems_end) +
     196          INIT_STACK_SIZE + INTR_STACK_SIZE - CPU_MINIMUM_STACK_FRAME_SIZE;
     197
     198  /* make sure it's properly aligned */
     199  intrStack &= ~(CPU_STACK_ALIGNMENT-1);
     200
     201  /* tag the bottom (T. Straumann 6/36/2001 <strauman@slac.stanford.edu>) */
     202  intrStackPtr = (uint32_t*) intrStack;
     203  *intrStackPtr = 0;
     204
     205  _write_SPRG1(intrStack);
     206
     207  /* signal them that we have fixed PR288 - eventually, this should go away */
     208  _write_SPRG0(PPC_BSP_HAS_FIXED_PR288);
     209
     210  /*
     211   * Initialize default raw exception hanlders. See vectors/vectors_init.c
     212   */
     213  initialize_exceptions();
     214
     215  /*
     216   * Initalize RTEMS IRQ system
     217   */
     218  BSP_rtems_irq_mng_init(0);
     219
     220}
  • c/src/lib/libbsp/powerpc/psim/startup/linkcmds

    r24fced7 r561f53b  
    1717/* Do we need any of these for elf?
    1818   __DYNAMIC = 0;    */
    19 PROVIDE (PSIM_INSTRUCTIONS_PER_MICROSECOND = 100);
     19PROVIDE (PSIM_INSTRUCTIONS_PER_MICROSECOND = 10000);   /* 100); */
    2020PROVIDE (CPU_PPC_CLICKS_PER_MS = 16667);
    2121MEMORY
     
    2727SECTIONS
    2828{
    29   .vectors 0xFFF00100 :
    30   {
    31     *(.vectors)
    32   } >EPROM
     29  .entry_point_section :
     30  {
     31        *(.entry_point_section)
     32  } > EPROM
    3333
    3434  /* Read-only sections, merged into text segment: */
     
    7575    *(.gnu.warning)
    7676  } >RAM
    77   .init           : { _init = .; __init = .; *(.init)           } >RAM
    78   .fini           : { _fini = .; __fini = .; *(.fini)           } >RAM
     77  .init           :
     78  {
     79    KEEP (*(.init))
     80  } >RAM =0
     81  .fini           :
     82  {
     83    _fini = .;
     84    KEEP (*(.fini))
     85  } >RAM =0
    7986  .rodata         : { *(.rodata*) *(.gnu.linkonce.r*) } >RAM
    8087  .rodata1        : { *(.rodata1)       } >RAM
     
    144151  PROVIDE (__GOT_END__ = .);
    145152
     153  .jcr            : { KEEP (*(.jcr)) } > RAM
     154
    146155  /* We want the small data sections together, so single-instruction offsets
    147156     can access them all, and initialized data all before uninitialized, so
     
    171180  } >RAM
    172181  . =  ALIGN(8) + 0x8000;
     182  __rtems_end = . ;
    173183  PROVIDE(__stack = .);
    174184  PROVIDE(_end = .);
  • c/src/lib/libbsp/powerpc/psim/vectors/Makefile.am

    r24fced7 r561f53b  
    44
    55
    6 PGM = $(ARCH)/vectors.rel
     6VPATH = @srcdir@:@srcdir@/../console:@srcdir@/../../shared/vectors
    77
    8 S_FILES = align_h.S vectors.S
     8C_FILES = vectors_init.c
     9C_O_FILES = $(C_FILES:%.c=$(ARCH)/%.$(OBJEXT))
     10
     11H_FILES = ../../shared/vectors/vectors.h
     12
     13S_FILES = vectors.S
    914S_O_FILES = $(S_FILES:%.S=$(ARCH)/%.$(OBJEXT))
    1015
    11 OBJS = $(S_O_FILES)
     16OBJS = $(S_O_FILES) $(C_O_FILES)
    1217
    1318include $(top_srcdir)/../../../../../../automake/compile.am
     
    2126        $(make-rel)
    2227
    23 # the .rel file built here will be put into libbsp.a by ../wrapup/Makefile
     28include_bspdir = $(includedir)/bsp
     29include_bsp_HEADERS = ../../shared/vectors/vectors.h
    2430
    25 all-local: $(ARCH) $(OBJS) $(PGM)
     31$(PROJECT_INCLUDE)/bsp:
     32        $(mkinstalldirs) $@
    2633
    27 .PRECIOUS: $(PGM)
     34$(PROJECT_INCLUDE)/bsp/vectors.h: ../../shared/vectors/vectors.h
     35        $(INSTALL_DATA) $< $@
    2836
    29 EXTRA_DIST = README align_h.S vectors.S
     37TMPINSTALL_FILES += $(PROJECT_INCLUDE)
     38TMPINSTALL_FILES += $(PROJECT_INCLUDE)/bsp
     39TMPINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
    3040
     41all-local: $(ARCH) $(TMPINSTALL_FILES) $(OBJS)
     42
     43include $(top_srcdir)/../../../../../../automake/force-preinstall.am
    3144include $(top_srcdir)/../../../../../../automake/local.am
  • c/src/lib/libbsp/powerpc/psim/vectors/vectors.S

    r24fced7 r561f53b  
    1 /*  vectors.s   1.1 - 95/12/04
     1/*
     2 * (c) 1999, Eric Valette valette@crf.canon.fr
     3 *
    24 *
    35 *  This file contains the assembly code for the PowerPC
    4  *  interrupt vectors for RTEMS.
     6 *  exception veneers for RTEMS.
    57 *
    6  *  COPYRIGHT (c) 1989-1999.
    7  *  On-Line Applications Research Corporation (OAR).
    8  *
    9  *  The license and distribution terms for this file may be
    10  *  found in found in the file LICENSE in this distribution or at
    11  *  http://www.rtems.com/license/LICENSE.
    12  *
    13  *  $Id$
     8 * vectors.S,v 1.3.4.1 2003/02/20 21:48:25 joel Exp
    149 */
     10       
    1511
     12
     13#include <asm.h>
     14#include <rtems/score/cpu.h>
     15#include <bsp/vectors.h>
     16       
     17
     18#define SYNC \
     19        sync; \
     20        isync
     21       
     22        PUBLIC_VAR (__rtems_start)
     23        .section .entry_point_section,"awx",@progbits
    1624/*
    17  *  The issue with this file is getting it loaded at the right place.
    18  *  The first vector MUST be at address 0x????0100.
    19  *  How this is achieved is dependant on the tool chain.
    20  *
    21  *  However the basic mechanism for ELF assemblers is to create a
    22  *  section called ".vectors", which will be loaded to an address
    23  *  between 0x????0000 and 0x????0100 (inclusive) via a link script.
    24  *
    25  *  The basic mechanism for XCOFF assemblers is to place it in the
    26  *  normal text section, and arrange for this file to be located
    27  *  at an appropriate position on the linker command line.
    28  *
    29  *  The variable 'PPC_VECTOR_FILE_BASE' must be defined to be the
    30  *  offset from 0x????0000 to the first location in the file.  This
    31  *  will usually be 0x0000 or 0x0100.
     25 * Entry point information used by bootloader code
    3226 */
     27SYM (__rtems_start):           
     28        .long   __rtems_entry_point
    3329
    34 #include <bsp.h>
    35 #include "asm.h"
     30        /*
     31         * end of special Entry point section
     32         */     
     33        .text
     34        .p2align 5     
     35               
     36PUBLIC_VAR(default_exception_vector_code_prolog)
     37SYM (default_exception_vector_code_prolog):
     38        /*
     39         * let room for exception frame
     40         */
     41        stwu    r1, - (EXCEPTION_FRAME_END)(r1)
     42        stw     r3, GPR3_OFFSET(r1)
     43        /* R2 should never change (EABI: pointer to .sdata2) - we
     44     * save it nevertheless..
     45         */
     46        stw     r2, GPR2_OFFSET(r1)
     47        mflr    r3
     48        stw     r3, EXC_LR_OFFSET(r1)
     49        bl      0f
     500:      /*
     51         * r3 = exception vector entry point
     52         * (256 * vector number) + few instructions
     53         */
     54        mflr    r3
     55        /*
     56         * r3 = r3 >> 8 = vector
     57         */
     58        srwi    r3,r3,8
     59        ba      push_normalized_frame
     60       
     61        PUBLIC_VAR (default_exception_vector_code_prolog_size)
     62       
     63        default_exception_vector_code_prolog_size= . - default_exception_vector_code_prolog
     64       
     65        .p2align 5
     66PUBLIC_VAR (push_normalized_frame)     
     67SYM (push_normalized_frame):
     68        stw     r3, EXCEPTION_NUMBER_OFFSET(r1)
     69        stw     r0, GPR0_OFFSET(r1)
     70        mfsrr0  r3
     71        stw     r3, SRR0_FRAME_OFFSET(r1)
     72        mfsrr1  r3
     73        stw     r3, SRR1_FRAME_OFFSET(r1)
     74        /*
     75         * Save general purpose registers
     76         * Already saved in prolog : R1, R2, R3, LR.
     77         * Saved a few line above  : R0
     78         *
     79         * Manual says that "stmw" instruction may be slower than
     80         * series of individual "stw" but who cares about performance
     81         * for the DEFAULT exception handler?
     82         */
     83        stmw    r4, GPR4_OFFSET(r1)     /* save R4->R31 */
    3684
    37 #ifndef PPC_VECTOR_FILE_BASE
    38 #error "PPC_VECTOR_FILE_BASE is not defined."
    39 #endif
     85        mfcr    r31
     86        stw     r31,  EXC_CR_OFFSET(r1)
     87        mfctr   r30
     88        stw     r30,  EXC_CTR_OFFSET(r1)
     89        mfxer   r28
     90        stw     r28,  EXC_XER_OFFSET(r1)
     91        mfmsr   r28
     92        stw     r28,  EXC_MSR_OFFSET(r1)
     93        mfdar   r28
     94        stw     r28,  EXC_DAR_OFFSET(r1)
     95        /*
     96         * compute SP at exception entry
     97         */
     98        addi    r3, r1, EXCEPTION_FRAME_END
     99        /*
     100         * store it at the right place
     101         */
     102        stw     r3, GPR1_OFFSET(r1)
     103        /*
     104         * Enable data and instruction address translation, exception nesting
     105         */
     106        mfmsr   r3
     107        ori     r3,r3, MSR_RI /* | MSR_IR | MSR_DR */
     108        mtmsr   r3
     109        SYNC
     110       
     111        /*
     112         * Call C exception handler
     113         */
     114        /*
     115         * store the execption frame address in r3 (first param)
     116         */
     117        addi    r3, r1, 0x8
     118        /*
     119         * globalExceptHdl(r3)
     120         */
     121        addis   r4, 0, globalExceptHdl@ha
     122        lwz     r5, globalExceptHdl@l(r4)
     123        mtlr    r5
     124        blrl
     125        /*
     126         * Restore registers status
     127         */
     128        lwz     r31,  EXC_CR_OFFSET(r1)
     129        mtcr    r31
     130        lwz     r30,  EXC_CTR_OFFSET(r1)
     131        mtctr   r30
     132        lwz     r29,  EXC_LR_OFFSET(r1)
     133        mtlr    r29
     134        lwz     r28,  EXC_XER_OFFSET(r1)
     135        mtxer   r28
    40136
    41         /* Where this file will be loaded */
    42         .set    file_base, PPC_VECTOR_FILE_BASE
     137        lmw     r4, GPR4_OFFSET(r1)
     138        lwz     r2, GPR2_OFFSET(r1)
     139        lwz     r0, GPR0_OFFSET(r1)
    43140
    44         /* Offset to store reg 0 */
    45 
    46         .set    IP_LINK, 0
    47 #if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
    48         .set    IP_0, (IP_LINK + 56)
    49 #else
    50         .set    IP_0, (IP_LINK + 8)
    51 #endif
    52         .set    IP_2, (IP_0 + 4)
    53 
    54         .set    IP_3, (IP_2 + 4)
    55         .set    IP_4, (IP_3 + 4)
    56         .set    IP_5, (IP_4 + 4)
    57         .set    IP_6, (IP_5 + 4)
     141        /*
     142         * Disable data and instruction translation. Make path non recoverable...
     143         */
     144        mfmsr   r3
     145        xori    r3, r3, MSR_RI | MSR_IR | MSR_DR
     146        mtmsr   r3
     147        SYNC
     148        /*
     149         * Restore rfi related settings
     150         */
     151                 
     152        lwz     r3, SRR1_FRAME_OFFSET(r1)
     153        mtsrr1  r3
     154        lwz     r3, SRR0_FRAME_OFFSET(r1)
     155        mtsrr0  r3
    58156       
    59         .set    IP_7, (IP_6 + 4)
    60         .set    IP_8, (IP_7 + 4)
    61         .set    IP_9, (IP_8 + 4)
    62         .set    IP_10, (IP_9 + 4)
    63        
    64         .set    IP_11, (IP_10 + 4)
    65         .set    IP_12, (IP_11 + 4)
    66         .set    IP_13, (IP_12 + 4)
    67         .set    IP_28, (IP_13 + 4)
    68        
    69         .set    IP_29, (IP_28 + 4)
    70         .set    IP_30, (IP_29 + 4)
    71         .set    IP_31, (IP_30 + 4)
    72         .set    IP_CR, (IP_31 + 4)
    73        
    74         .set    IP_CTR, (IP_CR + 4)
    75         .set    IP_XER, (IP_CTR + 4)
    76         .set    IP_LR, (IP_XER + 4)
    77         .set    IP_PC, (IP_LR + 4)
    78        
    79         .set    IP_MSR, (IP_PC + 4)
    80        
    81         .set    IP_END, (IP_MSR + 16)
    82 
    83         /* Vector offsets                        */
    84         .set    begin_vector,0xFFF00000
    85         .set    crit_vector,0xFFF00100
    86         .set    mach_vector,0xFFF00200
    87         .set    prot_vector,0xFFF00300
    88         .set    ext_vector,0xFFF00500
    89         .set    align_vector,0xFFF00600
    90         .set    prog_vector,0xFFF00700
    91         .set    dec_vector,0xFFF00900
    92         .set    sys_vector,0xFFF00C00
    93         .set    pit_vector,0xFFF01000
    94         .set    fit_vector,0xFFF01010
    95         .set    wadt_vector,0xFFF01020
    96         .set    debug_vector,0xFFF02000
    97 
    98 /* Go to the right section */
    99 #if PPC_ASM == PPC_ASM_ELF
    100         .section .vectors,"awx",@progbits
    101 #elif PPC_ASM == PPC_ASM_XCOFF
    102         .csect  .text[PR]
    103 #endif
    104 
    105         PUBLIC_VAR (__vectors)
    106 SYM (__vectors):
    107        
    108 /* Decrementer interrupt */
    109         .org    dec_vector - file_base
    110 #if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27)
    111 #if (PPC_HAS_FPU)
    112         stwu    r1, -(20*4 + 18*8 + IP_END)(r1)
    113 #else
    114         stwu    r1, -(20*4 + IP_END)(r1)
    115 #endif
    116 #else
    117         stwu    r1, -(IP_END)(r1)
    118 #endif
    119         stw     r0, IP_0(r1)
    120 
    121         li      r0, PPC_IRQ_DECREMENTER
    122         b       PROC (_ISR_Handler)
    123 
     157        lwz     r3, GPR3_OFFSET(r1)
     158        addi    r1,r1, EXCEPTION_FRAME_END
     159        SYNC
     160        rfi
  • c/src/lib/libbsp/powerpc/psim/wrapup/Makefile.am

    r24fced7 r561f53b  
    33##
    44
     5BSP_PIECES = startup clock console irq vectors
     6
     7# bummer; have to use $foreach since % pattern subst rules only replace 1x
     8OBJS = $(foreach piece, $(BSP_PIECES), ../$(piece)/$(ARCH)/*.$(OBJEXT)) \
     9    $(wildcard ../../../../libcpu/$(RTEMS_CPU)/shared/*/$(ARCH)/*.$(OBJEXT)) \
     10    $(wildcard ../../../../libcpu/$(RTEMS_CPU)/mpc6xx/*/$(ARCH)/*.$(OBJEXT)) \
     11    ../@exceptions@/$(ARCH)/rtems-cpu.rel \
     12    $(wildcard ../../../../libcpu/$(RTEMS_CPU)/$(RTEMS_CPU_MODEL)/*/$(ARCH)/*.$(OBJEXT))
     13LIB = $(ARCH)/libbsp.a
     14
    515include $(top_srcdir)/../../../../../../automake/compile.am
    616include $(top_srcdir)/../../../../../../automake/lib.am
    7 
    8 if HAS_MP
    9 GENERIC_MP_REL_PIECES = shmdr
    10 endif
    11 GENERIC_PIECES = $(GENERIC_MP_REL_PIECES)
    12 
    13 if HAS_MP
    14 BSP_MP_O_PIECES = shmsupp
    15 endif
    16 BSP_PIECES = startup clock console timer vectors $(BSP_MP_O_PIECES)
    17 
    18 # bummer; have to use $foreach since % pattern subst rules only replace 1x
    19 OBJS = $(foreach piece, $(BSP_PIECES), $(wildcard ../$(piece)/$(ARCH)/*.$(OBJEXT))) \
    20     ../@exceptions@/$(ARCH)/rtems-cpu.rel \
    21     $(foreach piece, $(GENERIC_PIECES), ../../../$(piece)/$(ARCH)/$(piece).rel)
    22 LIB = $(ARCH)/libbsp.a
    2317
    2418#
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