Changeset 55a685b in rtems
- Timestamp:
- 10/25/07 16:17:56 (15 years ago)
- Branches:
- 4.10, 4.11, 4.9, 5, master
- Children:
- abe0cdb1
- Parents:
- 0a23c714
- Files:
-
- 16 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/ChangeLog
r0a23c714 r55a685b 1 2007-09-24 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> 2 3 * libchip/i2c/spi-flash-m25p40.c, libchip/i2c/spi-flash-m25p40.c, 4 * libchip/Makefile.am: 5 added SPI flash driver for a M25P40 chip (based on libi2c extensions) 6 1 7 2007-09-25 Joel Sherrill <joel.sherrill@OARcorp.com> 2 8 -
c/src/lib/libbsp/powerpc/gen83xx/ChangeLog
r0a23c714 r55a685b 1 2007-10-25 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> 2 3 * include/bsp.h: fixed some typos 4 5 2007-10-25 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> 6 7 * Makefile.am, spi/spi_init.c, include/bsp.h: add spi support 8 1 9 2007-09-17 Joel Sherrill <joel.sherrill@OARcorp.com> 2 10 -
c/src/lib/libbsp/powerpc/gen83xx/Makefile.am
r0a23c714 r55a685b 77 77 78 78 noinst_PROGRAMS += console.rel 79 console_rel_SOURCES = console/console.c console/ns16550cfg.c 79 console_rel_SOURCES = console/console.c console/ns16550cfg.c 80 80 console_rel_CPPFLAGS = $(AM_CPPFLAGS) 81 81 console_rel_LDFLAGS = $(RTEMS_RELLDFLAGS) … … 94 94 bsp_i2c_rel_LDFLAGS = $(RTEMS_RELLDFLAGS) 95 95 96 noinst_PROGRAMS += bsp_spi.rel 97 bsp_spi_rel_SOURCES = spi/spi_init.c 98 bsp_spi_rel_CPPFLAGS = $(AM_CPPFLAGS) 99 bsp_spi_rel_LDFLAGS = $(RTEMS_RELLDFLAGS) 100 101 96 102 noinst_LIBRARIES = libbsp.a 97 103 libbsp_a_SOURCES = 98 104 libbsp_a_LIBADD = startup.rel pclock.rel console.rel vectors.rel irq.rel \ 99 mpc83xx_regs.rel bsp_i2c.rel 105 mpc83xx_regs.rel bsp_i2c.rel bsp_spi.rel 100 106 libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \ 101 107 ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \ … … 107 113 ../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \ 108 114 ../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel \ 109 ../../../libcpu/@RTEMS_CPU@/mpc83xx/i2c.rel 115 ../../../libcpu/@RTEMS_CPU@/mpc83xx/i2c.rel \ 116 ../../../libcpu/@RTEMS_CPU@/mpc83xx/spi.rel 110 117 111 118 if HAS_NETWORKING -
c/src/lib/libbsp/powerpc/gen83xx/i2c/i2c_init.c
r0a23c714 r55a685b 74 74 { 75 75 int ret_code; 76 int i2c1_busno,i2c2_busno; 76 77 77 78 /* 78 * init I2C library 79 * init I2C library (if not already done) 79 80 */ 80 81 rtems_libi2c_initialize (); … … 88 89 return -ret_code; 89 90 } 91 i2c1_busno = ret_code; 90 92 /* 91 93 * register second I2C bus … … 96 98 return -ret_code; 97 99 } 100 i2c2_busno = ret_code; 98 101 /* 99 102 * register EEPROM to bus 1, Address 0x50 … … 101 104 ret_code = rtems_libi2c_register_drv(RTEMS_BSP_I2C_EEPROM_DEVICE_NAME, 102 105 i2c_2b_eeprom_driver_descriptor, 103 0,0x50);106 i2c1_busno,0x50); 104 107 if (ret_code < 0) { 105 108 return -ret_code; -
c/src/lib/libbsp/powerpc/gen83xx/include/bsp.h
r0a23c714 r55a685b 240 240 void bsp_cleanup(void); 241 241 rtems_status_code bsp_register_i2c(void); 242 rtems_status_code bsp_register_spi(void); 242 243 243 244 /* console modes (only termios) */ … … 281 282 #define RTEMS_BSP_I2C_EEPROM_DEVICE_PATH "/dev/i2c1.eeprom" 282 283 284 /* 285 * SPI Flash device name 286 */ 287 #define RTEMS_BSP_SPI_FLASH_DEVICE_NAME "flash" 288 #define RTEMS_BSP_SPI_FLASH_DEVICE_PATH "/dev/spi.flash" 289 283 290 #ifdef __cplusplus 284 291 } -
c/src/lib/libcpu/powerpc/ChangeLog
r0a23c714 r55a685b 1 2007-10-25 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> 2 3 * mpc83xx/network/tsec.c: 4 fixed typo in comment of attach function 5 6 2007-10-25 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> 7 8 * Makefile.am, mpc83xx/spi/mpc83xx_spidrv.c, 9 * mpc83xx/spi/mpc83xx_spidrv.h, mpc83xx/include/mpc83xx.h: 10 added spi driver 11 12 2007-10-25 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> 13 14 * mpc83xx/i2c/mpc83xx_i2cdrv.c: 15 added IRQ support in I2C driver 16 17 2007-10-25 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> 18 19 * mpc83xx/network/tsec.c: 20 added statistics counters to tsec 21 1 22 2007-09-12 Joel Sherrill <joel.sherrill@OARcorp.com> 2 23 -
c/src/lib/libcpu/powerpc/Makefile.am
r0a23c714 r55a685b 349 349 mpc83xx_i2c_rel_LDFLAGS = $(RTEMS_RELLDFLAGS) 350 350 351 ## mpc83xx/spi 352 include_mpc83xx_HEADERS += mpc83xx/spi/mpc83xx_spidrv.h 353 noinst_PROGRAMS += mpc83xx/spi.rel 354 mpc83xx_spi_rel_SOURCES = mpc83xx/spi/mpc83xx_spidrv.c \ 355 mpc83xx/spi/mpc83xx_spidrv.h 356 mpc83xx_spi_rel_CPPFLAGS = $(AM_CPPFLAGS) 357 mpc83xx_spi_rel_LDFLAGS = $(RTEMS_RELLDFLAGS) 358 351 359 endif 352 360 -
c/src/lib/libcpu/powerpc/mpc83xx/i2c/mpc83xx_i2cdrv.c
r0a23c714 r55a685b 27 27 #include <rtems/libi2c.h> 28 28 29 /* #define DEBUG */ 30 31 /* 32 * XXX: for the beginning, this driver works polled 33 */ 29 #define DEBUG 34 30 35 31 /*=========================================================================*\ … … 111 107 printk("mpc83xx_i2c_wait called... "); 112 108 #endif 113 softc_ptr->reg_ptr->i2ccr |= MPC83XX_I2CCR_MIEN;114 109 115 110 if (softc_ptr->initialized) { 111 /* 112 * enable interrupt mask 113 */ 114 softc_ptr->reg_ptr->i2ccr |= MPC83XX_I2CCR_MIEN; 116 115 rc = rtems_semaphore_obtain(softc_ptr->irq_sema_id,RTEMS_WAIT,100); 117 116 if (rc != RTEMS_SUCCESSFUL) { … … 132 131 softc_ptr->reg_ptr->i2ccr &= ~MPC83XX_I2CCR_MIEN; 133 132 134 act_status = softc_ptr->reg_ptr->i2csr & status_mask;135 if ( act_status!= desired_status) {133 act_status = softc_ptr->reg_ptr->i2csr; 134 if ((act_status & status_mask) != desired_status) { 136 135 #if defined(DEBUG) 137 136 printk("... exit with RTEMS_IO_ERROR\r\n"); … … 143 142 #endif 144 143 return RTEMS_SUCCESSFUL; 144 } 145 146 /*=========================================================================*\ 147 | Function: | 148 \*-------------------------------------------------------------------------*/ 149 static void mpc83xx_i2c_irq_handler 150 ( 151 /*-------------------------------------------------------------------------*\ 152 | Purpose: | 153 | handle interrupts | 154 +---------------------------------------------------------------------------+ 155 | Input Parameters: | 156 \*-------------------------------------------------------------------------*/ 157 rtems_irq_hdl_param handle /* handle, is softc_ptr structure */ 158 ) 159 /*-------------------------------------------------------------------------*\ 160 | Return Value: | 161 | <none> | 162 \*=========================================================================*/ 163 { 164 mpc83xx_i2c_softc_t *softc_ptr = (mpc83xx_i2c_softc_t *)handle; 165 166 /* 167 * disable interrupt mask 168 */ 169 softc_ptr->reg_ptr->i2ccr &= ~MPC83XX_I2CCR_MIEN; 170 if (softc_ptr->initialized) { 171 rtems_semaphore_release(softc_ptr->irq_sema_id); 172 } 173 } 174 175 /*=========================================================================*\ 176 | Function: | 177 \*-------------------------------------------------------------------------*/ 178 static void mpc83xx_i2c_irq_on_off 179 ( 180 /*-------------------------------------------------------------------------*\ 181 | Purpose: | 182 | enable/disable interrupts (void, handled at different position) | 183 +---------------------------------------------------------------------------+ 184 | Input Parameters: | 185 \*-------------------------------------------------------------------------*/ 186 const 187 rtems_irq_connect_data *irq_conn_data /* irq connect data */ 188 ) 189 /*-------------------------------------------------------------------------*\ 190 | Return Value: | 191 | <none> | 192 \*=========================================================================*/ 193 { 194 } 195 196 197 /*=========================================================================*\ 198 | Function: | 199 \*-------------------------------------------------------------------------*/ 200 static int mpc83xx_i2c_irq_isOn 201 ( 202 /*-------------------------------------------------------------------------*\ 203 | Purpose: | 204 | check state of interrupts, void, done differently | 205 +---------------------------------------------------------------------------+ 206 | Input Parameters: | 207 \*-------------------------------------------------------------------------*/ 208 const 209 rtems_irq_connect_data *irq_conn_data /* irq connect data */ 210 ) 211 /*-------------------------------------------------------------------------*\ 212 | Return Value: | 213 | TRUE, if enabled | 214 \*=========================================================================*/ 215 { 216 return (TRUE); 217 } 218 219 /*=========================================================================*\ 220 | Function: | 221 \*-------------------------------------------------------------------------*/ 222 static void mpc83xx_i2c_install_irq_handler 223 ( 224 /*-------------------------------------------------------------------------*\ 225 | Purpose: | 226 | (un-)install the interrupt handler | 227 +---------------------------------------------------------------------------+ 228 | Input Parameters: | 229 \*-------------------------------------------------------------------------*/ 230 mpc83xx_i2c_softc_t *softc_ptr, /* ptr to control structure */ 231 int install /* TRUE: install, FALSE: remove */ 232 ) 233 /*-------------------------------------------------------------------------*\ 234 | Return Value: | 235 | <none> | 236 \*=========================================================================*/ 237 { 238 rtems_status_code rc = RTEMS_SUCCESSFUL; 239 240 rtems_irq_connect_data irq_conn_data = { 241 softc_ptr->irq_number, 242 mpc83xx_i2c_irq_handler, /* rtems_irq_hdl */ 243 (rtems_irq_hdl_param)softc_ptr, /* (rtems_irq_hdl_param) */ 244 mpc83xx_i2c_irq_on_off, /* (rtems_irq_enable) */ 245 mpc83xx_i2c_irq_on_off, /* (rtems_irq_disable) */ 246 mpc83xx_i2c_irq_isOn /* (rtems_irq_is_enabled) */ 247 }; 248 249 /* 250 * (un-)install handler for I2C device 251 */ 252 if (install) { 253 /* 254 * create semaphore for IRQ synchronization 255 */ 256 rc = rtems_semaphore_create(rtems_build_name('i','2','c','s'), 257 0, 258 RTEMS_FIFO 259 | RTEMS_SIMPLE_BINARY_SEMAPHORE, 260 0, 261 &softc_ptr->irq_sema_id); 262 if (rc != RTEMS_SUCCESSFUL) { 263 rtems_panic("I2C: cannot create semaphore"); 264 } 265 if (!BSP_install_rtems_irq_handler (&irq_conn_data)) { 266 rtems_panic("I2C: cannot install IRQ handler"); 267 } 268 } 269 else { 270 if (!BSP_remove_rtems_irq_handler (&irq_conn_data)) { 271 rtems_panic("I2C: cannot uninstall IRQ handler"); 272 } 273 /* 274 * delete sync semaphore 275 */ 276 if (softc_ptr->irq_sema_id != 0) { 277 rc = rtems_semaphore_delete(softc_ptr->irq_sema_id); 278 if (rc != RTEMS_SUCCESSFUL) { 279 rtems_panic("I2C: cannot delete semaphore"); 280 } 281 } 282 } 145 283 } 146 284 … … 186 324 softc_ptr->reg_ptr->i2cdfsrr = 0x10 ; /* no special filtering needed */ 187 325 /* 188 * set own slave address to broadcas r(0x00)326 * set own slave address to broadcast (0x00) 189 327 */ 190 328 softc_ptr->reg_ptr->i2cadr = 0x00 ; … … 196 334 197 335 /* 198 * FIXME: init interrupt stuff 199 */ 200 /* 201 * FIXME: init other stuff 202 */ 336 * init interrupt stuff 337 */ 338 mpc83xx_i2c_install_irq_handler(softc_ptr,TRUE); 339 340 /* 341 * mark, that we have initialized 342 */ 343 softc_ptr->initialized = TRUE; 203 344 #if defined(DEBUG) 204 345 printk("... exit OK\r\n"); -
c/src/lib/libcpu/powerpc/mpc83xx/include/mpc83xx.h
r0a23c714 r55a685b 377 377 uint8_t reserved0_7038[0x07100-0x07038];/* 0x0_7038-70FF Reserved */ 378 378 } m83xxSPIRegisters_t; 379 /* SPIMODE register fields */ 380 #define MPC83XX_SPIMODE_LOOP (1 << (31- 1)) /* loopback */ 381 #define MPC83XX_SPIMODE_CI (1 << (31- 2)) /* clock invert */ 382 #define MPC83XX_SPIMODE_CP (1 << (31- 3)) /* clock phase */ 383 #define MPC83XX_SPIMODE_DIV16 (1 << (31- 4)) /* divide by 16 */ 384 #define MPC83XX_SPIMODE_REV (1 << (31- 5)) /* LSB first */ 385 #define MPC83XX_SPIMODE_M_S (1 << (31- 6)) /* master/slave */ 386 #define MPC83XX_SPIMODE_EN (1 << (31- 7)) /* enable */ 387 #define MPC83XX_SPIMODE_LEN(n) ((n) << (31-11)) /* length code */ 388 #define MPC83XX_SPIMODE_PM(n) ((n) << (31-15)) /* prescaler */ 389 #define MPC83XX_SPIMODE_OD (1 << (31-19)) /* open drain */ 390 391 /* SPCOM register fields */ 392 #define MPC83XX_SPCOM_LST (1 << (31- 9)) /* last transfer */ 393 394 /* SPIE/M register fields */ 395 #define MPC83XX_SPIE_LT (1 << (31-17)) /* last character transmitted */ 396 #define MPC83XX_SPIE_DNR (1 << (31-18)) /* data not ready */ 397 #define MPC83XX_SPIE_OV (1 << (31-19)) /* overrun */ 398 #define MPC83XX_SPIE_UN (1 << (31-20)) /* unterrun */ 399 #define MPC83XX_SPIE_MME (1 << (31-21)) /* multi-master error */ 400 #define MPC83XX_SPIE_NE (1 << (31-22)) /* not empty */ 401 #define MPC83XX_SPIE_NF (1 << (31-23)) /* not full */ 379 402 380 403 typedef struct m83xxDMARegisters_ { … … 775 798 #define M83xx_TSEC_TSTAT_THLT (1<<(31-0)) 776 799 800 /* 801 * TSEC RSTAT bit definitions 802 */ 803 #define M83xx_TSEC_RSTAT_QHLT (1<<(31-8)) 777 804 /* 778 805 * TSEC ECNTRL bit positions -
c/src/lib/libcpu/powerpc/mpc83xx/network/tsec.c
r0a23c714 r55a685b 95 95 */ 96 96 unsigned long rxInterrupts; 97 unsigned long rxNotLast; 98 unsigned long rxGiant; 99 unsigned long rxNonOctet; 100 unsigned long rxBadCRC; 101 unsigned long rxOverrun; 102 unsigned long rxCollision; 103 97 unsigned long rxErrors; 104 98 /* 105 99 * statistic counters Tx 106 100 */ 107 101 unsigned long txInterrupts; 108 unsigned long txDeferred; 109 unsigned long txLateCollision; 110 unsigned long txUnderrun; 111 unsigned long txMisaligned; 112 unsigned long rxNotFirst; 113 unsigned long txRetryLimit; 102 unsigned long txErrors; 114 103 }; 115 104 … … 239 228 240 229 /* 241 * init EDIS register: enable all error reportings 242 * FIXME: make sure we handle these errors correctly 243 */ 244 reg_ptr->edis = 0; 230 * init EDIS register: disable all error reportings 231 */ 232 reg_ptr->edis = (M83xx_TSEC_EDIS_BSYDIS | 233 M83xx_TSEC_EDIS_EBERRDIS | 234 M83xx_TSEC_EDIS_TXEDIS | 235 M83xx_TSEC_EDIS_LCDIS | 236 M83xx_TSEC_EDIS_CRLXDADIS | 237 M83xx_TSEC_EDIS_FUNDIS); 245 238 /* 246 239 * init minimum frame length register … … 617 610 */ 618 611 MFREE(m,n); 619 /*620 * update statistics621 */622 if (0 != (status & M83xx_BD_LAST))623 sc->rxNotLast++;624 if (0 != (status & M83xx_BD_FIRST_IN_FRAME))625 sc->rxNotFirst++;626 627 if (0 == (status & M83xx_BD_LONG)) {628 sc->rxGiant++;629 }630 if (0 == (status & M83xx_BD_NONALIGNED)) {631 sc->rxNonOctet++;632 }633 if (0 == (status & M83xx_BD_CRC_ERROR)) {634 sc->rxBadCRC++;635 }636 if (0 == (status & M83xx_BD_OVERRUN)) {637 sc->rxOverrun++;638 }639 612 } 640 613 /* … … 1235 1208 \*=========================================================================*/ 1236 1209 { 1237 /* 1238 * FIXME: check error conditions, do something useful 1239 */ 1240 #if 0 1241 /* 1242 * disable error interrupts 1243 */ 1244 M83xx_TSEC_IMASK_SET(sc->reg_ptr->imask,M83xx_IEVENT_ERRALL,0); 1245 /* 1246 * FIXME: do something :-) 1247 */ 1248 #endif 1210 struct mpc83xx_tsec_struct *sc = 1211 (struct mpc83xx_tsec_struct *)handle; 1212 /* 1213 * clear error events in IEVENT 1214 */ 1215 sc->reg_ptr->tstat = M83xx_IEVENT_ERRALL; 1216 /* 1217 * has Rx been stopped? then restart it 1218 */ 1219 if (0 != (sc->reg_ptr->rstat & M83xx_TSEC_RSTAT_QHLT)) { 1220 sc->rxErrors++; 1221 sc->reg_ptr->rstat = M83xx_TSEC_RSTAT_QHLT; 1222 } 1223 /* 1224 * has Tx been stopped? then restart it 1225 */ 1226 if (0 != (sc->reg_ptr->tstat & M83xx_TSEC_TSTAT_THLT)) { 1227 sc->txErrors++; 1228 sc->reg_ptr->tstat = M83xx_TSEC_TSTAT_THLT; 1229 } 1249 1230 } 1250 1231 … … 1530 1511 { 1531 1512 /* 1532 * FIXME: deinitialize driver1513 * deinitialize driver? 1533 1514 */ 1534 1515 } … … 1541 1522 /*-------------------------------------------------------------------------*\ 1542 1523 | Purpose: | 1543 | p erform io control functions|1524 | print statistics | 1544 1525 +---------------------------------------------------------------------------+ 1545 1526 | Input Parameters: | … … 1569 1550 * print some statistics 1570 1551 */ 1571 printf (" Rx Interrupts:%-8lu", sc->rxInterrupts); 1572 printf (" Not First:%-8lu", sc->rxNotFirst); 1573 printf (" Not Last:%-8lu\n", sc->rxNotLast); 1574 printf (" Giant:%-8lu", sc->rxGiant); 1575 printf (" Non-octet:%-8lu\n", sc->rxNonOctet); 1576 printf (" Bad CRC:%-8lu", sc->rxBadCRC); 1577 printf (" Overrun:%-8lu", sc->rxOverrun); 1578 printf (" Collision:%-8lu\n", sc->rxCollision); 1552 printf (" Rx Interrupts:%-8lu", sc->rxInterrupts); 1553 printf (" Rx Errors:%-8lu", sc->rxErrors); 1554 printf (" Rx packets:%-8lu\n", 1555 sc->reg_ptr->rmon_mib[m83xx_tsec_rmon_rpkt]); 1556 printf (" Rx broadcasts:%-8lu", 1557 sc->reg_ptr->rmon_mib[m83xx_tsec_rmon_rbca]); 1558 printf (" Rx multicasts:%-8lu", 1559 sc->reg_ptr->rmon_mib[m83xx_tsec_rmon_rmca]); 1560 printf (" Giant:%-8lu\n", 1561 sc->reg_ptr->rmon_mib[m83xx_tsec_rmon_rovr]); 1562 printf (" Non-octet:%-8lu", 1563 sc->reg_ptr->rmon_mib[m83xx_tsec_rmon_raln]); 1564 printf (" Bad CRC:%-8lu", 1565 sc->reg_ptr->rmon_mib[m83xx_tsec_rmon_rfcs]); 1566 printf (" Overrun:%-8lu\n", 1567 sc->reg_ptr->rmon_mib[m83xx_tsec_rmon_rdrp]); 1579 1568 1580 printf (" Tx Interrupts:%-8lu", sc->txInterrupts); 1581 printf (" Deferred:%-8lu", sc->txDeferred); 1582 printf (" Late Collision:%-8lu\n", sc->txLateCollision); 1583 printf ("Retransmit Limit:%-8lu", sc->txRetryLimit); 1584 printf (" Underrun:%-8lu", sc->txUnderrun); 1585 printf (" Misaligned:%-8lu\n", sc->txMisaligned); 1569 printf (" Tx Interrupts:%-8lu", sc->txInterrupts); 1570 printf (" Tx Errors:%-8lu", sc->txErrors); 1571 printf (" Tx packets:%-8lu\n", 1572 sc->reg_ptr->rmon_mib[m83xx_tsec_rmon_tpkt]); 1573 printf (" Deferred:%-8lu", 1574 sc->reg_ptr->rmon_mib[m83xx_tsec_rmon_tdfr]); 1575 printf (" Late Collision:%-8lu", 1576 sc->reg_ptr->rmon_mib[m83xx_tsec_rmon_tlcl]); 1577 printf ("Retransmit Limit:%-8lu\n", 1578 sc->reg_ptr->rmon_mib[m83xx_tsec_rmon_tedf]); 1579 printf (" Underrun:%-8lu\n", 1580 sc->reg_ptr->rmon_mib[m83xx_tsec_rmon_tund]); 1586 1581 } 1587 1582 … … 1633 1628 } 1634 1629 if (ifp->if_flags & IFF_UP) { 1635 mpc83xx_tsec_ off(sc);1630 mpc83xx_tsec_init(sc); 1636 1631 } 1637 1632 break; … … 1645 1640 1646 1641 /* 1647 * FIXME:All sorts of multicast commands need to be added here!1642 * All sorts of multicast commands need to be added here! 1648 1643 */ 1649 1644 default: … … 1800 1795 /*-------------------------------------------------------------------------*\ 1801 1796 | Return Value: | 1802 | zero, if success|1797 | 1, if success | 1803 1798 \*=========================================================================*/ 1804 1799 { … … 1901 1896 } 1902 1897 1903 1904 1898 /*=========================================================================*\ 1905 1899 | Function: | -
c/src/lib/libcpu/powerpc/preinstall.am
r0a23c714 r55a685b 212 212 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/mpc83xx/mpc83xx_i2cdrv.h 213 213 PREINSTALL_FILES += $(PROJECT_INCLUDE)/mpc83xx/mpc83xx_i2cdrv.h 214 endif 214 215 $(PROJECT_INCLUDE)/mpc83xx/mpc83xx_spidrv.h: mpc83xx/spi/mpc83xx_spidrv.h $(PROJECT_INCLUDE)/mpc83xx/$(dirstamp) 216 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/mpc83xx/mpc83xx_spidrv.h 217 PREINSTALL_FILES += $(PROJECT_INCLUDE)/mpc83xx/mpc83xx_spidrv.h 218 endif -
c/src/libchip/Makefile.am
r0a23c714 r55a685b 65 65 # i2c 66 66 if LIBCHIP 67 include_libchip_HEADERS += i2c/i2c-ds1621.h i2c/i2c-2b-eeprom.h 67 include_libchip_HEADERS += i2c/i2c-ds1621.h i2c/i2c-2b-eeprom.h \ 68 i2c/spi-flash-m25p40.h 68 69 69 70 noinst_LIBRARIES += libi2cio.a 70 71 libi2cio_a_CPPFLAGS = $(AM_CPPFLAGS) 71 72 libi2cio_a_SOURCES = i2c/i2c-ds1621.c i2c/i2c-2b-eeprom.c \ 72 i2c/i2c-ds1621.h i2c/i2c-2b-eeprom.h 73 i2c/i2c-ds1621.h i2c/i2c-2b-eeprom.h \ 74 i2c/spi-flash-m25p40.c i2c/spi-flash-m25p40.h 73 75 endif 74 76 -
c/src/libchip/preinstall.am
r0a23c714 r55a685b 116 116 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/libchip/i2c-2b-eeprom.h 117 117 PREINSTALL_FILES += $(PROJECT_INCLUDE)/libchip/i2c-2b-eeprom.h 118 119 $(PROJECT_INCLUDE)/libchip/spi-flash-m25p40.h: i2c/spi-flash-m25p40.h $(PROJECT_INCLUDE)/libchip/$(dirstamp) 120 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/libchip/spi-flash-m25p40.h 121 PREINSTALL_FILES += $(PROJECT_INCLUDE)/libchip/spi-flash-m25p40.h 118 122 endif 119 123 if LIBCHIP -
cpukit/ChangeLog
r0a23c714 r55a685b 1 2007-10-25 Thomas Doerfler <Thomas.Doerfler@embedded-brains.de> 2 3 * libi2c/libi2c.c, libi2c/libi2c.h: 4 extend API to support SPI devices 5 made libi2c.h C++-proof 6 1 7 2007-10-19 Joel Sherrill <joel.sherrill@OARcorp.com> 2 8 -
cpukit/libi2c/libi2c.c
r0a23c714 r55a685b 47 47 * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03 48 48 */ 49 /* 50 * adaptations to also handle SPI devices 51 * by Thomas Doerfler, embedded brains GmbH, Puchheim, Germany 52 */ 49 53 #if HAVE_CONFIG_H 50 54 #include "config.h" … … 56 60 #include <errno.h> 57 61 #include <assert.h> 62 #include <stdarg.h> 58 63 59 64 #include <rtems.h> … … 319 324 { 320 325 rtems_status_code sc; 321 326 static boolean is_initialized = FALSE; 327 328 if (is_initialized) { 329 /* 330 * already called before? then skip this step 331 */ 332 return 0; 333 } 334 322 335 if (!(libmutex = mutexCreate (rtems_build_name ('l', 'I', '2', 'C')))) 323 336 return -1; … … 332 345 return -1; 333 346 } 347 is_initialized = TRUE; 334 348 335 349 return 0; … … 429 443 430 444 rtems_status_code 431 rtems_libi2c_send_start ( uint32_tminor)445 rtems_libi2c_send_start (rtems_device_minor_number minor) 432 446 { 433 447 int rval; … … 460 474 461 475 rtems_status_code 462 rtems_libi2c_send_stop ( uint32_tminor)476 rtems_libi2c_send_stop (rtems_device_minor_number minor) 463 477 { 464 478 rtems_status_code rval; … … 477 491 478 492 rtems_status_code 479 rtems_libi2c_send_addr ( uint32_tminor, int rw)493 rtems_libi2c_send_addr (rtems_device_minor_number minor, int rw) 480 494 { 481 495 rtems_status_code sc; … … 492 506 493 507 int 494 rtems_libi2c_read_bytes (uint32_t minor, unsigned char *bytes, int nbytes) 508 rtems_libi2c_read_bytes (rtems_device_minor_number minor, 509 unsigned char *bytes, 510 int nbytes) 495 511 { 496 512 int sc; … … 507 523 508 524 int 509 rtems_libi2c_write_bytes (uint32_t minor, unsigned char *bytes, int nbytes) 525 rtems_libi2c_write_bytes (rtems_device_minor_number minor, 526 unsigned char *bytes, 527 int nbytes) 510 528 { 511 529 int sc; … … 521 539 } 522 540 541 int 542 rtems_libi2c_ioctl (rtems_device_minor_number minor, 543 int cmd, 544 ...) 545 { 546 va_list ap; 547 int sc = 0; 548 void *args; 549 DECL_CHECKED_BH (busno, bush, minor, -) 550 551 if (not_started (busno)) 552 return -RTEMS_NOT_OWNER_OF_RESOURCE; 553 554 va_start(ap, cmd); 555 args = va_arg(ap, void *); 556 557 switch(cmd) { 558 /* 559 * add ioctls defined for this level here: 560 */ 561 562 case RTEMS_LIBI2C_IOCTL_START_TFM_READ_WRITE: 563 /* 564 * address device, then set transfer mode and perform read_write transfer 565 */ 566 /* 567 * perform start/address 568 */ 569 if (sc == 0) { 570 sc = rtems_libi2c_send_start (minor); 571 } 572 /* 573 * set tfr mode 574 */ 575 if (sc == 0) { 576 sc = bush->ops->ioctl 577 (bush, 578 RTEMS_LIBI2C_IOCTL_SET_TFRMODE, 579 &((rtems_libi2c_tfm_read_write_t *)args)->tfr_mode); 580 } 581 /* 582 * perform read_write 583 */ 584 if (sc == 0) { 585 sc = bush->ops->ioctl 586 (bush, 587 RTEMS_LIBI2C_IOCTL_READ_WRITE, 588 &((rtems_libi2c_tfm_read_write_t *)args)->rd_wr); 589 } 590 break; 591 default: 592 sc = bush->ops->ioctl (bush, cmd, args); 593 break; 594 } 595 if (sc < 0) 596 rtems_libi2c_send_stop (minor); 597 return sc; 598 } 599 523 600 static int 524 do_s_rw (uint32_t minor, unsigned char *bytes, int nbytes, int rw) 601 do_s_rw (rtems_device_minor_number minor, 602 unsigned char *bytes, 603 int nbytes, 604 int rw) 525 605 { 526 606 rtems_status_code sc; … … 550 630 551 631 int 552 rtems_libi2c_start_read_bytes (uint32_t minor, unsigned char *bytes, 632 rtems_libi2c_start_read_bytes (rtems_device_minor_number minor, 633 unsigned char *bytes, 553 634 int nbytes) 554 635 { … … 557 638 558 639 int 559 rtems_libi2c_start_write_bytes (uint32_t minor, unsigned char *bytes, 640 rtems_libi2c_start_write_bytes (rtems_device_minor_number minor, 641 unsigned char *bytes, 560 642 int nbytes) 561 643 { -
cpukit/libi2c/libi2c.h
r0a23c714 r55a685b 47 47 * ------------------ SLAC Software Notices, Set 4 OTT.002a, 2004 FEB 03 48 48 */ 49 49 50 #include <rtems.h> 50 51 … … 102 103 int (*write_bytes) (rtems_libi2c_bus_t * bushdl, unsigned char *bytes, 103 104 int nbytes); 105 /* ioctl misc functions */ 106 int (*ioctl) (rtems_libi2c_bus_t * bushdl, 107 int cmd, 108 void *buffer; 109 ); 104 110 } rtems_libi2c_bus_ops_t; 105 111 … … 266 272 /* Send start, send address and read bytes */ 267 273 int 268 rtems_libi2c_start_read_bytes (uint32_t minor, unsigned char *bytes, 274 rtems_libi2c_start_read_bytes (rtems_device_minor_number minor, 275 unsigned char *bytes, 269 276 int nbytes); 270 277 271 278 /* Send start, send address and write bytes */ 272 279 int 273 rtems_libi2c_start_write_bytes (uint32_t minor, unsigned char *bytes, 280 rtems_libi2c_start_write_bytes (rtems_device_minor_number minor, 281 unsigned char *bytes, 274 282 int nbytes); 283 284 285 /* call misc iocontrol function */ 286 int 287 rtems_libi2c_ioctl (rtems_device_minor_number minor, 288 int cmd, 289 ...); 290 /* 291 * NOTE: any low-level driver ioctl returning a negative 292 * result for release the bus (perform a STOP condition) 293 */ 294 /******************************* 295 * defined IOCTLs: 296 *******************************/ 297 #define RTEMS_LIBI2C_IOCTL_READ_WRITE 1 298 /* 299 * retval = rtems_libi2c_ioctl(rtems_device_minor_number minor, 300 * RTEMS_LIBI2C_IOCTL_READ_WRITE, 301 * rtems_libi2c_read_write_t *arg); 302 * 303 * This call performs a simultanous read/write transfer, 304 * which is possible (and sometimes needed) for SPI devices 305 * 306 * arg is a pointer to a rd_wr info data structure 307 * 308 * This call is only needed for SPI devices 309 */ 310 #define RTEMS_LIBI2C_IOCTL_START_TFM_READ_WRITE 2 311 /* 312 * retval = rtems_libi2c_ioctl(rtems_device_minor_number minor, 313 * RTEMS_LIBI2C_IOCTL_START_READ_WRITE, 314 * unsigned char *rd_buffer, 315 * const unsigned char *wr_buffer, 316 * int byte_cnt, 317 * const rtems_libi2c_tfr_mode_t *tfr_mode_ptr); 318 * 319 * This call addresses a slave and then: 320 * - sets the proper transfer mode, 321 * - performs a simultanous read/write transfer, 322 * (which is possible and sometimes needed for SPI devices) 323 * NOTE: - if rd_buffer is NULL, receive data will be dropped 324 * - if wr_buffer is NULL, bytes with content 0 will transmitted 325 * 326 * rd_buffer is a pointer to a receive buffer (or NULL) 327 * wr_buffer is a pointer to the data to be sent (or NULL) 328 * 329 * This call is only needed for SPI devices 330 */ 331 332 #define RTEMS_LIBI2C_IOCTL_SET_TFRMODE 3 333 /* 334 * retval = rtems_libi2c_ioctl(rtems_device_minor_number minor, 335 * RTEMS_LIBI2C_IOCTL_SET_TFRMODE, 336 * const rtems_libi2c_tfr_mode_t *tfr_mode_ptr); 337 * 338 * This call sets an SPI device to the transfer mode needed (baudrate etc.) 339 * 340 * tfr_mode is a pointer to a structure defining the SPI transfer mode needed 341 * (see below). 342 * 343 * This call is only needed for SPI devices 344 */ 345 346 /* 347 * arguemtn data structures for IOCTLs defined above 348 */ 349 typedef struct { 350 unsigned char *rd_buf; 351 const unsigned char *wr_buf; 352 int byte_cnt; 353 } rtems_libi2c_read_write_t; 354 355 typedef struct { 356 uint32_t baudrate; /* maximum bits per second */ 357 /* only valid for SPI drivers: */ 358 uint8_t bits_per_char; /* how many bits per byte/word/longword? */ 359 boolean lsb_first; /* TRUE: send LSB first */ 360 boolean clock_inv; /* TRUE: inverted clock (high active) */ 361 boolean clock_phs; /* TRUE: clock starts toggling at start of data tfr */ 362 } rtems_libi2c_tfr_mode_t; 363 364 typedef struct { 365 rtems_libi2c_tfr_mode_t tfr_mode; 366 rtems_libi2c_read_write_t rd_wr; 367 } rtems_libi2c_tfm_read_write_t; 368 275 369 276 370 #ifdef __cplusplus
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