Changeset 53fd6e2 in rtems


Ignore:
Timestamp:
May 30, 1996, 7:29:01 PM (25 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
b169590e
Parents:
a96a713
Message:

Eric Norum sent in new versions of the inline assembly macros which
do not generate warnings for unitialized variables.

Location:
c/src/exec/score/cpu/m68k
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • c/src/exec/score/cpu/m68k/cpu.h

    ra96a713 r53fd6e2  
    2828 *  in some time critical routines.
    2929 */
    30 
    31 #define NO_UNINITIALIZED_WARNINGS
    3230
    3331#include <rtems/score/m68k.h>
     
    311309
    312310#if ( M68K_HAS_BFFFO == 1 )
    313 #ifdef NO_UNINITIALIZED_WARNINGS
    314311
    315312#define _CPU_Bitfield_Find_first_bit( _value, _output ) \
    316   { \
    317     register void *__base = (void *)&(_value); \
    318     \
    319     (_output) = 0;  /* avoids warnings */ \
    320     asm volatile( "bfffo (%0),#0,#16,%1" \
    321                    : "=a" (__base), "=d" ((_output)) \
    322                    : "0"  (__base), "1" ((_output))  ) ; \
    323   }
    324 #else
    325 #define _CPU_Bitfield_Find_first_bit( _value, _output ) \
    326   { \
    327     register void *__base = (void *)&(_value); \
    328     \
    329     asm volatile( "bfffo (%0),#0,#16,%1" \
    330                    : "=a" (__base), "=d" ((_output)) \
    331                    : "0"  (__base), "1" ((_output))  ) ; \
    332   }
    333 #endif
     313  asm volatile( "bfffo (%1),#0,#16,%0" : "=d" (_output), "=a" (&_value));
    334314
    335315#else
  • c/src/exec/score/cpu/m68k/m68k.h

    ra96a713 r53fd6e2  
    195195
    196196/*
    197  *  If defined, this causes some of the macros to initialize their
    198  *  variables to zero before doing inline assembly.  This gets rid
    199  *  of compile time warnings at the cost of a little execution time
    200  *  in some time critical routines.
    201  */
    202 
    203 #define NO_UNINITIALIZED_WARNINGS
    204 
    205 /*
    206197 *  Define the name of the CPU family.
    207198 */
     
    211202#ifndef ASM
    212203
    213 #ifdef NO_UNINITIALIZED_WARNINGS
    214204#define m68k_disable_interrupts( _level ) \
    215   { \
    216     (_level) = 0;  /* avoids warnings */ \
    217     asm volatile ( "movew   %%sr,%0 ; \
    218                     orw     #0x0700,%%sr" \
    219                     : "=d" ((_level)) : "0" ((_level)) \
    220     ); \
    221   }
    222 #else
    223 #define m68k_disable_interrupts( _level ) \
    224   { \
    225     asm volatile ( "movew   %%sr,%0 ; \
    226                     orw     #0x0700,%%sr" \
    227                     : "=d" ((_level)) : "0" ((_level)) \
    228     ); \
    229   }
    230 #endif
     205  asm volatile ( "movew   %%sr,%0\n\t" \
     206                 "orw     #0x0700,%%sr" \
     207                    : "=d" (_level))
    231208
    232209#define m68k_enable_interrupts( _level ) \
    233   { \
    234     asm volatile ( "movew   %0,%%sr " \
    235                    : "=d" ((_level)) : "0" ((_level)) \
    236     ); \
    237   }
     210  asm volatile ( "movew   %0,%%sr " : : "d" (_level));
    238211
    239212#define m68k_flash_interrupts( _level ) \
    240   { \
    241     asm volatile ( "movew   %0,%%sr ; \
    242                     orw     #0x0700,%%sr" \
    243                     : "=d" ((_level)) : "0" ((_level)) \
    244     ); \
    245   }
     213  asm volatile ( "movew   %0,%%sr\n\t" \
     214                 "orw     #0x0700,%%sr" \
     215                    : : "d" (_level))
    246216
    247217#define m68k_get_interrupt_level( _level ) \
    248218  do { \
    249     register unsigned32 _tmpsr = 0; \
     219    register unsigned32 _tmpsr; \
    250220    \
    251     asm volatile( "movw  %%sr,%0" \
    252                    : "=d" (_tmpsr) : "0" (_tmpsr) \
    253     ); \
    254     \
     221    asm volatile( "movw  %%sr,%0" : "=d" (_tmpsr)); \
    255222    _level = (_tmpsr & 0x0700) >> 8; \
    256223  } while (0)
    257224   
    258225#define m68k_set_interrupt_level( _newlevel ) \
    259   { \
    260     register unsigned32 _tmpsr = 0; \
     226  do { \
     227    register unsigned32 _tmpsr; \
    261228    \
    262     asm volatile( "movw  %%sr,%0" \
    263                    : "=d" (_tmpsr) : "0" (_tmpsr) \
    264     ); \
    265     \
     229    asm volatile( "movw  %%sr,%0" : "=d" (_tmpsr)); \
    266230    _tmpsr = (_tmpsr & 0xf8ff) | ((_newlevel) << 8); \
    267     \
    268     asm volatile( "movw  %0,%%sr" \
    269                    : "=d" (_tmpsr) : "0" (_tmpsr) \
    270     ); \
    271   }
     231    asm volatile( "movw  %0,%%sr" : : "d" (_tmpsr)); \
     232  } while (0)
    272233
    273234#if ( M68K_HAS_VBR == 1 )
    274235#define m68k_get_vbr( vbr ) \
    275   { (vbr) = 0; \
    276     asm volatile ( "movec   %%vbr,%0 " \
    277                        : "=r" (vbr) : "0" (vbr) ); \
    278   }
     236  asm volatile ( "movec   %%vbr,%0 " : "=r" (vbr))
    279237
    280238#define m68k_set_vbr( vbr ) \
    281   { register m68k_isr *_vbr= (m68k_isr *)(vbr); \
    282     asm volatile ( "movec   %0,%%vbr " \
    283                        : "=a" (_vbr) : "0" (_vbr) ); \
    284   }
     239  asm volatile ( "movec   %0,%%vbr " : : "r" (vbr))
    285240#else
    286241#define m68k_get_vbr( _vbr ) _vbr = (void *)_VBR
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