Changeset 53fb03fe in rtems


Ignore:
Timestamp:
Sep 12, 2018, 8:24:56 AM (15 months ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
master
Children:
68920e7f
Parents:
7b93d857
git-author:
Sebastian Huber <sebastian.huber@…> (09/12/18 08:24:56)
git-committer:
Sebastian Huber <sebastian.huber@…> (09/17/18 06:56:32)
Message:

bsp/tqm8xx: Move rxBuf to channel descriptor

Update #3513.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • bsps/powerpc/tqm8xx/console/console.c

    r7b93d857 r53fb03fe  
    106106
    107107/*
     108 * I/O buffers and pointers to buffer descriptors
     109 */
     110#define SCC_RXBD_CNT 4
     111#define SCC_TXBD_CNT 4
     112typedef volatile char sccRxBuf_t[SCC_RXBD_CNT][RXBUFSIZE];
     113
     114/*
    108115 * Interrupt-driven callback
    109116 */
     
    123130  int cr_chan_code;
    124131  int brg_used;
     132  sccRxBuf_t *rxBuf;
    125133} m8xx_console_chan_desc_t;
    126134
    127135m8xx_console_chan_desc_t m8xx_console_chan_desc[CONS_CHN_CNT] = {
    128136  /* SCC1 */
    129   {TRUE,
    130    {(m8xxSCCparms_t *)&(m8xx.scc1p),NULL},
    131    {&(m8xx.scc1),NULL},
    132    BSP_CPM_IRQ_SCC1,
    133    M8xx_CR_CHAN_SCC1,
    134    -1},
     137  { .is_scc = true,
     138   .parms = {(m8xxSCCparms_t *)&(m8xx.scc1p),NULL},
     139   .regs = {&(m8xx.scc1),NULL},
     140   .ivec_src = BSP_CPM_IRQ_SCC1,
     141   .cr_chan_code = M8xx_CR_CHAN_SCC1,
     142   .brg_used = -1},
    135143  /* SCC2 */
    136   {TRUE,
    137    {&(m8xx.scc2p),NULL},
    138    {&(m8xx.scc2),NULL},
    139    BSP_CPM_IRQ_SCC2,
    140    M8xx_CR_CHAN_SCC2,
    141    -1},
     144  { .is_scc = true,
     145   .parms = {&(m8xx.scc2p),NULL},
     146   .regs = {&(m8xx.scc2),NULL},
     147   .ivec_src = BSP_CPM_IRQ_SCC2,
     148   .cr_chan_code = M8xx_CR_CHAN_SCC2,
     149   .brg_used = -1},
    142150  /* SCC3 */
    143   {TRUE,
    144    {&(m8xx.scc3p),NULL},
    145    {&(m8xx.scc3),NULL},
    146    BSP_CPM_IRQ_SCC3,
    147    M8xx_CR_CHAN_SCC3,
    148    -1},
     151  { .is_scc = true,
     152   .parms = {&(m8xx.scc3p),NULL},
     153   .regs = {&(m8xx.scc3),NULL},
     154   .ivec_src = BSP_CPM_IRQ_SCC3,
     155   .cr_chan_code = M8xx_CR_CHAN_SCC3,
     156   .brg_used = -1},
    149157  /* SCC4 */
    150   {TRUE,
    151    {&(m8xx.scc4p),NULL},
    152    {&(m8xx.scc4),NULL},
    153    BSP_CPM_IRQ_SCC4,
    154    M8xx_CR_CHAN_SCC4,
    155    -1},
     158  { .is_scc = true,
     159   .parms = {&(m8xx.scc4p),NULL},
     160   .regs = {&(m8xx.scc4),NULL},
     161   .ivec_src = BSP_CPM_IRQ_SCC4,
     162   .cr_chan_code = M8xx_CR_CHAN_SCC4,
     163   .brg_used = -1},
    156164  /* SMC1 */
    157   {FALSE,
    158    {NULL,&(m8xx.smc1p)},
    159    {NULL,&(m8xx.smc1)},
    160    BSP_CPM_IRQ_SMC1,
    161    M8xx_CR_CHAN_SMC1,
    162    -1},
     165  { .is_scc = false,
     166   .parms = {NULL,&(m8xx.smc1p)},
     167   .regs = {NULL,&(m8xx.smc1)},
     168   .ivec_src = BSP_CPM_IRQ_SMC1,
     169   .cr_chan_code = M8xx_CR_CHAN_SMC1,
     170   .brg_used = -1},
    163171  /* SMC2 */
    164   {FALSE,
    165    {NULL,&(m8xx.smc2p)},
    166    {NULL,&(m8xx.smc2)},
    167    BSP_CPM_IRQ_SMC2_OR_PIP,
    168    M8xx_CR_CHAN_SMC2,
    169    -1}};
     172  { .is_scc = false,
     173   .parms = {NULL,&(m8xx.smc2p)},
     174   .regs = {NULL,&(m8xx.smc2)},
     175   .ivec_src = BSP_CPM_IRQ_SMC2_OR_PIP,
     176   .cr_chan_code = M8xx_CR_CHAN_SMC2,
     177   .brg_used = -1}};
    170178
    171179#define CHN_PARAM_GET(chan,param)                       \
     
    207215  }while (0)
    208216
    209 
    210 /*
    211  * I/O buffers and pointers to buffer descriptors
    212  */
    213 #define SCC_RXBD_CNT 4
    214 #define SCC_TXBD_CNT 4
    215 typedef volatile char sccRxBuf_t[SCC_RXBD_CNT][RXBUFSIZE];
    216 static sccRxBuf_t *rxBuf[CONS_CHN_CNT];
    217217
    218218static volatile m8xxBufferDescriptor_t *sccFrstRxBd[CONS_CHN_CNT];
     
    503503
    504504static void
    505 sccInitialize (int chan)
     505sccInitialize (m8xx_console_chan_desc_t *cd, int chan)
    506506{
    507507  int i;
     
    510510   * FIXME: use a cache-line size boundary alloc here
    511511   */
    512   rxBuf[chan] = malloc(sizeof(*rxBuf[chan]) + 2*PPC_CACHE_ALIGNMENT);
    513   if (rxBuf[chan] == NULL) {
     512  cd->rxBuf = rtems_cache_aligned_malloc(sizeof(*cd->rxBuf));
     513  if (cd->rxBuf == NULL) {
    514514    rtems_panic("Cannot allocate console rx buffer\n");
    515515  }
    516   else {
    517     /*
    518      * round up rxBuf[chan] to start at a cache line size
    519      */
    520     rxBuf[chan] = (sccRxBuf_t *)
    521       (((uint32_t)rxBuf[chan]) +
    522        (PPC_CACHE_ALIGNMENT
    523         - ((uint32_t)rxBuf[chan]) % PPC_CACHE_ALIGNMENT));
    524   }
     516
    525517  /*
    526518   * Allocate buffer descriptors
     
    650642    }
    651643    sccFrstRxBd[chan][i].length = 0;
    652     sccFrstRxBd[chan][i].buffer = (*rxBuf[chan])[i];
     644    sccFrstRxBd[chan][i].buffer = (*cd->rxBuf)[i];
    653645  }
    654646  /*
     
    896888      chan = channel_list[entry].minor;
    897889      m8xx_scc_mode[chan] = channel_list[entry].driver_mode;
    898       sccInitialize (chan);
     890      sccInitialize (&m8xx_console_chan_desc[chan], chan);
    899891
    900892      /*
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