Changeset 53923e8 in rtems
- Timestamp:
- 04/11/05 20:18:20 (19 years ago)
- Children:
- 0bdfa8d
- Parents:
- 64c3f79
- Location:
- c/src/lib/libbsp/powerpc/score603e
- Files:
-
- 7 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libbsp/powerpc/score603e/ChangeLog
r64c3f79 r53923e8 1 2005-04-11 Jennifer Averett<jennifer.averett@oarcorp.com> 2 3 PR 778/bsps 4 * include/bsp.h, include/gen2.h, startup/FPGA.c, startup/Hwr_init.c, 5 startup/bspstart.c, tod/tod.c: 6 modify SCORE_.. to BSP_.. for externally used define's. 7 1 8 2003-09-04 Joel Sherrill <joel@OARcorp.com> 2 9 -
c/src/lib/libbsp/powerpc/score603e/include/bsp.h
r64c3f79 r53923e8 70 70 #define Initialize_Board_ctrl_register() \ 71 71 *SCORE603E_BOARD_CTRL_REG = (*SCORE603E_BOARD_CTRL_REG | \ 72 SCORE603E_BRD_FLASH_DISABLE_MASK) \ 72 SCORE603E_BRD_FLASH_DISABLE_MASK) 73 74 #define Processor_Synchronize() \ 75 asm(" eieio ") 73 76 74 77 /* … … 250 253 ); 251 254 255 #define BSP_FLASH_ENABLE_WRITES( _area) SCORE603e_FLASH_Enable_writes( _area ) 256 #define BSP_FLASH_DISABLE_WRITES(_area) SCORE603e_FLASH_Disable( _area ) 257 252 258 #define Convert_Endian_32( _data ) \ 253 259 ( ((_data&0x000000ff)<<24) | ((_data&0x0000ff00)<<8) | \ -
c/src/lib/libbsp/powerpc/score603e/include/gen2.h
r64c3f79 r53923e8 26 26 */ 27 27 #define SCORE603E_VME_JUMPER_ADDR 0x00e20000 28 #define SCORE603E_FLASH_BASE_ADDR0x0400000028 #define BSP_FLASH_BASE 0x04000000 29 29 #define SCORE603E_ISA_PCI_IO_BASE 0x80000000 30 30 #define SCORE603E_TIMER_PORT_C 0xfd000000 … … 48 48 * PSC8 - PMC Card 49 49 */ 50 #define SCORE603E_PCI_CONFIGURATION_BASE 0x8080000051 #define SCORE603E_PMC_BASE SCORE603E_PCI_CONFIGURATION_BASE52 #define SCORE603E_PCI_PMC_DEVICE_BASE 0x8080800053 54 #define SCORE603E_PCI_REGISTER_BASE 0xfc00000055 56 #define SCORE603E_PCI_DEVICE_ADDRESS( _offset) \57 ((volatile rtems_unsigned32 *)( SCORE603E_PCI_PMC_DEVICE_BASE + _offset ))58 59 60 #define SCORE603E_PMC_SERIAL_ADDRESS( _offset ) \61 ((volatile rtems_unsigned8 *)( SCORE603E_PCI_REGISTER_BASE + _offset))50 #define BSP_PCI_CONFIGURATION_BASE 0x80800000 51 #define BSP_PMC_BASE BSP_PCI_CONFIGURATION_BASE 52 #define BSP_PCI_PMC_DEVICE_BASE 0x80808000 53 54 #define BSP_PCI_REGISTER_BASE 0xfc000000 55 56 #define BSP_PCI_DEVICE_ADDRESS( _offset) \ 57 ((volatile rtems_unsigned32 *)( BSP_PCI_PMC_DEVICE_BASE + _offset )) 58 59 60 #define BSP_PMC_SERIAL_ADDRESS( _offset ) \ 61 ((volatile rtems_unsigned8 *)(BSP_PCI_REGISTER_BASE + _offset)) 62 62 63 63 /* 64 64 * PMC serial channels - (4-7: 232 and 8-11: 422) 65 65 */ 66 #define SCORE603E_85C30_CTRL_4 SCORE603E_PMC_SERIAL_ADDRESS(0x200020)67 #define SCORE603E_85C30_DATA_4 SCORE603E_PMC_SERIAL_ADDRESS(0x200024)68 #define SCORE603E_85C30_CTRL_5 SCORE603E_PMC_SERIAL_ADDRESS(0x200028)69 #define SCORE603E_85C30_DATA_5 SCORE603E_PMC_SERIAL_ADDRESS(0x20002c)70 #define SCORE603E_85C30_CTRL_6 SCORE603E_PMC_SERIAL_ADDRESS(0x200030)71 #define SCORE603E_85C30_DATA_6 SCORE603E_PMC_SERIAL_ADDRESS(0x200034)72 #define SCORE603E_85C30_CTRL_7 SCORE603E_PMC_SERIAL_ADDRESS(0x200038)73 #define SCORE603E_85C30_DATA_7 SCORE603E_PMC_SERIAL_ADDRESS(0x20003c)74 #define SCORE603E_85C30_CTRL_8 SCORE603E_PMC_SERIAL_ADDRESS(0x200000)75 #define SCORE603E_85C30_DATA_8 SCORE603E_PMC_SERIAL_ADDRESS(0x200004)76 #define SCORE603E_85C30_CTRL_9 SCORE603E_PMC_SERIAL_ADDRESS(0x200008)77 #define SCORE603E_85C30_DATA_9 SCORE603E_PMC_SERIAL_ADDRESS(0x20000c)78 #define SCORE603E_85C30_CTRL_10 SCORE603E_PMC_SERIAL_ADDRESS(0x200010)79 #define SCORE603E_85C30_DATA_10 SCORE603E_PMC_SERIAL_ADDRESS(0x200014)80 #define SCORE603E_85C30_CTRL_11 SCORE603E_PMC_SERIAL_ADDRESS(0x200018)81 #define SCORE603E_85C30_DATA_11 SCORE603E_PMC_SERIAL_ADDRESS(0x20001c)66 #define SCORE603E_85C30_CTRL_4 BSP_PMC_SERIAL_ADDRESS(0x200020) 67 #define SCORE603E_85C30_DATA_4 BSP_PMC_SERIAL_ADDRESS(0x200024) 68 #define SCORE603E_85C30_CTRL_5 BSP_PMC_SERIAL_ADDRESS(0x200028) 69 #define SCORE603E_85C30_DATA_5 BSP_PMC_SERIAL_ADDRESS(0x20002c) 70 #define SCORE603E_85C30_CTRL_6 BSP_PMC_SERIAL_ADDRESS(0x200030) 71 #define SCORE603E_85C30_DATA_6 BSP_PMC_SERIAL_ADDRESS(0x200034) 72 #define SCORE603E_85C30_CTRL_7 BSP_PMC_SERIAL_ADDRESS(0x200038) 73 #define SCORE603E_85C30_DATA_7 BSP_PMC_SERIAL_ADDRESS(0x20003c) 74 #define SCORE603E_85C30_CTRL_8 BSP_PMC_SERIAL_ADDRESS(0x200000) 75 #define SCORE603E_85C30_DATA_8 BSP_PMC_SERIAL_ADDRESS(0x200004) 76 #define SCORE603E_85C30_CTRL_9 BSP_PMC_SERIAL_ADDRESS(0x200008) 77 #define SCORE603E_85C30_DATA_9 BSP_PMC_SERIAL_ADDRESS(0x20000c) 78 #define SCORE603E_85C30_CTRL_10 BSP_PMC_SERIAL_ADDRESS(0x200010) 79 #define SCORE603E_85C30_DATA_10 BSP_PMC_SERIAL_ADDRESS(0x200014) 80 #define SCORE603E_85C30_CTRL_11 BSP_PMC_SERIAL_ADDRESS(0x200018) 81 #define SCORE603E_85C30_DATA_11 BSP_PMC_SERIAL_ADDRESS(0x20001c) 82 82 83 83 #define SCORE603E_PCI_IO_CFG_ADDR 0x80000cf8 … … 86 86 #define SCORE603E_UNIVERSE_BASE 0x80030000 87 87 #define SCORE603E_IO_VME_UNIVERSE_BASE 0x80007000 88 #define SCORE603E_PCI_MEM_BASE 0xc000000089 #define SCORE603E_NVRAM_BASE 0xfd10000090 #define SCORE603E_RTC_ADDRESS ((volatile unsigned char *)0xfd180000)88 #define BSP_PCI_MEM_BASE 0xc0000000 89 #define BSP_NVRAM_BASE 0xfd100000 90 #define BSP_RTC_ADDRESS ((volatile unsigned char *)0xfd180000) 91 91 #define SCORE603E_JP1_JP2_PROM_BASE 0xfff00000 92 92 #define SCORE603E_NOT_JP1_2_FLASH_BASE 0xff800000 93 94 93 95 94 #if (SCORE603E_USE_SDS) | (SCORE603E_USE_OPEN_FIRMWARE) | (SCORE603E_USE_NONE) … … 98 97 #define SCORE603E_VME_A16_OFFSET 0x11000000 99 98 #define SCORE603E_VME_A24_OFFSET 0x10000000 100 #define SCORE603E_VME_A24_BASE (SCORE603E_PCI_MEM_BASE+SCORE603E_VME_A24_OFFSET)99 #define BSP_VME_A24_BASE (BSP_PCI_MEM_BASE+SCORE603E_VME_A24_OFFSET) 101 100 #else 102 101 #error "SCORE603E gen2.h -- what ROM monitor are you using" 103 102 #endif 104 103 105 #define SCORE603E_VME_A16_BASE (SCORE603E_PCI_MEM_BASE+SCORE603E_VME_A16_OFFSET)104 #define BSP_VME_A16_BASE (BSP_PCI_MEM_BASE+SCORE603E_VME_A16_OFFSET) 106 105 107 106 /* … … 116 115 #define ICM1770_CRYSTAL_FREQ_4M 0x03 117 116 118 #define SCORE_RTC_FREQUENCYICM1770_CRYSTAL_FREQ_32K117 #define BSP_RTC_FREQUENCY ICM1770_CRYSTAL_FREQ_32K 119 118 120 119 /* … … 159 158 * The PMC status word is at the PMC base address 160 159 */ 161 #define SCORE603E_PMC_STATUS_ADDRESS (SCORE603E_PMC_SERIAL_ADDRESS (0))160 #define BSP_PMC_STATUS_ADDRESS (BSP_PMC_SERIAL_ADDRESS (0)) 162 161 #define Is_PMC_85C30_4_IRQ( _status ) (_status & 0x80) /* SCC 422-1 */ 163 162 #define Is_PMC_85C30_2_IRQ( _status ) (_status & 0x40) /* SCC 232-1 */ … … 165 164 #define Is_PMC_85C30_3_IRQ( _status ) (_status & 0x08) /* SCC 232-2 */ 166 165 167 #define SCORE603E_PMC_CONTROL_ADDRESS SCORE603E_PMC_SERIAL_ADDRESS(0x100000)166 #define SCORE603E_PMC_CONTROL_ADDRESS BSP_PMC_SERIAL_ADDRESS(0x100000) 168 167 #define SCORE603E_PMC_SCC_232_LOOPBACK (_word) (_word|0x20) 169 168 -
c/src/lib/libbsp/powerpc/score603e/startup/FPGA.c
r64c3f79 r53923e8 116 116 rtems_unsigned16 status_word = irq; 117 117 118 status_word = (* SCORE603E_PMC_STATUS_ADDRESS);118 status_word = (*BSP_PMC_STATUS_ADDRESS); 119 119 120 120 return status_word; -
c/src/lib/libbsp/powerpc/score603e/startup/Hwr_init.c
r64c3f79 r53923e8 77 77 volatile Harris_RTC *the_RTC; 78 78 79 the_RTC = (volatile Harris_RTC *) SCORE603E_RTC_ADDRESS;79 the_RTC = (volatile Harris_RTC *)BSP_RTC_ADDRESS; 80 80 81 81 the_RTC->command_register = 0x0; -
c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c
r64c3f79 r53923e8 117 117 * set PMC base address. 118 118 */ 119 PMC_addr = SCORE603E_PCI_DEVICE_ADDRESS( 0x14 );120 *PMC_addr = ( SCORE603E_PCI_REGISTER_BASE >> 24) & 0x3f;119 PMC_addr = BSP_PCI_DEVICE_ADDRESS( 0x14 ); 120 *PMC_addr = (BSP_PCI_REGISTER_BASE >> 24) & 0x3f; 121 121 122 122 /* 123 123 * Clear status, enable SERR and memory space only. 124 124 */ 125 PMC_addr = SCORE603E_PCI_DEVICE_ADDRESS( 0x4 );125 PMC_addr = BSP_PCI_DEVICE_ADDRESS( 0x4 ); 126 126 *PMC_addr = 0x0201ff37; 127 127 … … 130 130 */ 131 131 PMC_addr = (volatile rtems_unsigned32 *) 132 SCORE603E_PMC_SERIAL_ADDRESS( 0x100000 );132 BSP_PMC_SERIAL_ADDRESS( 0x100000 ); 133 133 data = *PMC_addr; 134 134 /* *PMC_addr = data | 0x3; */ … … 143 143 * Clear status, enable SERR and memory space only. 144 144 */ 145 PMC_addr = SCORE603E_PCI_DEVICE_ADDRESS( 0x4 );145 PMC_addr = BSP_PCI_DEVICE_ADDRESS( 0x4 ); 146 146 *PMC_addr = 0x020080cc; 147 147 … … 149 149 * set PMC base address. 150 150 */ 151 PMC_addr = SCORE603E_PCI_DEVICE_ADDRESS( 0x14 );152 *PMC_addr = ( SCORE603E_PCI_REGISTER_BASE >> 24) & 0x3f;151 PMC_addr = BSP_PCI_DEVICE_ADDRESS( 0x14 ); 152 *PMC_addr = (BSP_PCI_REGISTER_BASE >> 24) & 0x3f; 153 153 154 154 PMC_addr = (volatile rtems_unsigned32 *) 155 SCORE603E_PMC_SERIAL_ADDRESS( 0x100000 );155 BSP_PMC_SERIAL_ADDRESS( 0x100000 ); 156 156 data = *PMC_addr; 157 157 *PMC_addr = data & 0xfc; -
c/src/lib/libbsp/powerpc/score603e/tod/tod.c
r64c3f79 r53923e8 44 44 rtems_time_of_day rtc_tod; 45 45 46 ICM7170_GetTOD( SCORE603E_RTC_ADDRESS, SCORE_RTC_FREQUENCY, &rtc_tod );46 ICM7170_GetTOD( BSP_RTC_ADDRESS, BSP_RTC_FREQUENCY, &rtc_tod ); 47 47 rtems_clock_set( &rtc_tod ); 48 48 } … … 53 53 54 54 rtems_clock_get( RTEMS_CLOCK_GET_TOD, &rtems_tod ); 55 ICM7170_SetTOD( SCORE603E_RTC_ADDRESS, SCORE_RTC_FREQUENCY, &rtems_tod );55 ICM7170_SetTOD( BSP_RTC_ADDRESS, BSP_RTC_FREQUENCY, &rtems_tod ); 56 56 } 57 57 … … 61 61 rtems_time_of_day rtc_tod; 62 62 63 ICM7170_GetTOD( SCORE603E_RTC_ADDRESS, SCORE_RTC_FREQUENCY, &rtc_tod );63 ICM7170_GetTOD( BSP_RTC_ADDRESS, BSP_RTC_FREQUENCY, &rtc_tod ); 64 64 rtems_clock_get( RTEMS_CLOCK_GET_TOD, &rtems_tod ); 65 65
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