Changeset 52d24b00 in rtems


Ignore:
Timestamp:
Nov 19, 2014, 1:29:27 PM (5 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
4.11, master
Children:
e492e7f8
Parents:
55741886
git-author:
Sebastian Huber <sebastian.huber@…> (11/19/14 13:29:27)
git-committer:
Sebastian Huber <sebastian.huber@…> (11/20/14 09:30:28)
Message:

bsps/arm: L2C 310 compile-time errata 753970

File:
1 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/arm/shared/arm-l2c-310/cache_.h

    r55741886 r52d24b00  
    9191
    9292/* RTL release number as can be read from cache_id register */
    93 typedef enum {
    94   L2C_310_RTL_RELEASE_R0_P0 = 0x0,
    95   L2C_310_RTL_RELEASE_R1_P0 = 0x2,
    96   L2C_310_RTL_RELEASE_R2_P0 = 0x4,
    97   L2C_310_RTL_RELEASE_R3_P0 = 0x5,
    98   L2C_310_RTL_RELEASE_R3_P1 = 0x6,
    99   L2C_310_RTL_RELEASE_R3_P2 = 0x8,
    100   L2C_310_RTL_RELEASE_R3_P3 = 0x9
    101 } l2c_310_rtl_release;
     93#define L2C_310_RTL_RELEASE_R0_P0 0x0
     94#define L2C_310_RTL_RELEASE_R1_P0 0x2
     95#define L2C_310_RTL_RELEASE_R2_P0 0x4
     96#define L2C_310_RTL_RELEASE_R3_P0 0x5
     97#define L2C_310_RTL_RELEASE_R3_P1 0x6
     98#define L2C_310_RTL_RELEASE_R3_P2 0x8
     99#define L2C_310_RTL_RELEASE_R3_P3 0x9
     100
     101#define BSP_ARM_L2C_310_RTL_RELEASE (BSP_ARM_L2C_310_ID & L2C_310_ID_RTL_MASK)
    102102
    103103/**
     
    480480*   r3 releases Software Developers Errata Notice"
    481481* Please see this document for more information on these erratas */
    482 static bool l2c_310_errata_is_applicable_753970(
    483   l2c_310_rtl_release rtl_release
     482#if BSP_ARM_L2C_310_RTL_RELEASE == L2C_310_RTL_RELEASE_R3_P0
     483#define L2C_310_ERRATA_IS_APPLICABLE_753970
     484#endif
     485
     486static bool l2c_310_errata_is_applicable_727913(
     487  uint32_t rtl_release
    484488)
    485489{
     
    506510}
    507511
    508 static bool l2c_310_errata_is_applicable_727913(
    509   l2c_310_rtl_release rtl_release
     512static bool l2c_310_errata_is_applicable_727914(
     513  uint32_t rtl_release
    510514)
    511515{
     
    532536}
    533537
    534 static bool l2c_310_errata_is_applicable_727914(
    535   l2c_310_rtl_release rtl_release
    536 )
    537 {
    538   bool is_applicable = false;
    539 
    540   switch ( rtl_release ) {
    541     case L2C_310_RTL_RELEASE_R3_P3:
    542     case L2C_310_RTL_RELEASE_R3_P2:
    543     case L2C_310_RTL_RELEASE_R3_P1:
    544     case L2C_310_RTL_RELEASE_R2_P0:
    545     case L2C_310_RTL_RELEASE_R1_P0:
    546     case L2C_310_RTL_RELEASE_R0_P0:
    547       is_applicable = false;
    548       break;
    549     case L2C_310_RTL_RELEASE_R3_P0:
    550       is_applicable = true;
    551       break;
    552     default:
    553       assert( 0 );
    554       break;
    555   }
    556 
    557   return is_applicable;
    558 }
    559 
    560538static bool l2c_310_errata_is_applicable_727915(
    561   l2c_310_rtl_release rtl_release
     539  uint32_t rtl_release
    562540)
    563541{
     
    585563
    586564static bool l2c_310_errata_is_applicable_729806(
    587   l2c_310_rtl_release rtl_release
     565  uint32_t rtl_release
    588566)
    589567{
     
    611589
    612590static bool l2c_310_errata_is_applicable_729815(
    613   l2c_310_rtl_release rtl_release
     591  uint32_t rtl_release
    614592)
    615593{
     
    637615
    638616static bool l2c_310_errata_is_applicable_742884(
    639   l2c_310_rtl_release rtl_release
     617  uint32_t rtl_release
    640618)
    641619{
     
    663641
    664642static bool l2c_310_errata_is_applicable_752271(
    665   l2c_310_rtl_release rtl_release
     643  uint32_t rtl_release
    666644)
    667645{
     
    689667
    690668static bool l2c_310_errata_is_applicable_765569(
    691   l2c_310_rtl_release rtl_release
     669  uint32_t rtl_release
    692670)
    693671{
     
    713691
    714692static bool l2c_310_errata_is_applicable_769419(
    715   l2c_310_rtl_release rtl_release
     693  uint32_t rtl_release
    716694)
    717695{
     
    739717
    740718static bool l2c_310_errata_is_applicable_588369(
    741   l2c_310_rtl_release rtl_release
     719  uint32_t rtl_release
    742720)
    743721{
     
    766744#ifdef CACHE_ERRATA_CHECKS_FOR_IMPLEMENTED_ERRATAS
    767745static bool l2c_310_errata_is_applicable_754670(
    768   l2c_310_rtl_release rtl_release
     746  uint32_t rtl_release
    769747)
    770748{
     
    798776  }                                                         \
    799777
    800 static void l2c_310_check_errata( l2c_310_rtl_release rtl_release )
     778static void l2c_310_check_errata( uint32_t rtl_release )
    801779{
    802780  /* This erratum gets handled within the sources */
     
    887865
    888866static inline void
    889 l2c_310_sync( void )
    890 {
    891   volatile L2CC *l2cc = (volatile L2CC *) BSP_ARM_L2C_310_BASE;
    892   l2c_310_rtl_release rtl_release =
    893     l2cc->cache_id & L2C_310_ID_RTL_MASK;
    894 
    895   if( l2c_310_errata_is_applicable_753970( rtl_release ) ) {
    896     l2cc->dummy_cache_sync_reg = 0;
    897   } else {
    898     l2cc->cache_sync           = 0;
    899   }
     867l2c_310_sync( volatile L2CC *l2cc )
     868{
     869#ifdef L2C_310_ERRATA_IS_APPLICABLE_753970
     870  l2cc->dummy_cache_sync_reg = 0;
     871#else
     872  l2cc->cache_sync = 0;
     873#endif
    900874}
    901875
     
    916890    */
    917891    l2cc->clean_pa     = (uint32_t) d_addr;
    918     l2c_310_sync();
     892    l2c_310_sync( l2cc );
    919893    l2cc->inv_pa       = (uint32_t) d_addr;
    920894  } else {
     
    935909    L2C_310_MIN( ADDR_LAST, adx + L2C_310_MAX_LOCKING_BYTES );
    936910  volatile L2CC *l2cc = (volatile L2CC *) BSP_ARM_L2C_310_BASE;
    937   l2c_310_rtl_release rtl_release =
     911  uint32_t rtl_release =
    938912    l2cc->cache_id & L2C_310_ID_RTL_MASK;
    939913  bool is_errata_588369_applicable =
     
    954928    }
    955929  }
    956   l2c_310_sync();
     930  l2c_310_sync( l2cc );
    957931  rtems_interrupt_lock_release( &l2c_310_lock, &lock_context );
    958932}
     
    976950
    977951    /* Wait for the flush to complete */
    978     l2c_310_sync();
     952    l2c_310_sync( l2cc );
    979953
    980954    rtems_interrupt_lock_release( &l2c_310_lock, &lock_context );
     
    989963
    990964  l2cc->inv_pa = (uint32_t) d_addr;
    991   l2c_310_sync();
     965  l2c_310_sync( l2cc );
    992966}
    993967
     
    1005979    l2cc->inv_pa = adx;
    1006980  }
    1007   l2c_310_sync();
     981  l2c_310_sync( l2cc );
    1008982  rtems_interrupt_lock_release( &l2c_310_lock, &lock_context );
    1009983}
     
    1024998
    1025999  /* Wait for the invalidate to complete */
    1026   l2c_310_sync();
     1000  l2c_310_sync( l2cc );
    10271001}
    10281002
     
    10451019
    10461020    /* Wait for the invalidate to complete */
    1047     l2c_310_sync();
     1021    l2c_310_sync( l2cc );
    10481022
    10491023    rtems_interrupt_lock_release( &l2c_310_lock, &lock_context );
     
    11411115#endif
    11421116
    1143 #if ((BSP_ARM_L2C_310_ID & L2C_310_ID_RTL_MASK) != 0x8) \
    1144   && ((BSP_ARM_L2C_310_ID & L2C_310_ID_RTL_MASK) != 0x9)
     1117#if (BSP_ARM_L2C_310_RTL_RELEASE != L2C_310_RTL_RELEASE_R3_P2) \
     1118  && (BSP_ARM_L2C_310_RTL_RELEASE != L2C_310_RTL_RELEASE_R3_P3)
    11451119#error "invalid L2-310 cache controller RTL revision"
    11461120#endif
     
    11511125  volatile L2CC *l2cc = (volatile L2CC *) BSP_ARM_L2C_310_BASE;
    11521126  uint32_t cache_id = l2cc->cache_id;
    1153   l2c_310_rtl_release rtl_release =
    1154     cache_id & L2C_310_ID_RTL_MASK;
    1155   uint32_t id_mask =
    1156     L2C_310_ID_IMPL_MASK | L2C_310_ID_PART_MASK;
     1127  uint32_t rtl_release = cache_id & L2C_310_ID_RTL_MASK;
     1128  uint32_t id_mask = L2C_310_ID_IMPL_MASK | L2C_310_ID_PART_MASK;
    11571129  uint32_t ctrl;
    11581130
     
    11631135  if (
    11641136    (BSP_ARM_L2C_310_ID & id_mask) != (cache_id & id_mask)
    1165       || rtl_release < (BSP_ARM_L2C_310_ID & L2C_310_ID_RTL_MASK)
     1137      || rtl_release < BSP_ARM_L2C_310_RTL_RELEASE
    11661138  ) {
    11671139    bsp_fatal( ARM_FATAL_L2C_310_UNEXPECTED_ID );
Note: See TracChangeset for help on using the changeset viewer.