Changeset 52cfc7de in rtems
- Timestamp:
- 04/22/04 13:04:07 (19 years ago)
- Branches:
- 4.10, 4.11, 4.8, 4.9, 5, master
- Children:
- 2ee14950
- Parents:
- 5e3745f
- Location:
- c/src/lib/libbsp/sh
- Files:
-
- 5 added
- 10 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libbsp/sh/gensh1/ChangeLog
r5e3745f r52cfc7de 1 2004-04-22 Ralf Corsepius <ralf_corsepius@rtems.org> 2 3 * include/bsp.h: Split out tmtest27 support. 4 * include/tm27.h: New. 5 1 6 2004-04-21 Ralf Corsepius <ralf_corsepius@rtems.org> 2 7 -
c/src/lib/libbsp/sh/gensh1/include/bsp.h
r5e3745f r52cfc7de 56 56 #endif 57 57 58 /*59 * Stuff for Time Test 2760 */61 62 #define MUST_WAIT_FOR_INTERRUPT 063 64 #define Install_tm27_vector( handler ) \65 { \66 rtems_isr_entry ignored ; \67 rtems_interrupt_catch( (handler), 0, &ignored ) ; \68 }69 70 #define Cause_tm27_intr()71 72 #define Clear_tm27_intr()73 74 #define Lower_tm27_intr()75 76 58 /* Constants */ 77 59 -
c/src/lib/libbsp/sh/gensh2/ChangeLog
r5e3745f r52cfc7de 1 2004-04-22 Ralf Corsepius <ralf_corsepius@rtems.org> 2 3 * include/bsp.h: Split out tmtest27 support. 4 * include/tm27.h: New. 5 1 6 2004-04-21 Ralf Corsepius <ralf_corsepius@rtems.org> 2 7 -
c/src/lib/libbsp/sh/gensh2/include/bsp.h
r5e3745f r52cfc7de 72 72 #endif 73 73 74 /*75 * Stuff for Time Test 2776 */77 78 #define MUST_WAIT_FOR_INTERRUPT 079 80 #define Install_tm27_vector( handler ) \81 { \82 rtems_isr_entry ignored ; \83 rtems_interrupt_catch( (handler), 0, &ignored ) ; \84 }85 86 #define Cause_tm27_intr()87 88 #define Clear_tm27_intr()89 90 #define Lower_tm27_intr()91 92 74 /* Constants */ 93 75 -
c/src/lib/libbsp/sh/gensh4/ChangeLog
r5e3745f r52cfc7de 1 2004-04-22 Ralf Corsepius <ralf_corsepius@rtems.org> 2 3 * include/bsp.h: Split out tmtest27 support. 4 * include/tm27.h: New. 5 1 6 2004-04-21 Ralf Corsepius <ralf_corsepius@rtems.org> 2 7 -
c/src/lib/libbsp/sh/gensh4/include/bsp.h
r5e3745f r52cfc7de 61 61 #define CONFIGURE_INTERRUPT_STACK_MEMORY (4 * 1024) 62 62 63 /*64 * Stuff for Time Test 2765 */66 67 #define MUST_WAIT_FOR_INTERRUPT 168 69 #ifndef SH7750_EVT_WDT_ITI70 # error "..."71 #endif72 73 #define Install_tm27_vector( handler ) \74 { \75 rtems_isr_entry old_handler; \76 rtems_status_code status; \77 status = rtems_interrupt_catch( (handler), \78 SH7750_EVT_TO_NUM(SH7750_EVT_WDT_ITI), &old_handler); \79 if (status != RTEMS_SUCCESSFUL) \80 printf("Status of rtems_interrupt_catch = %d", status); \81 }82 83 #define Cause_tm27_intr() \84 { \85 *(volatile uint16_t*)SH7750_IPRB |= 0xf000; \86 *(volatile uint16_t*)SH7750_WTCSR = SH7750_WTCSR_KEY; \87 *(volatile uint16_t*)SH7750_WTCNT = SH7750_WTCNT_KEY | 0xfe; \88 *(volatile uint16_t*)SH7750_WTCSR = \89 SH7750_WTCSR_KEY | SH7750_WTCSR_TME; \90 }91 92 #define Clear_tm27_intr() \93 { \94 *(volatile uint16_t*)SH7750_WTCSR = SH7750_WTCSR_KEY; \95 }96 97 #define Lower_tm27_intr() \98 { \99 sh_set_interrupt_level((SH7750_IPRB & 0xf000) << SH4_SR_IMASK_S); \100 }101 102 63 /* Constants */ 103 64 -
c/src/lib/libbsp/sh/shsim/ChangeLog
r5e3745f r52cfc7de 1 2004-04-22 Ralf Corsepius <ralf_corsepius@rtems.org> 2 3 * include/bsp.h: Split out tmtest27 support. 4 * include/tm27.h: New. 5 1 6 2004-04-21 Ralf Corsepius <ralf_corsepius@rtems.org> 2 7 -
c/src/lib/libbsp/sh/shsim/include/bsp.h
r5e3745f r52cfc7de 49 49 #include <gdbsci.h> 50 50 #include <rtems/devnull.h> 51 52 /*53 * Stuff for Time Test 2754 *55 * FIXME: This should not be here.56 */57 58 #define MUST_WAIT_FOR_INTERRUPT 059 60 #define Install_tm27_vector( handler )61 #define Cause_tm27_intr()62 #define Clear_tm27_intr()63 51 64 52 /* Constants */ -
c/src/lib/libbsp/sh/simsh4/ChangeLog
r5e3745f r52cfc7de 1 2004-04-22 Ralf Corsepius <ralf_corsepius@rtems.org> 2 3 * include/bsp.h: Split out tmtest27 support. 4 * include/tm27.h: New. 5 1 6 2004-04-21 Ralf Corsepius <ralf_corsepius@rtems.org> 2 7 -
c/src/lib/libbsp/sh/simsh4/include/bsp.h
r5e3745f r52cfc7de 65 65 #define CLOCK_VECTOR 32 66 66 67 /*68 * Stuff for Time Test 2769 */70 71 #define MUST_WAIT_FOR_INTERRUPT 072 73 #define Install_tm27_vector( handler ) \74 { \75 rtems_isr_entry ignored ; \76 rtems_interrupt_catch( (handler), 0, &ignored ) ; \77 }78 79 #define Cause_tm27_intr()80 81 #define Clear_tm27_intr()82 83 #define Lower_tm27_intr()84 85 67 /* Constants */ 86 68
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