Ignore:
Timestamp:
Jan 12, 2021, 1:03:41 PM (4 months ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
master
Children:
05da65c
Parents:
19acb3b
git-author:
Sebastian Huber <sebastian.huber@…> (01/12/21 13:03:41)
git-committer:
Sebastian Huber <sebastian.huber@…> (02/01/21 05:26:18)
Message:

nios2: Allow ISR nesting in dispatch variant

Rename _Nios2_ISR_Dispatch_with_shadow_non_preemptive() in
_Nios2_ISR_Dispatch_with_shadow_register_set(). Remove
_Nios2_ISR_Dispatch_with_shadow_preemptive().

File:
1 edited

Legend:

Unmodified
Added
Removed
  • cpukit/score/cpu/nios2/nios2-eic-il-low-level.S

    r19acb3b r51e59d5  
    4444        .extern _Nios2_ISR_Status_interrupts_disabled
    4545
    46         .globl  _Nios2_ISR_Dispatch_with_shadow_non_preemptive
    47 
    48 _Nios2_ISR_Dispatch_with_shadow_non_preemptive:
     46        .globl  _Nios2_ISR_Dispatch_with_shadow_register_set
     47
     48_Nios2_ISR_Dispatch_with_shadow_register_set:
    4949
    5050        /* Load thread dispatch disable level */
    5151        ldw     r16, %gprel(_Per_CPU_Information + PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL)(gp)
     52
     53        /* Read status */
     54        rdctl   r18, status
    5255
    5356        /* Load high level handler address and argument */
     
    5962        stw     r17, %gprel(_Per_CPU_Information + PER_CPU_THREAD_DISPATCH_DISABLE_LEVEL)(gp)
    6063
     64        /*
     65         * Enable higher level interrupts.  This is safe since status.RSIE is
     66         * always 0 and thread dispatching is disabled right above.  Higher
     67         * priority interrupts shall not share shadow register sets with lower
     68         * priority interrupts.
     69         */
     70        ori     r5, r18, 1
     71        wrctl   status, r5
     72
    6173        /* Call high level handler with argument */
    6274        callr   r8
     
    6779        /* Load the thread dispatch after ISR disable indicator */
    6880        ldw     r13, %gprel(_Per_CPU_Information + PER_CPU_ISR_DISPATCH_DISABLE)(gp)
    69 
    70         /* Read status */
    71         rdctl   r14, status
    7281
    7382        /* Fix return address */
     
    8594
    8695        /*
    87          * Get the previous register set from r14.  If it is zero, then this is
     96         * Get the previous register set from r18.  If it is zero, then this is
    8897         * the outermost interrupt.  Or it to the thread dispatch status (r15).
    8998         */
    90         andhi   r12, r14, 0x3f
     99        andhi   r12, r18, 0x3f
    91100        or      r15, r12, r15
    92101
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