Changeset 5134f172 in rtems


Ignore:
Timestamp:
Feb 11, 2011, 12:44:30 PM (9 years ago)
Author:
Ralf Corsepius <ralf.corsepius@…>
Branches:
4.11, master
Children:
0d01467b
Parents:
90b6801
Message:

2011-02-11 Ralf Corsépius <ralf.corsepius@…>

  • console/console.c, console/ns16550cfg.c, console/polled_io.c, include/bsp.h, include/tm27.h, startup/bspstart.c: Use "asm" instead of "asm" for improved c99-compliance.
Location:
c/src/lib/libbsp/powerpc/ep1a
Files:
7 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/powerpc/ep1a/ChangeLog

    r90b6801 r5134f172  
     12011-02-11      Ralf Corsépius <ralf.corsepius@rtems.org>
     2
     3        * console/console.c, console/ns16550cfg.c, console/polled_io.c,
     4        include/bsp.h, include/tm27.h, startup/bspstart.c:
     5        Use "__asm__" instead of "asm" for improved c99-compliance.
     6
    172011-02-02      Ralf Corsépius <ralf.corsepius@rtems.org>
    28
  • c/src/lib/libbsp/powerpc/ep1a/console/console.c

    r90b6801 r5134f172  
    260260  if ('\n'==c){
    261261     *ptr = '\r';
    262      asm volatile("sync");
     262     __asm__ volatile("sync");
    263263     for (i=0;i<0x0fff;i++);
    264264  }
    265265
    266266  *ptr = c;
    267   asm volatile("sync");
     267  __asm__ volatile("sync");
    268268  for (i=0;i<0x0fff;i++);
    269269}
  • c/src/lib/libbsp/powerpc/ep1a/console/ns16550cfg.c

    r90b6801 r5134f172  
    3030  uint8_t  ucData;
    3131  ucData = p[ucRegNum].reg;
    32   asm volatile("sync");
     32  __asm__ volatile("sync");
    3333  return ucData;
    3434}
     
    4343  volatile int i;
    4444  p[ucRegNum].reg = ucData;
    45   asm volatile("sync");
    46   asm volatile("isync");
    47   asm volatile("eieio");
     45  __asm__ volatile("sync");
     46  __asm__ volatile("isync");
     47  __asm__ volatile("eieio");
    4848  for (i=0;i<0x08ff;i++)
    49     asm volatile("isync");
     49    __asm__ volatile("isync");
    5050}
  • c/src/lib/libbsp/powerpc/ep1a/console/polled_io.c

    r90b6801 r5134f172  
    926926#define div10(num, rmd)                                                  \
    927927do {    u32 t1, t2, t3;                                                  \
    928         asm("lis %4,0xcccd; "                                            \
     928        __asm__ ("lis %4,0xcccd; "                                               \
    929929            "addi %4,%4,0xffffcccd; "   /* Build 0xcccccccd */           \
    930930            "mulhwu %3,%0+1,%4; "       /* (num.l*cst.l).h  */           \
  • c/src/lib/libbsp/powerpc/ep1a/include/bsp.h

    r90b6801 r5134f172  
    175175
    176176#define Processor_Synchronize() \
    177   asm(" eieio ")
     177  __asm__ (" eieio ")
    178178
    179179extern void BSP_panic(char *s);
  • c/src/lib/libbsp/powerpc/ep1a/include/tm27.h

    r90b6801 r5134f172  
    4040  do { \
    4141    uint32_t _clicks = 8; \
    42     asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
     42    __asm__ volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
    4343  } while (0)
    4444
     
    4747  do { \
    4848    uint32_t _clicks = 0xffffffff; \
    49     asm volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
     49    __asm__ volatile( "mtdec %0" : "=r" ((_clicks)) : "r" ((_clicks)) ); \
    5050   } while (0)
    5151
     
    5454    uint32_t _msr = 0; \
    5555    _ISR_Set_level( 0 ); \
    56     asm volatile( "mfmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
     56    __asm__ volatile( "mfmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
    5757    _msr |=  0x8002; \
    58     asm volatile( "mtmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
     58    __asm__ volatile( "mtmsr %0 ;" : "=r" (_msr) : "r" (_msr) ); \
    5959  } while (0)
    6060#endif
  • c/src/lib/libbsp/powerpc/ep1a/startup/bspstart.c

    r90b6801 r5134f172  
    185185  register int a, e;
    186186
    187   asm volatile( "lis %0,0xfec0; ori  %0,%0,0x0000": "=r" (a) );
    188   asm volatile("sync");
    189 
    190   asm volatile("lis %0,0x8000; ori %0,%0,0x0078": "=r"(e) );
    191   asm volatile("stwbrx  %0,0x0,%1": "=r"(e): "r"(a));
    192   asm volatile("sync");
    193 
    194   asm volatile("lis %0,0xfee0; ori %0,%0,0x0000": "=r" (a) );
    195   asm volatile("sync");
    196 
    197   asm volatile("lwbrx %0,0x0,%1": "=r" (e): "r" (a));
    198   asm volatile("isync");
     187  __asm__ volatile( "lis %0,0xfec0; ori  %0,%0,0x0000": "=r" (a) );
     188  __asm__ volatile("sync");
     189
     190  __asm__ volatile("lis %0,0x8000; ori %0,%0,0x0078": "=r"(e) );
     191  __asm__ volatile("stwbrx  %0,0x0,%1": "=r"(e): "r"(a));
     192  __asm__ volatile("sync");
     193
     194  __asm__ volatile("lis %0,0xfee0; ori %0,%0,0x0000": "=r" (a) );
     195  __asm__ volatile("sync");
     196
     197  __asm__ volatile("lwbrx %0,0x0,%1": "=r" (e): "r" (a));
     198  __asm__ volatile("isync");
    199199  return e;
    200200}
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