Changeset 511dc4b in rtems for bsps/arm/gumstix


Ignore:
Timestamp:
Jun 19, 2018, 7:09:51 AM (20 months ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
master
Children:
9e3bb45
Parents:
715d616
git-author:
Sebastian Huber <sebastian.huber@…> (06/19/18 07:09:51)
git-committer:
Sebastian Huber <sebastian.huber@…> (06/27/18 06:58:16)
Message:

Rework initialization and interrupt stack support

Statically initialize the interrupt stack area
(_Configuration_Interrupt_stack_area_begin,
_Configuration_Interrupt_stack_area_end, and
_Configuration_Interrupt_stack_size) via <rtems/confdefs.h>. Place the
interrupt stack area in a special section ".rtemsstack.interrupt". Let
BSPs define the optimal placement of this section in their linker
command files (e.g. in a fast on-chip memory).

This change makes makes the CPU_HAS_SOFTWARE_INTERRUPT_STACK and
CPU_HAS_HARDWARE_INTERRUPT_STACK CPU port defines superfluous, since the
low level initialization code has all information available via global
symbols.

This change makes the CPU_ALLOCATE_INTERRUPT_STACK CPU port define
superfluous, since the interrupt stacks are allocated by confdefs.h for
all architectures. There is no need for BSP-specific linker command
file magic (except the section placement), see previous ARM linker
command file as a bad example.

Remove _CPU_Install_interrupt_stack(). Initialize the hardware
interrupt stack in _CPU_Initialize() if necessary (e.g.
m68k_install_interrupt_stack()).

The optional _CPU_Interrupt_stack_setup() is still useful to customize
the registration of the interrupt stack area in the per-CPU information.

The initialization stack can reuse the interrupt stack, since

  • interrupts are disabled during the sequential system initialization, and
  • the boot_card() function does not return.

This stack resuse saves memory.

Changes per architecture:

arm:

  • Mostly replace the linker symbol based configuration of stacks with the standard <rtems/confdefs.h> configuration via CONFIGURE_INTERRUPT_STACK_SIZE. The size of the FIQ, ABT and UND mode stack is still defined via linker symbols. These modes are rarely used in applications and the default values provided by the BSP should be sufficient in most cases.
  • Remove the bsp_processor_count linker symbol hack used for the SMP support. This is possible since the interrupt stack area is now allocated by the linker and not allocated from the heap. This makes some configure.ac stuff obsolete. Remove the now superfluous BSP variants altcycv_devkit_smp and realview_pbx_a9_qemu_smp.

bfin:

  • Remove unused magic linker command file allocation of initialization stack. Maybe a previous linker command file copy and paste problem? In the start.S the initialization stack is set to a hard coded value.

lm32, m32c, mips, nios2, riscv, sh, v850:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.

m68k:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.

powerpc:

  • Remove magic linker command file allocation of initialization stack. Reuse interrupt stack for initialization stack.
  • Used dedicated memory region (REGION_RTEMSSTACK) for the interrupt stack on BSPs using the shared linkcmds.base (replacement for REGION_RWEXTRA).

sparc:

  • Remove the hard coded initialization stack. Use the interrupt stack for the initialization stack on the boot processor. This saves 16KiB of RAM.

Update #3459.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • bsps/arm/gumstix/start/start.S

    r715d616 r511dc4b  
    88 */
    99
    10 #include <bsp/linker-symbols.h>
    11 
    12 /* Some standard definitions...*/
    13 .equ PSR_MODE_USR,       0x10
    14 .equ PSR_MODE_FIQ,       0x11
    15 .equ PSR_MODE_IRQ,       0x12
    16 .equ PSR_MODE_SVC,       0x13
    17 .equ PSR_MODE_ABT,       0x17
    18 .equ PSR_MODE_UNDEF,     0x1B
    19 .equ PSR_MODE_SYS,       0x1F
    20 
    21 .equ PSR_I,              0x80
    22 .equ PSR_F,              0x40
    23 .equ PSR_T,              0x20
     10#include <rtems/asm.h>
     11#include <rtems/score/cpu.h>
    2412
    2513.text
     
    2917         * Since I don't plan to return to the bootloader,
    3018         * I don't have to save the registers.
    31          *
    32          * I'll just set the CPSR for SVC mode, interrupts
    33          * off, and ARM instructions.
    3419         */
    35         mov     r0, #(PSR_MODE_SVC | PSR_I | PSR_F)
     20
     21        /* Set end of interrupt stack area */
     22        ldr     r7, =_Configuration_Interrupt_stack_area_end
     23
     24        /* Enter FIQ mode and set up the FIQ stack pointer */
     25        mov     r0, #(ARM_PSR_M_FIQ | ARM_PSR_I | ARM_PSR_F)
    3626        msr     cpsr, r0
     27        ldr     r1, =bsp_stack_fiq_size
     28        mov     sp, r7
     29        sub     r7, r7, r1
    3730
     31        /* Enter ABT mode and set up the ABT stack pointer */
     32        mov     r0, #(ARM_PSR_M_ABT | ARM_PSR_I | ARM_PSR_F)
     33        msr     cpsr, r0
     34        ldr     r1, =bsp_stack_abt_size
     35        mov     sp, r7
     36        sub     r7, r7, r1
     37
     38        /* Enter UND mode and set up the UND stack pointer */
     39        mov     r0, #(ARM_PSR_M_UND | ARM_PSR_I | ARM_PSR_F)
     40        msr     cpsr, r0
     41        ldr     r1, =bsp_stack_und_size
     42        mov     sp, r7
     43        sub     r7, r7, r1
     44
     45        /* Enter IRQ mode and set up the IRQ stack pointer */
     46        mov     r0, #(ARM_PSR_M_IRQ | ARM_PSR_I | ARM_PSR_F)
     47        msr     cpsr, r0
     48        mov     sp, r7
     49
     50        /*
     51         * Enter SVC mode and set up the SVC stack pointer, reuse IRQ stack
     52         * (interrupts are disabled).
     53         */
     54        mov     r0, #(ARM_PSR_M_SVC | ARM_PSR_I | ARM_PSR_F)
     55        msr     cpsr, r0
     56        mov     sp, r7
     57
     58        /* Stay in SVC mode */
    3859
    3960        /* zero the bss */
     
    4667        strlot  r2, [r0], #4
    4768        blo     _bss_init        /* loop while r0 < r1 */
    48 
    49         /* --- Initialize stack pointer registers */
    50         /* Enter IRQ mode and set up the IRQ stack pointer */
    51         mov     r0, #(PSR_MODE_IRQ | PSR_I | PSR_F)     /* No interrupts */
    52         msr     cpsr, r0
    53         ldr     r1, =bsp_stack_irq_size
    54         ldr     sp, =bsp_stack_irq_begin
    55         add     sp, sp, r1
    56 
    57         /* Enter FIQ mode and set up the FIQ stack pointer */
    58         mov     r0, #(PSR_MODE_FIQ | PSR_I | PSR_F)     /* No interrupts */
    59         msr     cpsr, r0
    60         ldr     r1, =bsp_stack_fiq_size
    61         ldr     sp, =bsp_stack_fiq_begin
    62         add     sp, sp, r1
    63 
    64         /* Enter ABT mode and set up the ABT stack pointer */
    65         mov     r0, #(PSR_MODE_ABT | PSR_I | PSR_F)     /* No interrupts */
    66         msr     cpsr, r0
    67         ldr     r1, =bsp_stack_abt_size
    68         ldr     sp, =bsp_stack_abt_begin
    69         add     sp, sp, r1
    70 
    71         /* Set up the SVC stack pointer last and stay in SVC mode */
    72         mov     r0, #(PSR_MODE_SVC | PSR_I | PSR_F)     /* No interrupts */
    73         msr     cpsr, r0
    74         ldr     r1, =bsp_stack_und_size
    75         ldr     sp, =bsp_stack_und_begin
    76         add     sp, sp, r1
    77         sub     sp, sp, #0x64
    7869
    7970        /*
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