Changeset 509fec9c in rtems
- Timestamp:
- 03/31/04 11:18:37 (20 years ago)
- Branches:
- 4.10, 4.11, 4.8, 4.9, 5, master
- Children:
- 04d13bc
- Parents:
- e75cef9
- Location:
- c/src
- Files:
-
- 16 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/ChangeLog
re75cef9 r509fec9c 1 2004-03-31 Ralf Corsepius <ralf_corsepius@rtems.org> 2 3 * libchip/ide/ata.c, libchip/network/dec21140.c, 4 libchip/network/elnk.c, libchip/network/i82586.c, 5 libchip/network/if_fxp.c, libchip/network/if_fxpvar.h, 6 libchip/network/open_eth.c, libchip/network/sonic.c, 7 libchip/rtc/icm7170.c, libchip/serial/ns16550.c, 8 libchip/serial/z85c30.c, libchip/shmdr/cnvpkt.c, 9 libchip/shmdr/init.c, libchip/shmdr/intr.c, 10 libchip/shmdr/shm_driver.h: Cosmetics. 11 1 12 2004-03-31 Ralf Corsepius <ralf_corsepius@rtems.org> 2 13 -
c/src/libchip/ide/ata.c
re75cef9 r509fec9c 218 218 if (ATA_DEV_INFO(ctrl_minor, dev).lba_avaible) 219 219 { 220 areq->regs.regs[IDE_REGISTER_LBA0] = (uint8_t 221 areq->regs.regs[IDE_REGISTER_LBA1] = (uint8_t 222 areq->regs.regs[IDE_REGISTER_LBA2] = (uint8_t 223 areq->regs.regs[IDE_REGISTER_LBA3] |= (uint8_t 220 areq->regs.regs[IDE_REGISTER_LBA0] = (uint8_t)req->start; 221 areq->regs.regs[IDE_REGISTER_LBA1] = (uint8_t)(req->start >> 8); 222 areq->regs.regs[IDE_REGISTER_LBA2] = (uint8_t)(req->start >> 16); 223 areq->regs.regs[IDE_REGISTER_LBA3] |= (uint8_t) (req->start >> 24); 224 224 areq->regs.regs[IDE_REGISTER_LBA3] |= IDE_REGISTER_LBA3_L; 225 225 } … … 238 238 /* now count = number of cylinders */ 239 239 count %= ATA_DEV_INFO(ctrl_minor, dev).cylinders; 240 areq->regs.regs[IDE_REGISTER_CYLINDER_LOW] = (uint8_t 241 areq->regs.regs[IDE_REGISTER_CYLINDER_HIGH] = (uint8_t 240 areq->regs.regs[IDE_REGISTER_CYLINDER_LOW] = (uint8_t)count; 241 areq->regs.regs[IDE_REGISTER_CYLINDER_HIGH] = (uint8_t)(count >> 8); 242 242 areq->regs.regs[IDE_REGISTER_DEVICE_HEAD] &= 243 243 ~IDE_REGISTER_DEVICE_HEAD_L; … … 313 313 areq->regs.to_write |= 314 314 ATA_REGISTERS_VALUE(IDE_REGISTER_SECTOR_COUNT); 315 areq->regs.regs[IDE_REGISTER_SECTOR_COUNT] = *(uint8_t 315 areq->regs.regs[IDE_REGISTER_SECTOR_COUNT] = *(uint8_t*)argp; 316 316 break; 317 317 … … 357 357 case ATAIO_SET_MULTIPLE_MODE: 358 358 ATA_DEV_INFO(ctrl_minor, dev).current_multiple = 359 *(uint8_t 359 *(uint8_t*)argp; 360 360 break; 361 361 … … 963 963 } 964 964 965 buffer = (uint16_t 965 buffer = (uint16_t*)malloc(ATA_SECTOR_SIZE); 966 966 if (buffer == NULL) 967 967 { … … 1148 1148 (CF_LE_W(buffer[ATA_IDENT_WORD_CAPABILITIES]) >> 9) & 0x1; 1149 1149 ATA_DEV_INFO(ctrl_minor, dev).max_multiple = 1150 (uint8_t 1150 (uint8_t) (CF_LE_W(buffer[ATA_IDENT_WORD_RW_MULT])); 1151 1151 ATA_DEV_INFO(ctrl_minor, dev).current_multiple = 1152 1152 (CF_LE_W(buffer[ATA_IDENT_WORD_MULT_SECS]) & 0x100) ? 1153 (uint8_t 1153 (uint8_t)(CF_LE_W(buffer[ATA_IDENT_WORD_MULT_SECS])) : 1154 1154 0; 1155 1155 -
c/src/libchip/network/dec21140.c
re75cef9 r509fec9c 429 429 uint32_t status; 430 430 431 tbase = (uint32_t 431 tbase = (uint32_t*)(sc->base); 432 432 433 433 /* … … 1191 1191 pci_write_config_word(pbus, pdev, pfun, 1192 1192 PCI_COMMAND, 1193 (uint16_t 1193 (uint16_t) ( PCI_COMMAND_MEMORY | 1194 1194 PCI_COMMAND_MASTER | 1195 1195 PCI_COMMAND_INVALIDATE | -
c/src/libchip/network/elnk.c
re75cef9 r509fec9c 1381 1381 break; 1382 1382 word = CSR_READ_2(sc, XL_W0_EE_DATA); 1383 ptr = (u_int16_t 1383 ptr = (u_int16_t*)(dest + (i * 2)); 1384 1384 if (swap) 1385 1385 *ptr = ntohs(word); … … 2133 2133 for(i=0 ; i<sc->numRxbuffers; i++) 2134 2134 { 2135 if( ((uint32_t 2135 if( ((uint32_t)&sc->rx_ring[i] & 0x7) ) 2136 2136 { 2137 2137 rtems_panic ("etherlink : unit elnk%d rx ring entry %d not aligned to 8 bytes\n", sc->xl_unit, i ); … … 2152 2152 2153 2153 st_le32( &sc->rx_ring[i].status, 0); 2154 st_le32( &sc->rx_ring[i].next, (uint32_t 2155 st_le32( &sc->rx_ring[i].addr, (uint32_t 2154 st_le32( &sc->rx_ring[i].next, (uint32_t)phys_to_bus( nxtmd )); 2155 st_le32( &sc->rx_ring[i].addr, (uint32_t)phys_to_bus( mtod(m, void *) )); 2156 2156 st_le32( &sc->rx_ring[i].length, XL_LAST_FRAG | XL_PACKET_SIZE ); 2157 2157 } … … 2182 2182 for(i=0 ; i<sc->numTxbuffers; i++) 2183 2183 { 2184 if( ((uint32_t 2184 if( ((uint32_t)&sc->tx_ring[i] & 0x7) ) 2185 2185 { 2186 2186 rtems_panic ("etherlink : unit elnk%d tx ring entry %d not aligned to 8 bytes\n", sc->xl_unit, i ); … … 2328 2328 rmd->mbuf = m; 2329 2329 st_le32( &rmd->status, 0 ); 2330 st_le32( &rmd->addr, (uint32_t 2330 st_le32( &rmd->addr, (uint32_t)phys_to_bus(mtod(m, void *)) ); 2331 2331 } 2332 2332 else … … 2476 2476 { 2477 2477 st_le32( &nextmd->txfrags[i].length, ((m->m_next)?0:XL_LAST_FRAG) | ( m->m_len & XL_TXSTAT_LENMASK) ); 2478 st_le32( &nextmd->txfrags[i].addr, (uint32_t 2478 st_le32( &nextmd->txfrags[i].addr, (uint32_t)phys_to_bus( m->m_data ) ); 2479 2479 if ((m = m->m_next) == NULL) 2480 2480 break; … … 2492 2492 char *pkt = bus_to_phys( ld_le32( &nextmd->txfrags[i].addr )), *delim; 2493 2493 int i; 2494 printk("unit %d queued pkt (%08x) ", sc->xl_unit, (uint32_t 2494 printk("unit %d queued pkt (%08x) ", sc->xl_unit, (uint32_t)pkt ); 2495 2495 for(delim="", i=0; i < sizeof(struct ether_header); i++, delim=":") 2496 2496 printk("%s%02x", delim, (char) pkt[i] ); … … 2523 2523 { 2524 2524 /* hook this packet to the previous one */ 2525 st_le32( &lastmd->next, (uint32_t 2525 st_le32( &lastmd->next, (uint32_t)phys_to_bus( nextmd )); 2526 2526 } 2527 2527 … … 2575 2575 sc->xl_unit, 2576 2576 chainCount, 2577 (uint32_t 2577 (uint32_t)ld_le32( &lastmd->status) ); 2578 2578 #endif 2579 2579 … … 3330 3330 pci_write_config_word(pbus, pdev, pfun, 3331 3331 PCI_COMMAND, 3332 (uint16_t 3332 (uint16_t)( PCI_COMMAND_IO | 3333 3333 PCI_COMMAND_MASTER | 3334 3334 PCI_COMMAND_INVALIDATE | … … 3341 3341 &lvalue); 3342 3342 3343 sc->ioaddr = (uint32_t 3343 sc->ioaddr = (uint32_t)lvalue & PCI_BASE_ADDRESS_IO_MASK; 3344 3344 /* 3345 3345 ** Store the interrupt name, we'll use it later when we initialize -
c/src/libchip/network/i82586.c
re75cef9 r509fec9c 198 198 static int ie_readframe (struct ie_softc *, int); 199 199 static struct mbuf *ieget (struct ie_softc *, int, int); 200 static int i82586_get_rbd_list (struct ie_softc *, u_int16_t 201 u_int16_t 200 static int i82586_get_rbd_list (struct ie_softc *, u_int16_t*, 201 u_int16_t*, int *); 202 202 static void i82586_release_rbd_list (struct ie_softc *, 203 203 u_int16_t, u_int16_t); -
c/src/libchip/network/if_fxp.c
re75cef9 r509fec9c 274 274 *dst = *src; 275 275 #else 276 volatile u_int16_t *a = (volatile u_int16_t 277 volatile u_int16_t *b = (volatile u_int16_t 276 volatile u_int16_t *a = (volatile u_int16_t*)src; 277 volatile u_int16_t *b = (volatile u_int16_t*)dst; 278 278 279 279 b[0] = a[0]; … … 291 291 } 292 292 else { 293 val = *(u_int8_t 293 val = *(u_int8_t*)(sc->pci_regs_base+reg); 294 294 } 295 295 return val; … … 301 301 } 302 302 else { 303 val = *(u_int16_t 303 val = *(u_int16_t*)(sc->pci_regs_base+reg); 304 304 } 305 305 return val; … … 311 311 } 312 312 else { 313 val = *(u_int32_t 313 val = *(u_int32_t*)(sc->pci_regs_base+reg); 314 314 } 315 315 return val; … … 754 754 * Read MAC address. 755 755 */ 756 fxp_read_eeprom(sc, (u_int16_t 756 fxp_read_eeprom(sc, (u_int16_t*)sc->arpcom.ac_enaddr, 0, 3); 757 757 if (fxp_is_verbose) { 758 758 device_printf(dev, "Ethernet address %x:%x:%x:%x:%x:%x %s \n", 759 ((u_int8_t 760 ((u_int8_t 761 ((u_int8_t 762 ((u_int8_t 763 ((u_int8_t 764 ((u_int8_t 759 ((u_int8_t*)sc->arpcom.ac_enaddr)[0], 760 ((u_int8_t*)sc->arpcom.ac_enaddr)[1], 761 ((u_int8_t*)sc->arpcom.ac_enaddr)[2], 762 ((u_int8_t*)sc->arpcom.ac_enaddr)[3], 763 ((u_int8_t*)sc->arpcom.ac_enaddr)[4], 764 ((u_int8_t*)sc->arpcom.ac_enaddr)[5], 765 765 sc->flags & FXP_FLAG_SERIAL_MEDIA ? ", 10Mbps" : ""); 766 766 device_printf(dev, "PCI IDs: 0x%x 0x%x 0x%x 0x%x 0x%x\n", … … 1725 1725 * way to initialize them all to proper values. 1726 1726 */ 1727 memcpy( (void *)(u_int32_t 1727 memcpy( (void *)(u_int32_t*)(volatile void *)&cbp->cb_status, 1728 1728 fxp_cb_config_template, 1729 1729 sizeof(fxp_cb_config_template)); … … 1831 1831 cb_ias->cb_command = FXP_CB_COMMAND_IAS | FXP_CB_COMMAND_EL; 1832 1832 cb_ias->link_addr = -1; 1833 memcpy((void *)(u_int32_t 1833 memcpy((void *)(u_int32_t*)(volatile void *)cb_ias->macaddr, 1834 1834 sc->arpcom.ac_enaddr, 1835 1835 sizeof(sc->arpcom.ac_enaddr)); … … 2025 2025 2026 2026 v = -1; 2027 fxp_lwcopy(&v, (volatile u_int32_t 2028 fxp_lwcopy(&v, (volatile u_int32_t 2027 fxp_lwcopy(&v, (volatile u_int32_t*) rfa->link_addr); 2028 fxp_lwcopy(&v, (volatile u_int32_t*) rfa->rbd_addr); 2029 2029 2030 2030 /* … … 2037 2037 sc->rfa_tailm->m_next = m; 2038 2038 v = vtophys(rfa); 2039 fxp_lwcopy(&v, (volatile u_int32_t 2039 fxp_lwcopy(&v, (volatile u_int32_t*) p_rfa->link_addr); 2040 2040 p_rfa->rfa_control = 0; 2041 2041 } else { -
c/src/libchip/network/if_fxpvar.h
re75cef9 r509fec9c 176 176 outport_byte((sc)->pci_regs_base+(reg),val); \ 177 177 else \ 178 *((u_int8_t 178 *((u_int8_t*)((sc)->pci_regs_base)+(reg)) = val; \ 179 179 }while (0) 180 180 … … 184 184 outport_word((sc)->pci_regs_base+(reg),val); \ 185 185 else \ 186 *((u_int16_t *)((u_int8_t*)((sc)->pci_regs_base)+(reg))) = val; \186 *((u_int16_t*)((u_int8_t*)((sc)->pci_regs_base)+(reg))) = val; \ 187 187 }while (0) 188 188 … … 192 192 outport_long((sc)->pci_regs_base+(reg),val); \ 193 193 else \ 194 *((u_int32_t *)((u_int8_t*)((sc)->pci_regs_base)+(reg))) = val; \194 *((u_int32_t*)((u_int8_t*)((sc)->pci_regs_base)+(reg))) = val; \ 195 195 }while (0) 196 196 -
c/src/libchip/network/open_eth.c
re75cef9 r509fec9c 301 301 m->m_pkthdr.rcvif = &sc->arpcom.ac_if; 302 302 sc->rxdesc[i].m = m; 303 sc->regs->xd[i + sc->txbufs].addr = mtod (m, uint32_t 303 sc->regs->xd[i + sc->txbufs].addr = mtod (m, uint32_t*); 304 304 sc->regs->xd[i + sc->txbufs].len_status = 305 305 OETH_RX_BD_EMPTY | OETH_RX_BD_IRQ; … … 419 419 dp->rxdesc[dp->rx_ptr].m = m; 420 420 dp->regs->xd[dp->rx_ptr + dp->txbufs].addr = 421 (uint32_t 421 (uint32_t*) mtod (m, void *); 422 422 dp->rxPackets++; 423 423 } … … 459 459 len = 0; 460 460 temp = (unsigned char *) dp->txdesc[dp->tx_ptr].buf; 461 dp->regs->xd[dp->tx_ptr].addr = (uint32_t 461 dp->regs->xd[dp->tx_ptr].addr = (uint32_t*) temp; 462 462 463 463 #ifdef OPEN_ETH_DEBUG -
c/src/libchip/network/sonic.c
re75cef9 r509fec9c 59 59 */ 60 60 61 void *set_vector(void *, uint32_t , uint32_t);61 void *set_vector(void *, uint32_t, uint32_t); 62 62 63 63 #if (SONIC_DEBUG & SONIC_DEBUG_DUMP_MBUFS) … … 117 117 * Macros for manipulating 32-bit pointers as 16-bit fragments 118 118 */ 119 #define LSW(p) ((uint16_t )((uint32_t)(p)))120 #define MSW(p) ((uint16_t )((uint32_t)(p) >> 16))121 #define PTR(m,l) ((void*)(((uint16_t )(m)<<16)|(uint16_t)(l)))119 #define LSW(p) ((uint16_t)((uint32_t)(p))) 120 #define MSW(p) ((uint16_t)((uint32_t)(p) >> 16)) 121 #define PTR(m,l) ((void*)(((uint16_t)(m)<<16)|(uint16_t)(l))) 122 122 123 123 /* … … 986 986 m = rdp->mbufp; 987 987 m->m_len = m->m_pkthdr.len = rdp->byte_count - 988 sizeof(uint32_t 988 sizeof(uint32_t) - 989 989 sizeof(struct ether_header); 990 990 eh = mtod (m, struct ether_header *); -
c/src/libchip/rtc/icm7170.c
re75cef9 r509fec9c 53 53 */ 54 54 55 clock = (uint32_t 55 clock = (uint32_t) RTC_Table[ minor ].pDeviceParams; 56 56 (*setReg)( icm7170, ICM7170_CONTROL, 0x0c | clock ); 57 57 } … … 128 128 getReg = RTC_Table[ minor ].getRegister; 129 129 setReg = RTC_Table[ minor ].setRegister; 130 clock = (uint32_t 130 clock = (uint32_t) RTC_Table[ minor ].pDeviceParams; 131 131 132 132 year = time->year; -
c/src/libchip/serial/ns16550.c
re75cef9 r509fec9c 104 104 105 105 ulBaudDivisor = NS16550_Baud( 106 (uint32_t 107 (uint32_t 106 (uint32_t) Console_Port_Tbl[minor].ulClock, 107 (uint32_t) Console_Port_Tbl[minor].pDeviceParams 108 108 ); 109 109 ucDataByte = SP_LINE_DLAB; … … 368 368 369 369 ulBaudDivisor = NS16550_Baud( 370 (uint32_t 370 (uint32_t) Console_Port_Tbl[minor].ulClock, 371 371 termios_baud_to_number(baud_requested) 372 372 ); -
c/src/libchip/serial/z85c30.c
re75cef9 r509fec9c 138 138 139 139 ulBaudDivisor = Z85C30_Baud( 140 (uint32_t 141 (uint32_t 140 (uint32_t) Console_Port_Tbl[minor].ulClock, 141 (uint32_t) Console_Port_Tbl[minor].pDeviceParams 142 142 ); 143 143 … … 452 452 453 453 ulBaudDivisor = Z85C30_Baud( 454 (uint32_t 455 (uint32_t 454 (uint32_t) Console_Port_Tbl[minor].ulClock, 455 (uint32_t) termios_baud_to_number( baud_requested ) 456 456 ); 457 457 -
c/src/libchip/shmdr/cnvpkt.c
re75cef9 r509fec9c 33 33 uint32_t *pkt, i; 34 34 35 pkt = (uint32_t 35 pkt = (uint32_t*) packet; 36 36 for ( i=RTEMS_MINIMUN_HETERO_CONVERSION ; i ; i--, pkt++ ) 37 37 *pkt = CPU_swap_u32( *pkt ); -
c/src/libchip/shmdr/init.c
re75cef9 r509fec9c 123 123 124 124 interrupt_address = 125 (void *) Shm_Convert( (uint32_t 125 (void *) Shm_Convert( (uint32_t)Shm_Configuration->Intr.address ); 126 126 interrupt_value = Shm_Convert( Shm_Configuration->Intr.value ); 127 127 interrupt_cause = Shm_Convert( Shm_Configuration->Intr.length ); … … 173 173 */ 174 174 175 Shm_Local_node_status->int_address = (uint32_t 175 Shm_Local_node_status->int_address = (uint32_t) interrupt_address; 176 176 Shm_Local_node_status->int_value = interrupt_value; 177 177 Shm_Local_node_status->int_length = interrupt_cause; … … 221 221 222 222 Shm_Local_node_status->int_address = 223 (uint32_t 223 (uint32_t) interrupt_address; 224 224 Shm_Local_node_status->int_value = interrupt_value; 225 225 Shm_Local_node_status->int_length = interrupt_cause; -
c/src/libchip/shmdr/intr.c
re75cef9 r509fec9c 43 43 break; 44 44 case BYTE: 45 u8 = (uint8_t 46 *u8 = (uint8_t 45 u8 = (uint8_t*)intr->address; 46 *u8 = (uint8_t) value; 47 47 break; 48 48 case WORD: 49 u16 = (uint16_t 50 *u16 = (uint16_t 49 u16 = (uint16_t*)intr->address; 50 *u16 = (uint16_t) value; 51 51 break; 52 52 case LONG: 53 u32 = (uint32_t 54 *u32 = (uint32_t 53 u32 = (uint32_t*)intr->address; 54 *u32 = (uint32_t) value; 55 55 break; 56 56 } -
c/src/libchip/shmdr/shm_driver.h
re75cef9 r509fec9c 255 255 256 256 #define Shm_Packet_prefix_to_envelope_control_pointer( pkt ) \ 257 ((Shm_Envelope_control *)((uint8_t 257 ((Shm_Envelope_control *)((uint8_t*)(pkt) - \ 258 258 (sizeof(Shm_Envelope_preamble) + SHM_ENVELOPE_PREFIX_OVERHEAD))) 259 259 … … 426 426 vol_u32 (*convert)();/* neutral conversion routine */ 427 427 vol_u32 poll_intr;/* POLLED or INTR driven mode */ 428 void (*cause_intr)( uint32_t 428 void (*cause_intr)( uint32_t); 429 429 Shm_Interrupt_information Intr; /* cause intr information */ 430 430 }; … … 473 473 Shm_Envelope_control *Shm_Locked_queue_Get( Shm_Locked_queue_Control * ); 474 474 void Shm_Locked_queue_Initialize( 475 Shm_Locked_queue_Control *, uint32_t 475 Shm_Locked_queue_Control *, uint32_t); 476 476 /* Shm_Initialize_lock is CPU dependent */ 477 477 /* Shm_Lock is CPU dependent */ … … 481 481 void Init_env_pool(); 482 482 void Shm_Print_statistics( void ); 483 void MPCI_Fatal( Internal_errors_Source, boolean, uint32_t 484 rtems_task Shm_Cause_interrupt( uint32_t 483 void MPCI_Fatal( Internal_errors_Source, boolean, uint32_t); 484 rtems_task Shm_Cause_interrupt( uint32_t); 485 485 void Shm_Poll(); 486 486 void Shm_setclockvec(); … … 491 491 /* target specific routines */ 492 492 void *Shm_Convert_address( void * ); 493 void Shm_Get_configuration( uint32_t 493 void Shm_Get_configuration( uint32_t, shm_config_table ** ); 494 494 void Shm_isr(); 495 495 void Shm_setvec( void ); … … 515 515 516 516 rtems_mpci_entry Shm_Send_packet( 517 uint32_t 517 uint32_t, 518 518 rtems_packet_prefix * 519 519 );
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