Changeset 502609c8 in rtems
- Timestamp:
- 11/21/14 17:15:22 (9 years ago)
- Branches:
- 4.11, 5, master
- Children:
- ff1c613
- Parents:
- ed4c556
- git-author:
- Nigel Spon <nigel@…> (11/21/14 17:15:22)
- git-committer:
- Joel Sherrill <joel.sherrill@…> (11/21/14 19:47:42)
- Location:
- c/src/lib
- Files:
-
- 4 added
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
c/src/lib/libbsp/powerpc/haleakala/Makefile.am
red4c556 r502609c8 8 8 9 9 include_HEADERS = include/bsp.h 10 include_HEADERS += include/mmu_405.h 10 11 include_HEADERS += ../../shared/include/tm27.h 11 12 … … 31 32 ../../shared/bsppredriverhook.c ../../shared/bspgetworkarea.c \ 32 33 ../../shared/bsppretaskinghook.c ../../shared/sbrk.c \ 33 ../../shared/gnatinstallhandler.c 34 ../../shared/gnatinstallhandler.c mmu/mmu_405.c mmu/mmu_405asm.S 34 35 35 36 # dlentry … … 48 49 libbsp_a_SOURCES += irq/irq_init.c irq/irq.c 49 50 51 if HAS_NETWORKING 52 network_CPPFLAGS = -D__INSIDE_RTEMS_BSD_TCPIP_STACK__ 53 noinst_PROGRAMS = network.rel 54 network_rel_SOURCES = network/network.c 55 network_rel_CPPFLAGS = $(AM_CPPFLAGS) $(network_CPPFLAGS) 56 network_rel_LDFLAGS = $(RTEMS_RELLDFLAGS) 57 endif 58 50 59 libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \ 51 60 ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \ … … 56 65 ../../../libcpu/@RTEMS_CPU@/ppc403/timer.rel 57 66 67 if HAS_NETWORKING 68 libbsp_a_LIBADD += network.rel 69 endif 70 58 71 include $(srcdir)/preinstall.am 59 72 include $(top_srcdir)/../../../../automake/local.am -
c/src/lib/libbsp/powerpc/haleakala/configure.ac
red4c556 r502609c8 15 15 16 16 RTEMS_CHECK_NETWORKING 17 18 17 AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes") 19 18 -
c/src/lib/libbsp/powerpc/haleakala/preinstall.am
red4c556 r502609c8 42 42 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h 43 43 44 $(PROJECT_INCLUDE)/mmu_405.h: include/mmu_405.h $(PROJECT_INCLUDE)/$(dirstamp) 45 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/mmu_405.h 46 PREINSTALL_FILES += $(PROJECT_INCLUDE)/mmu_405.h 47 44 48 $(PROJECT_INCLUDE)/tm27.h: ../../shared/include/tm27.h $(PROJECT_INCLUDE)/$(dirstamp) 45 49 $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/tm27.h -
c/src/lib/libcpu/powerpc/ppc403/include/ppc405ex.h
red4c556 r502609c8 79 79 80 80 enum { 81 SDR0_PINSTP = 0x40, 81 82 SDR0_UART0 = 0x120, 82 83 SDR0_UART1 = 0x121, 83 84 SDR0_C405 = 0x180, 85 SDR0_SRST0 = 0x200, 84 86 SDR0_MALTBL = 0x280, 85 87 SDR0_MALRBL = 0x2A0, 86 88 SDR0_MALTBS = 0x2C0, 87 SDR0_MALRBS = 0x2E0 89 SDR0_MALRBS = 0x2E0, 90 SDR0_PFC2 = 0x4102, 91 SDR0_MFR = 0x4300, 92 SDR0_EMAC0RXST = 0x4301, 93 SDR0_HSF = 0x4400 88 94 }; 89 95 96 enum { 97 CPR0_CLKUPD = 0x20, 98 CPR0_PLLC = 0x40, 99 CPR0_PLLD = 0x60, 100 CPR0_CPUD = 0x80, 101 CPR0_PLBD = 0xA0, 102 CPR0_OPBD = 0xC0, 103 CPR0_PERD = 0xE0, 104 CPR0_AHBD = 0x100, 105 CPR0_ICFG = 0x140 106 }; 90 107 91 108 /* Memory-mapped registers */ … … 94 111 /*======================= Ethernet =================== */ 95 112 113 enum { 114 EMAC0EXAddress = 0xEF600900, 115 EMAC1EXAddress = 0xEF600A00, 116 117 /* 405EX-specific bits in EMAC_MR1 */ 118 keEMAC1000Mbps = 0x00800000, 119 keEMAC16KRxFIFO = 0x00280000, 120 keEMAC8KRxFIFO = 0x00200000, 121 keEMAC4KRxFIFO = 0x00180000, 122 keEMAC2KRxFIFO = 0x00100000, 123 keEMAC1KRxFIFO = 0x00080000, 124 keEMAC16KTxFIFO = 0x00050000, 125 keEMAC8KTxFIFO = 0x00040000, 126 keEMAC4KTxFIFO = 0x00030000, 127 keEMAC2KTxFIFO = 0x00020000, 128 keEMAC1KTxFIFO = 0x00010000, 129 keEMACJumbo = 0x00000800, 130 keEMACIPHYAddr4 = 0x180, 131 keEMACOPB50MHz = 0x00, 132 keEMACOPB66MHz = 0x08, 133 keEMACOPB83MHz = 0x10, 134 keEMACOPB100MHz = 0x18, 135 keEMACOPBGt100 = 0x20, 136 137 /* 405EX-specific bits in MAL0_CFG */ 138 keMALRdMaxBurst4 = 0, 139 keMALRdMaxBurst8 = 0x00100000, 140 keMALRdMaxBurst16 = 0x00200000, 141 keMALRdMaxBurst32 = 0x00300000, 142 143 keMALWrLowPriority = 0, 144 keMALWrMedLowPriority = 0x00040000, 145 keMALWrMedHiPriority = 0x00080000, 146 keMALWrHighPriority = 0x000C0000, 96 147 97 typedef struct EthernetRegisters_EX { 98 uint32_t mode0; 99 uint32_t mode1; 100 uint32_t xmtMode0; 101 uint32_t xmtMode1; 102 uint32_t rcvMode; 103 uint32_t intStatus; 104 uint32_t intEnable; 105 uint32_t addrHi; 106 uint32_t addrLo; 107 uint32_t VLANTPID; 108 uint32_t VLANTCI; 109 uint32_t pauseTimer; 110 uint32_t multicastAddr[2]; 111 uint32_t multicastMask[2]; 112 uint32_t unused[4]; 113 uint32_t lastSrcLo; 114 uint32_t lastSrcHi; 115 uint32_t IPGap; 116 uint32_t STAcontrol; 117 uint32_t xmtReqThreshold; 118 uint32_t rcvWatermark; 119 uint32_t bytesXmtd; 120 uint32_t bytesRcvd; 121 uint32_t unused2; 122 uint32_t revID; 123 uint32_t unused3[2]; 124 uint32_t indivHash[8]; 125 uint32_t groupHash[8]; 126 uint32_t xmtPause; 127 } EthernetRegisters_EX; 128 129 enum { 130 EMAC0Address = 0xEF600900, 131 EMAC1Address = 0xEF600A00 148 keMALWrMaxBurst4 = 0, 149 keMALWrMaxBurst8 = 0x00010000, 150 keMALWrMaxBurst16 = 0x00020000, 151 keMALWrMaxBurst32 = 0x00030000, 152 153 /* 405EX-specific STA bits */ 154 keSTARun = 0x8000, 155 keSTADirectRd = 0x1000, 156 keSTADirectWr = 0x0800, 157 keSTAIndirAddr = 0x2000, 158 keSTAIndirRd = 0x3000, 159 keSTAIndirWr = 0x2800 132 160 }; 133 134 161 135 162 typedef struct GPIORegisters { … … 156 183 enum { GPIOAddress = 0xEF600800 }; 157 184 185 typedef struct RGMIIRegisters { 186 uint32_t FER; 187 uint32_t SSR; 188 } RGMIIRegisters; 189 190 enum { RGMIIAddress = 0xEF600B00 }; 191 -
c/src/lib/libcpu/powerpc/ppc403/include/ppc405gp.h
red4c556 r502609c8 37 37 }; 38 38 39 /* MAL DCRs, have to be #defines */ 40 #define MAL0_CFG 0x180 41 #define MAL0_ESR 0x181 42 #define MAL0_IER 0x182 43 #define MAL0_TXCASR 0x184 44 #define MAL0_TXCARR 0x185 45 #define MAL0_TXEOBISR 0x186 46 #define MAL0_TXDEIR 0x187 47 #define MAL0_RXCASR 0x190 48 #define MAL0_RXCARR 0x191 49 #define MAL0_RXEOBISR 0x192 50 #define MAL0_RXDEIR 0x193 51 #define MAL0_TXCTP0R 0x1A0 52 #define MAL0_TXCTP1R 0x1A1 53 #define MAL0_RXCTP0R 0x1C0 54 #define MAL0_RXCTP1R 0x1C1 55 #define MAL0_RCBS0 0x1E0 56 #define MAL0_RCBS1 0x1E1 57 39 58 /* Memory-mapped registers */ 40 59 … … 52 71 uint32_t VLANTCI; 53 72 uint32_t pauseTimer; 54 uint32_t indivHash[4];55 uint32_t g roupHash[4];73 uint32_t g_indivHash[4]; /* EX non-IP multicast addr/mask */ 74 uint32_t g_groupHash[4]; 56 75 uint32_t lastSrcLo; 57 76 uint32_t lastSrcHi; … … 59 78 uint32_t STAcontrol; 60 79 uint32_t xmtReqThreshold; 61 uint32_t rcvWatermark ;80 uint32_t rcvWatermarks; 62 81 uint32_t bytesXmtd; 63 82 uint32_t bytesRcvd; 83 uint32_t e_unused2; 84 uint32_t e_revID; 85 uint32_t e_unused3[2]; 86 uint32_t e_indivHash[8]; 87 uint32_t e_groupHash[8]; 88 uint32_t e_xmtPause; 64 89 } EthernetRegisters_GP; 65 90 91 typedef struct EthernetRegisters_GP EthernetRegisters_EX; 92 66 93 enum { EMACAddress = 0xEF600800 }; 94 enum { EMAC0GPAddress = 0xEF600800 }; 67 95 68 96 enum { … … 76 104 // Mode 1 bits 77 105 kEMACFullDuplex = 0x80000000, 106 kEMACDoFlowControl = 0x10000000, 78 107 kEMACIgnoreSQE = 0x01000000, 79 108 kEMAC100MBbps = 0x00400000, … … 82 111 kEMACTx0Multi = 0x00008000, 83 112 kEMACTxDependent= 0x00014000, 113 kEMAC100Mbps = 0x00400000, 114 kgEMAC4KRxFIFO = 0x00300000, 115 kgEMAC2KTxFIFO = 0x00080000, 116 kgEMACTx0Multi = 0x00008000, 117 kgEMACTxDependent= 0x00014000, 118 84 119 85 120 // Tx mode bits … … 99 134 kEMACBrcastRcv = 0x00100000, 100 135 kEMACMultcastRcv = 0x00080000, 136 keEMACNonIPMultcast = 0x00040000, 137 keEMACRxFIFOAFMax = 7, 138 139 // EMAC_STACR bits 140 kgSTAComplete = 0x8000, 141 kSTAErr = 0x4000, 142 143 // Interrupt status bits 144 kEMACIOverrun = 0x02000000, 145 kEMACIPause = 0x01000000, 146 kEMACIBadPkt = 0x00800000, 147 kEMACIRuntPkt = 0x00400000, 148 kEMACIShortEvt= 0x00200000, 149 kEMACIAlignErr= 0x00100000, 150 kEMACIBadFCS = 0x00080000, 151 kEMACIOverSize= 0x00040000, 152 kEMACILLCRange= 0x00020000, 153 kEMACISQEErr = 0x00000080, 154 kEMACITxErr = 0x00000040, 101 155 102 156 // Buffer descriptor control bits … … 108 162 kMALRxFirst = 0x0800, 109 163 kMALInterrupt = 0x0400, 164 165 kMALReset = 0x80000000, 166 kMALLowPriority = 0, 167 kMALMedLowPriority = 0x00400000, 168 kMALMedHiPriority = 0x00800000, 169 kMALHighPriority = 0x00C00000, 170 kMALLatency8 = 0x00040000, 171 kMALLockErr = 0x8000, 172 kMALCanBurst = 0x4000, 173 kMALLocksOPB = 0x80, 174 kMALLocksErrs = 0x2, 175 176 // MAL channel masks 177 kMALChannel0 = 0x80000000, 178 kMALChannel1 = 0x40000000, 110 179 111 180 // EMAC Tx descriptor bits sent
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