Changeset 4fea054c in rtems
- Timestamp:
- 11/06/18 18:34:15 (5 years ago)
- Branches:
- 5, master
- Children:
- a9767a07
- Parents:
- ff081aee
- git-author:
- Sebastian Huber <sebastian.huber@…> (11/06/18 18:34:15)
- git-committer:
- Sebastian Huber <sebastian.huber@…> (11/08/18 07:09:25)
- Files:
-
- 1 deleted
- 11 edited
Legend:
- Unmodified
- Added
- Removed
-
bsps/mips/shared/irq/exception.S
rff081aee r4fea054c 373 373 /* 374 374 * prepare to get out of interrupt 375 * return from interrupt (maybe to _ISR_Dispatch)375 * return from interrupt 376 376 * 377 377 * LABEL "exit interrupt (simple case):" -
cpukit/Makefile.am
rff081aee r4fea054c 1600 1600 librtemscpu_a_SOURCES += score/cpu/m32c/context_init.c 1601 1601 librtemscpu_a_SOURCES += score/cpu/m32c/context_switch.S 1602 librtemscpu_a_SOURCES += score/cpu/m32c/cpu_asm.c1603 1602 librtemscpu_a_SOURCES += score/cpu/m32c/cpu.c 1604 1603 librtemscpu_a_SOURCES += score/cpu/m32c/m32c-exception-frame-print.c -
cpukit/include/rtems/score/isr.h
rff081aee r4fea054c 147 147 148 148 /** 149 * @brief ISR wrapper for thread dispatcher.150 *151 * This routine provides a wrapper so that the routine152 * @ref _Thread_Dispatch can be invoked when a reschedule is necessary153 * at the end of the outermost interrupt service routine. This154 * wrapper is necessary to establish the processor context needed155 * by _Thread_Dispatch and to save the processor context which is156 * corrupted by _Thread_Dispatch. This context typically consists157 * of registers which are not preserved across routine invocations.158 *159 * @note Typically mplemented in assembly language.160 */161 void _ISR_Dispatch( void );162 163 /**164 149 * @brief Checks if an ISR in progress. 165 150 * -
cpukit/score/cpu/m68k/cpu_asm.S
rff081aee r4fea054c 325 325 movec msp,a0 | a0 = master stack pointer 326 326 movew #0,a0@- | push format word 327 movel # SYM(_ISR_Dispatch),a0@-| push return addr327 movel #thread_dispatch,a0@- | push return addr 328 328 movew a0@(6),a0@- | push saved sr 329 329 movec a0,msp | set master stack pointer … … 345 345 | OR _Isr_dispatch 346 346 347 /*void _ISR_Dispatch()348 347 #if ( M68K_HAS_SEPARATE_STACKS == 1 ) 348 /* 349 349 * Entry point from the outermost interrupt service routine exit. 350 350 * The current stack is the supervisor mode stack if this processor … … 358 358 */ 359 359 360 .global SYM (_ISR_Dispatch) 361 SYM (_ISR_Dispatch): 360 thread_dispatch: 362 361 #if ( !defined(__mcoldfire__) ) 363 362 movml d0-d1/a0-a1,a7@- … … 376 375 #endif /* M68K_HAS_VBR */ 377 376 rte 377 #endif /* M68K_HAS_SEPARATE_STACKS */ -
cpukit/score/cpu/mips/cpu_asm.S
rff081aee r4fea054c 1050 1050 /* 1051 1051 * prepare to get out of interrupt 1052 * return from interrupt (maybe to _ISR_Dispatch)1052 * return from interrupt 1053 1053 * 1054 1054 * LABEL "exit interrupt (simple case):" -
cpukit/score/cpu/moxie/cpu_asm.S
rff081aee r4fea054c 88 88 89 89 90 /*91 Called from ISR_Handler as a way of ending IRQ92 but allowing dispatch to another task.93 Must use RTE as CCR is still on stack but IRQ has been serviced.94 CCR and PC occupy same word so rte can be used.95 now using task stack96 */97 98 .align 299 .global SYM(_ISR_Dispatch)100 101 SYM(_ISR_Dispatch):102 brk103 104 105 90 .align 2 106 91 .global SYM(_CPU_Context_save_fp) -
cpukit/score/cpu/no_cpu/cpu_asm.c
rff081aee r4fea054c 172 172 * 173 173 * if ( _Thread_Dispatch_necessary ) { 174 * call _Thread_Dispatch() or prepare to return to _ISR_Dispatch174 * call _Thread_Dispatch() or prepare to return from interrupt 175 175 * prepare to get out of interrupt 176 * return from interrupt (maybe to _ISR_Dispatch)176 * return from interrupt 177 177 * 178 178 * LABEL "exit interrupt (simple case): -
cpukit/score/cpu/sparc/cpu.c
rff081aee r4fea054c 413 413 /* 414 414 * Since THIS thread is being created, there is no way that THIS 415 * thread can have an _ISR_Dispatchstack frame on its stack.416 */ 417 415 * thread can have an interrupt stack frame on its stack. 416 */ 417 the_context->isr_dispatch_disable = 0; 418 418 419 419 if ( tls_area != NULL ) { -
cpukit/score/cpu/sparc64/cpu.c
rff081aee r4fea054c 61 61 * Since no tasks have been created yet and no interrupts have occurred, 62 62 * there is no way that the currently executing thread can have an 63 * _ISR_Dispatchstack frame on its stack.63 * interrupt stack frame on its stack. 64 64 */ 65 65 _CPU_ISR_Dispatch_disable = 0; … … 101 101 /* 102 102 * Since THIS thread is being created, there is no way that THIS 103 * thread can have an _ISR_Dispatchstack frame on its stack.103 * thread can have an interrupt stack frame on its stack. 104 104 */ 105 105 the_context->isr_dispatch_disable = 0; -
cpukit/score/cpu/sparc64/include/rtems/score/cpu.h
rff081aee r4fea054c 488 488 /* 489 489 * This flag is context switched with each thread. It indicates 490 * that THIS thread has an _ISR_Dispatchstack frame on its stack.490 * that THIS thread has an interrupt stack frame on its stack. 491 491 * By using this flag, we can avoid nesting more interrupt dispatching 492 492 * attempts on a previously interrupted thread's stack. -
cpukit/score/cpu/sparc64/interrupt.S
rff081aee r4fea054c 351 351 * Invoke interrupt dispatcher. 352 352 */ 353 PUBLIC(_ISR_Dispatch) 354 SYM(_ISR_Dispatch): 353 355 354 ! Set ISR dispatch nesting prevention flag 356 355 mov 1, %o1
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