Index: c/src/lib/libbsp/powerpc/tqm8xx/ChangeLog
===================================================================
--- c/src/lib/libbsp/powerpc/tqm8xx/ChangeLog	(revision 978eba36bfbd8f82827e89db83196d3b7dfc9912)
+++ c/src/lib/libbsp/powerpc/tqm8xx/ChangeLog	(revision 4d6ad9e2add10045fc85a165e99ff9152714cc3f)
@@ -1,2 +1,13 @@
+2008-10-01	Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
+
+	* Makefile.am: switch to DEC clock driver, add U-Boot support
+	* configure.ac: add U-Boot support
+	* console/console.c: add U-Boot support, remove dead code, adjust clock
+	routing
+	* include/bsp.h: add U-Boot support
+	* irq/irq.c: fix CPIC interrupt code
+	* network/network_fec.c, network/network_scc.c: add U-Boot support
+	* startup/bspstart.c, startup/start.S: add U-Boot support
+
 2008-09-30	Joel Sherrill <joel.sherrill@oarcorp.com>
 
Index: c/src/lib/libbsp/powerpc/tqm8xx/Makefile.am
===================================================================
--- c/src/lib/libbsp/powerpc/tqm8xx/Makefile.am	(revision 978eba36bfbd8f82827e89db83196d3b7dfc9912)
+++ c/src/lib/libbsp/powerpc/tqm8xx/Makefile.am	(revision 4d6ad9e2add10045fc85a165e99ff9152714cc3f)
@@ -23,5 +23,6 @@
 include_bsp_HEADERS = include/tqm.h include/8xx_immap.h \
     include/irq.h include/irq-config.h \
-    ../../shared/include/irq-generic.h\
+	../shared/include/u-boot.h     \
+    ../../shared/include/irq-generic.h \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h \
     ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h
@@ -47,6 +48,5 @@
 	../../shared/src/irq-legacy.c
 
-# clock_SOURCES = ../shared/clock/clock.c
-p_clock_SOURCES = clock/p_clock.c
+clock_SOURCES = ../shared/clock/clock.c
 
 console_SOURCES = console/console.c
@@ -69,5 +69,5 @@
 libbsp_a_SOURCES = $(irq_SOURCES) \
     $(startup_SOURCES) $(console_SOURCES) \
-    $(p_clock_SOURCES) $(timer_SOURCES)
+    $(clock_SOURCES) $(timer_SOURCES)
 
 libbsp_a_LIBADD = \
@@ -79,5 +79,4 @@
     ../../../libcpu/@RTEMS_CPU@/mpc8xx/console-generic.rel \
     ../../../libcpu/@RTEMS_CPU@/mpc8xx/cpm.rel \
-    ../../../libcpu/@RTEMS_CPU@/mpc8xx/clock.rel \
     ../../../libcpu/@RTEMS_CPU@/mpc8xx/mmu.rel \
     ../../../libcpu/@RTEMS_CPU@/mpc8xx/timer.rel
Index: c/src/lib/libbsp/powerpc/tqm8xx/configure.ac
===================================================================
--- c/src/lib/libbsp/powerpc/tqm8xx/configure.ac	(revision 978eba36bfbd8f82827e89db83196d3b7dfc9912)
+++ c/src/lib/libbsp/powerpc/tqm8xx/configure.ac	(revision 4d6ad9e2add10045fc85a165e99ff9152714cc3f)
@@ -103,4 +103,8 @@
  for 10MBit networking.])
 
+RTEMS_BSPOPTS_SET([BSP_HAS_UBOOT],[*],[0])
+RTEMS_BSPOPTS_HELP([BSP_HAS_UBOOT],
+[If defined, then the BSP assumes it is booted via U-Boot (not TQMon)])
+
 
 # Explicitly list a Makefile here 
Index: c/src/lib/libbsp/powerpc/tqm8xx/console/console.c
===================================================================
--- c/src/lib/libbsp/powerpc/tqm8xx/console/console.c	(revision 978eba36bfbd8f82827e89db83196d3b7dfc9912)
+++ c/src/lib/libbsp/powerpc/tqm8xx/console/console.c	(revision 4d6ad9e2add10045fc85a165e99ff9152714cc3f)
@@ -275,25 +275,5 @@
     scc_brg_state[brg_idx].link_cnt    = 0;
   }
-#ifndef MDE360
-  /*
-   * on ZEM40, init CLK4/5 inputs
-   */
-  m8xx.papar |=  ((1 << 11) | (1 << 12));
-  m8xx.padir &= ~((1 << 11) | (1 << 12));
-#endif
-}
-
-/*
- * input clock frq for CPM clock inputs
- */
-static uint32_t clkin_frq[2][4] = {
-#ifdef MDE360
-  {0,0,0,0},
-  {0,0,0,0}
-#else
-  {0,0,0,1843000},
-  {1843000,0,0,0}
-#endif
-};
+}
 
 /*
@@ -311,27 +291,8 @@
   int new_brg = -1;
   int brg_idx;
-#if 0 /* we do not support external clocked console */
-  int clk_group;
-  int clk_sel;
-#endif
 
   old_brg = chan_desc->brg_used;
   /* compute brg register contents needed */
   reg_val = sccBRGval(baud);
-
-#if 0 /* we do not support external clocked console */
-  /* search for clock input with this frq */
-  clk_group = ((chan == CONS_CHN_SCC3) ||
-	       (chan == CONS_CHN_SCC4) ||
-	       (chan == CONS_CHN_SMC2)) ? 1 : 0;
-
-  for (clk_sel = 0, new_brg = -1;
-       (clk_sel < 4) && (new_brg < 0);
-       clk_sel++) {
-    if (baud == (clkin_frq[clk_group][clk_sel] / 16)) {
-      new_brg = clk_sel + 4;
-    }
-  }
-#endif
 
   rtems_interrupt_disable(level);  
@@ -393,6 +354,7 @@
     else {
       /* connect SMC to BRGx or CLKx... */
-      m8xx.simode = ((m8xx.simode & ~(M8xx_SIMODE_SMCCS_MSK(chan - CONS_CHN_SMC1)))|
-		     M8xx_SIMODE_SMCCS(chan - CONS_CHN_SMC1,new_brg));
+      m8xx.simode = ((m8xx.simode 
+		      & ~(M8xx_SIMODE_SMCCS_MSK(chan - CONS_CHN_SMC1)))
+		     | M8xx_SIMODE_SMCCS(chan - CONS_CHN_SMC1,new_brg));
     }
   }
@@ -650,6 +612,9 @@
    * allocate and connect BRG 
    */
+#if defined(BSP_HAS_UBOOT)
+  sccBRGalloc(chan,mpc8xx_uboot_board_info.bi_baudrate);
+#else
   sccBRGalloc(chan,9600);
-  
+#endif
   
   /*
@@ -686,5 +651,5 @@
     }
     sccFrstRxBd[chan][i].length = 0;
-    sccFrstRxBd[chan][i].buffer = rxBuf[chan][i];
+    sccFrstRxBd[chan][i].buffer = (*rxBuf[chan])[i];
   }
   /*
@@ -998,4 +963,8 @@
     sccttyp[chan] = args->iop->data1;
   }
+#if defined(BSP_HAS_UBOOT)  
+  rtems_termios_set_initial_baud(sccttyp[chan],
+				 mpc8xx_uboot_board_info.bi_baudrate);
+#endif
   return status;
 }
Index: c/src/lib/libbsp/powerpc/tqm8xx/include/bsp.h
===================================================================
--- c/src/lib/libbsp/powerpc/tqm8xx/include/bsp.h	(revision 978eba36bfbd8f82827e89db83196d3b7dfc9912)
+++ c/src/lib/libbsp/powerpc/tqm8xx/include/bsp.h	(revision 4d6ad9e2add10045fc85a165e99ff9152714cc3f)
@@ -41,9 +41,4 @@
 #define _BSP_H
 
-/*
- * indicate, that BSP is booted via TQMMon
- */
-#define BSP_HAS_TQMMON
-
 LINKER_SYMBOL(TopRamReserved);
 
@@ -74,10 +69,22 @@
 LINKER_SYMBOL( bsp_work_area_start);
 
+/*
+ * NOTE: start.S also needs to know, whether we use U-Boot
+ */
+#include <bspopts.h>
+/*
+ * indicate, that BSP is booted via TQMMon
+ * (unless we use U-Boot)
+ */
+#if !defined(BSP_HAS_UBOOT)
+#define BSP_HAS_TQMMON
+
+#include <bsp/tqm.h>
+#endif
+
 #ifndef ASM
 #ifdef __cplusplus
 extern "C" {
 #endif
-
-#include <bspopts.h>
 
 #include <rtems.h>
@@ -89,6 +96,16 @@
 #include <mpc8xx/console.h>
 #include <bsp/vectors.h>
-#include <bsp/tqm.h>
 #include <libcpu/powerpc-utility.h> 
+
+
+#ifdef BSP_HAS_TQMMON
+#endif
+
+#ifdef BSP_HAS_UBOOT
+#define CONFIG_8xx  /* select the proper U-Boot configuration */
+#include <bsp/u-boot.h>
+extern bd_t mpc8xx_uboot_board_info;
+extern const size_t mpc8xx_uboot_board_info_size;
+#endif /* BSP_HAS_UBOOT */
 
 /*
Index: c/src/lib/libbsp/powerpc/tqm8xx/irq/irq.c
===================================================================
--- c/src/lib/libbsp/powerpc/tqm8xx/irq/irq.c	(revision 978eba36bfbd8f82827e89db83196d3b7dfc9912)
+++ c/src/lib/libbsp/powerpc/tqm8xx/irq/irq.c	(revision 4d6ad9e2add10045fc85a165e99ff9152714cc3f)
@@ -55,5 +55,5 @@
 {
   rtems_vector_number vecnum = irqnum - BSP_CPM_IRQ_LOWEST_OFFSET;
-  m8xx.cimr &= ~(1 << (31 - vecnum));
+  m8xx.cimr &= ~(1 << vecnum);
   return RTEMS_SUCCESSFUL;
 }
@@ -62,5 +62,5 @@
 {
   rtems_vector_number vecnum = irqnum - BSP_CPM_IRQ_LOWEST_OFFSET;
-  m8xx.cimr |= (1 << (31 - vecnum));
+  m8xx.cimr |= (1 << vecnum);
   return RTEMS_SUCCESSFUL;
 }
@@ -196,6 +196,11 @@
    * make sure CPIC request proper level at SIU interrupt controller
    */
-  m8xx.cicr  = (0x00e41f00 |
+  m8xx.cicr  = (0x00e41f80 |
 		((BSP_CPM_INTERRUPT/2) << 13));
+
+  /* 
+   * enable CPIC interrupts at SIU
+   */
+  bsp_irq_enable_at_SIU(BSP_CPM_INTERRUPT);
 
   return RTEMS_SUCCESSFUL;
Index: c/src/lib/libbsp/powerpc/tqm8xx/network/network_fec.c
===================================================================
--- c/src/lib/libbsp/powerpc/tqm8xx/network/network_fec.c	(revision 978eba36bfbd8f82827e89db83196d3b7dfc9912)
+++ c/src/lib/libbsp/powerpc/tqm8xx/network/network_fec.c	(revision 4d6ad9e2add10045fc85a165e99ff9152714cc3f)
@@ -1172,5 +1172,6 @@
    * Process options
    */
-  if (config->hardware_address) {
+  if ((config->hardware_address) &&
+      (0 != memcmp(maczero,config->hardware_address,ETHER_ADDR_LEN))) {
     memcpy (sc->arpcom.ac_enaddr, config->hardware_address, ETHER_ADDR_LEN);
   }
@@ -1178,4 +1179,11 @@
   else if(0 != memcmp(maczero,TQM_BD_INFO.eth_addr,ETHER_ADDR_LEN)) {
     memcpy (sc->arpcom.ac_enaddr, TQM_BD_INFO.eth_addr, ETHER_ADDR_LEN);
+  }
+#endif
+#ifdef BSP_HAS_UBOOT
+  else if(0 != memcmp(maczero,mpc8xx_uboot_board_info.bi_enetaddr,
+		      ETHER_ADDR_LEN)) {
+    memcpy (sc->arpcom.ac_enaddr, 
+	    mpc8xx_uboot_board_info.bi_enetaddr, ETHER_ADDR_LEN);
   }
 #endif
Index: c/src/lib/libbsp/powerpc/tqm8xx/network/network_scc.c
===================================================================
--- c/src/lib/libbsp/powerpc/tqm8xx/network/network_scc.c	(revision 978eba36bfbd8f82827e89db83196d3b7dfc9912)
+++ c/src/lib/libbsp/powerpc/tqm8xx/network/network_scc.c	(revision 4d6ad9e2add10045fc85a165e99ff9152714cc3f)
@@ -231,11 +231,12 @@
 
   /*
-   * Connect CLK1 and CLK2 to SCC1 in the SICR.
-   * CLK1 is TxClk, CLK2 is RxClk. No grant mechanism, SCC1 is directly
+   * FIXME: which pins?
+   * Connect CLK1 and CLK3 to SCC1 in the SICR.
+   * CLK1 is RxClk, CLK3 is TxClk. No grant mechanism, SCC1 is directly
    * connected to the NMSI pins.
-   * R1CS = 0b101 (CLK2)
-   * T1CS = 0b100 (CLK1)
-   */
-  m8xx.sicr |= 0x2C;
+   * R1CS = 0b100 (CLK1)
+   * T1CS = 0b110 (CLK3)
+   */
+  m8xx.sicr = (m8xx.sicr & ~0xffffff00) | 0x26;
 
   /*
@@ -991,5 +992,6 @@
    * MAC address: try to fetch it from config, else from TQMMon, else panic
    */
-  if (config->hardware_address) {
+  if ((config->hardware_address) &&
+      (0 != memcmp(maczero,config->hardware_address,ETHER_ADDR_LEN))) {
     memcpy (sc->arpcom.ac_enaddr, config->hardware_address, ETHER_ADDR_LEN);
   }
@@ -997,4 +999,11 @@
   else if(0 != memcmp(maczero,TQM_BD_INFO.eth_addr,ETHER_ADDR_LEN)) {
     memcpy (sc->arpcom.ac_enaddr, TQM_BD_INFO.eth_addr, ETHER_ADDR_LEN);
+  }
+#endif
+#ifdef BSP_HAS_UBOOT
+  else if(0 != memcmp(maczero,mpc8xx_uboot_board_info.bi_enetaddr,
+		      ETHER_ADDR_LEN)) {
+    memcpy (sc->arpcom.ac_enaddr, 
+	    mpc8xx_uboot_board_info.bi_enetaddr, ETHER_ADDR_LEN);
   }
 #endif
Index: c/src/lib/libbsp/powerpc/tqm8xx/preinstall.am
===================================================================
--- c/src/lib/libbsp/powerpc/tqm8xx/preinstall.am	(revision 978eba36bfbd8f82827e89db83196d3b7dfc9912)
+++ c/src/lib/libbsp/powerpc/tqm8xx/preinstall.am	(revision 4d6ad9e2add10045fc85a165e99ff9152714cc3f)
@@ -70,4 +70,8 @@
 PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-config.h
 
+$(PROJECT_INCLUDE)/bsp/u-boot.h: ../shared/include/u-boot.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
+	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/u-boot.h
+PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/u-boot.h
+
 $(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
 	$(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h
Index: c/src/lib/libbsp/powerpc/tqm8xx/startup/bspstart.c
===================================================================
--- c/src/lib/libbsp/powerpc/tqm8xx/startup/bspstart.c	(revision 978eba36bfbd8f82827e89db83196d3b7dfc9912)
+++ c/src/lib/libbsp/powerpc/tqm8xx/startup/bspstart.c	(revision 4d6ad9e2add10045fc85a165e99ff9152714cc3f)
@@ -40,9 +40,22 @@
 #endif /* BSP_HAS_TQMMON */
 
+#ifdef BSP_HAS_UBOOT
+
+/*
+ * We want this in the data section, because the startup code clears the BSS
+ * section after the initialization of the board info.
+ */
+bd_t mpc8xx_uboot_board_info = { .bi_baudrate = 123 };
+
+/* Size in words */
+const size_t mpc8xx_uboot_board_info_size = (sizeof( bd_t) + 3) / 4;
+
+#endif /* BSP_HAS_UBOOT */
+
 /* Configuration parameters for console driver, ... */
 unsigned int BSP_bus_frequency;
 
 /* Configuration parameters for clock driver, ... */
-uint32_t bsp_clicks_per_usec; /* for PIT driver: OSCCLK */
+uint32_t bsp_clicks_per_usec; /* for PIT driver: OSCCLK, for DEC: core clock */
 uint32_t bsp_clock_speed    ; /* needed for PIT driver  */
 /* for timer: */
@@ -85,4 +98,5 @@
 }
 
+#if defined(BSP_HAS_TQMMON)
 const char *bsp_tqm_get_cib_string( const char *cib_id)
 {
@@ -130,8 +144,21 @@
   return RTEMS_SUCCESSFUL;
 }
+#endif /* BSP_HAS_TQMMON */
 
 void bsp_get_work_area( void **work_area_start, size_t *work_area_size, void **heap_start, size_t *heap_size)
 {
+#ifdef BSP_HAS_TQMMON
   char *ram_end = (char *) (TQM_BD_INFO.sdram_size - (uint32_t)TopRamReserved);
+#endif
+
+#ifdef BSP_HAS_UBOOT
+  char *ram_end = (char *) (mpc8xx_uboot_board_info.bi_memstart
+			    + mpc8xx_uboot_board_info.bi_memsize
+			    - (uint32_t)TopRamReserved);
+  /*
+   * make sure that the memory size is properly aligned
+   */
+  ram_end = ram_end - (((uint32_t) ram_end) % CPU_ALIGNMENT);
+#endif
 
   *work_area_start = bsp_work_area_start;
@@ -180,4 +207,10 @@
    * DEC, baudrate generator etc)
    */
+#ifdef BSP_HAS_UBOOT
+  /* internal !!! bus frequency */
+  BSP_bus_frequency = mpc8xx_uboot_board_info.bi_intfreq;
+#endif /* BSP_HAS_UBOOT */
+
+#ifdef BSP_HAS_TQMMON
   if (RTEMS_SUCCESSFUL != 
       bsp_tqm_get_cib_uint32("cu",
@@ -185,8 +218,15 @@
     BSP_panic("Cannot determine BUS frequency\n");
   }
-
+#endif
+
+#if 0
+  /* for PIT timer */
   bsp_clicks_per_usec = 0; /* force to zero to control 
 			    * PIT clock driver from EXTCLK
 			    */
+#else
+  /* for DEC timer */
+  bsp_clicks_per_usec = BSP_bus_frequency/16000000;
+#endif
   bsp_clock_speed     = BSP_bus_frequency;
   bsp_timer_least_valid = 3; 
Index: c/src/lib/libbsp/powerpc/tqm8xx/startup/start.S
===================================================================
--- c/src/lib/libbsp/powerpc/tqm8xx/startup/start.S	(revision 978eba36bfbd8f82827e89db83196d3b7dfc9912)
+++ c/src/lib/libbsp/powerpc/tqm8xx/startup/start.S	(revision 4d6ad9e2add10045fc85a165e99ff9152714cc3f)
@@ -31,4 +31,23 @@
 start:
 
+#ifdef BSP_HAS_UBOOT
+
+.extern mpc8xx_uboot_board_info
+.extern mpc8xx_uboot_board_info_size
+
+	/* Copy board info */
+	LA	r6, mpc8xx_uboot_board_info
+	LW	r5, mpc8xx_uboot_board_info_size
+        mtctr   r5
+
+copy_uboot_board_info:
+
+	lwz     r5, 0(r3)
+        addi    r3, r3, 4
+        stw     r5, 0(r6)
+        addi    r6, r6, 4
+        bdnz    copy_uboot_board_info
+
+#endif /* BSP_HAS_UBOOT */
 	/*
 	 * basic CPU setup:	
