Changeset 4d6ad9e in rtems for c


Ignore:
Timestamp:
Oct 2, 2008, 12:43:10 PM (12 years ago)
Author:
Thomas Doerfler <Thomas.Doerfler@…>
Branches:
4.9
Children:
b9ae23a
Parents:
224a429b
Message:

switch to decrementer clock driver
add U-Boot support
remove dead code
adjust console clock routing
fix CPIC interrupts

Location:
c/src/lib/libbsp/powerpc/tqm8xx
Files:
11 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/powerpc/tqm8xx/ChangeLog

    r224a429b r4d6ad9e  
     12008-10-01      Thomas Doerfler <Thomas.Doerfler@embedded-brains.de>
     2
     3        * Makefile.am: switch to DEC clock driver, add U-Boot support
     4        * configure.ac: add U-Boot support
     5        * console/console.c: add U-Boot support, remove dead code, adjust clock
     6        routing
     7        * include/bsp.h: add U-Boot support
     8        * irq/irq.c: fix CPIC interrupt code
     9        * network/network_fec.c, network/network_scc.c: add U-Boot support
     10        * startup/bspstart.c, startup/start.S: add U-Boot support
     11
    1122008-09-30      Joel Sherrill <joel.sherrill@oarcorp.com>
    213
  • c/src/lib/libbsp/powerpc/tqm8xx/Makefile.am

    r224a429b r4d6ad9e  
    2323include_bsp_HEADERS = include/tqm.h include/8xx_immap.h \
    2424    include/irq.h include/irq-config.h \
    25     ../../shared/include/irq-generic.h\
     25        ../shared/include/u-boot.h     \
     26    ../../shared/include/irq-generic.h \
    2627    ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h \
    2728    ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/ppc_exc_bspsupp.h
     
    4748        ../../shared/src/irq-legacy.c
    4849
    49 # clock_SOURCES = ../shared/clock/clock.c
    50 p_clock_SOURCES = clock/p_clock.c
     50clock_SOURCES = ../shared/clock/clock.c
    5151
    5252console_SOURCES = console/console.c
     
    6969libbsp_a_SOURCES = $(irq_SOURCES) \
    7070    $(startup_SOURCES) $(console_SOURCES) \
    71     $(p_clock_SOURCES) $(timer_SOURCES)
     71    $(clock_SOURCES) $(timer_SOURCES)
    7272
    7373libbsp_a_LIBADD = \
     
    7979    ../../../libcpu/@RTEMS_CPU@/mpc8xx/console-generic.rel \
    8080    ../../../libcpu/@RTEMS_CPU@/mpc8xx/cpm.rel \
    81     ../../../libcpu/@RTEMS_CPU@/mpc8xx/clock.rel \
    8281    ../../../libcpu/@RTEMS_CPU@/mpc8xx/mmu.rel \
    8382    ../../../libcpu/@RTEMS_CPU@/mpc8xx/timer.rel
  • c/src/lib/libbsp/powerpc/tqm8xx/configure.ac

    r224a429b r4d6ad9e  
    103103 for 10MBit networking.])
    104104
     105RTEMS_BSPOPTS_SET([BSP_HAS_UBOOT],[*],[0])
     106RTEMS_BSPOPTS_HELP([BSP_HAS_UBOOT],
     107[If defined, then the BSP assumes it is booted via U-Boot (not TQMon)])
     108
    105109
    106110# Explicitly list a Makefile here
  • c/src/lib/libbsp/powerpc/tqm8xx/console/console.c

    r224a429b r4d6ad9e  
    275275    scc_brg_state[brg_idx].link_cnt    = 0;
    276276  }
    277 #ifndef MDE360
    278   /*
    279    * on ZEM40, init CLK4/5 inputs
    280    */
    281   m8xx.papar |=  ((1 << 11) | (1 << 12));
    282   m8xx.padir &= ~((1 << 11) | (1 << 12));
    283 #endif
    284 }
    285 
    286 /*
    287  * input clock frq for CPM clock inputs
    288  */
    289 static uint32_t clkin_frq[2][4] = {
    290 #ifdef MDE360
    291   {0,0,0,0},
    292   {0,0,0,0}
    293 #else
    294   {0,0,0,1843000},
    295   {1843000,0,0,0}
    296 #endif
    297 };
     277}
    298278
    299279/*
     
    311291  int new_brg = -1;
    312292  int brg_idx;
    313 #if 0 /* we do not support external clocked console */
    314   int clk_group;
    315   int clk_sel;
    316 #endif
    317293
    318294  old_brg = chan_desc->brg_used;
    319295  /* compute brg register contents needed */
    320296  reg_val = sccBRGval(baud);
    321 
    322 #if 0 /* we do not support external clocked console */
    323   /* search for clock input with this frq */
    324   clk_group = ((chan == CONS_CHN_SCC3) ||
    325                (chan == CONS_CHN_SCC4) ||
    326                (chan == CONS_CHN_SMC2)) ? 1 : 0;
    327 
    328   for (clk_sel = 0, new_brg = -1;
    329        (clk_sel < 4) && (new_brg < 0);
    330        clk_sel++) {
    331     if (baud == (clkin_frq[clk_group][clk_sel] / 16)) {
    332       new_brg = clk_sel + 4;
    333     }
    334   }
    335 #endif
    336297
    337298  rtems_interrupt_disable(level); 
     
    393354    else {
    394355      /* connect SMC to BRGx or CLKx... */
    395       m8xx.simode = ((m8xx.simode & ~(M8xx_SIMODE_SMCCS_MSK(chan - CONS_CHN_SMC1)))|
    396                      M8xx_SIMODE_SMCCS(chan - CONS_CHN_SMC1,new_brg));
     356      m8xx.simode = ((m8xx.simode
     357                      & ~(M8xx_SIMODE_SMCCS_MSK(chan - CONS_CHN_SMC1)))
     358                     | M8xx_SIMODE_SMCCS(chan - CONS_CHN_SMC1,new_brg));
    397359    }
    398360  }
     
    650612   * allocate and connect BRG
    651613   */
     614#if defined(BSP_HAS_UBOOT)
     615  sccBRGalloc(chan,mpc8xx_uboot_board_info.bi_baudrate);
     616#else
    652617  sccBRGalloc(chan,9600);
    653  
     618#endif
    654619 
    655620  /*
     
    686651    }
    687652    sccFrstRxBd[chan][i].length = 0;
    688     sccFrstRxBd[chan][i].buffer = rxBuf[chan][i];
     653    sccFrstRxBd[chan][i].buffer = (*rxBuf[chan])[i];
    689654  }
    690655  /*
     
    998963    sccttyp[chan] = args->iop->data1;
    999964  }
     965#if defined(BSP_HAS_UBOOT) 
     966  rtems_termios_set_initial_baud(sccttyp[chan],
     967                                 mpc8xx_uboot_board_info.bi_baudrate);
     968#endif
    1000969  return status;
    1001970}
  • c/src/lib/libbsp/powerpc/tqm8xx/include/bsp.h

    r224a429b r4d6ad9e  
    4141#define _BSP_H
    4242
    43 /*
    44  * indicate, that BSP is booted via TQMMon
    45  */
    46 #define BSP_HAS_TQMMON
    47 
    4843LINKER_SYMBOL(TopRamReserved);
    4944
     
    7469LINKER_SYMBOL( bsp_work_area_start);
    7570
     71/*
     72 * NOTE: start.S also needs to know, whether we use U-Boot
     73 */
     74#include <bspopts.h>
     75/*
     76 * indicate, that BSP is booted via TQMMon
     77 * (unless we use U-Boot)
     78 */
     79#if !defined(BSP_HAS_UBOOT)
     80#define BSP_HAS_TQMMON
     81
     82#include <bsp/tqm.h>
     83#endif
     84
    7685#ifndef ASM
    7786#ifdef __cplusplus
    7887extern "C" {
    7988#endif
    80 
    81 #include <bspopts.h>
    8289
    8390#include <rtems.h>
     
    8996#include <mpc8xx/console.h>
    9097#include <bsp/vectors.h>
    91 #include <bsp/tqm.h>
    9298#include <libcpu/powerpc-utility.h>
     99
     100
     101#ifdef BSP_HAS_TQMMON
     102#endif
     103
     104#ifdef BSP_HAS_UBOOT
     105#define CONFIG_8xx  /* select the proper U-Boot configuration */
     106#include <bsp/u-boot.h>
     107extern bd_t mpc8xx_uboot_board_info;
     108extern const size_t mpc8xx_uboot_board_info_size;
     109#endif /* BSP_HAS_UBOOT */
    93110
    94111/*
  • c/src/lib/libbsp/powerpc/tqm8xx/irq/irq.c

    r224a429b r4d6ad9e  
    5555{
    5656  rtems_vector_number vecnum = irqnum - BSP_CPM_IRQ_LOWEST_OFFSET;
    57   m8xx.cimr &= ~(1 << (31 - vecnum));
     57  m8xx.cimr &= ~(1 << vecnum);
    5858  return RTEMS_SUCCESSFUL;
    5959}
     
    6262{
    6363  rtems_vector_number vecnum = irqnum - BSP_CPM_IRQ_LOWEST_OFFSET;
    64   m8xx.cimr |= (1 << (31 - vecnum));
     64  m8xx.cimr |= (1 << vecnum);
    6565  return RTEMS_SUCCESSFUL;
    6666}
     
    196196   * make sure CPIC request proper level at SIU interrupt controller
    197197   */
    198   m8xx.cicr  = (0x00e41f00 |
     198  m8xx.cicr  = (0x00e41f80 |
    199199                ((BSP_CPM_INTERRUPT/2) << 13));
     200
     201  /*
     202   * enable CPIC interrupts at SIU
     203   */
     204  bsp_irq_enable_at_SIU(BSP_CPM_INTERRUPT);
    200205
    201206  return RTEMS_SUCCESSFUL;
  • c/src/lib/libbsp/powerpc/tqm8xx/network/network_fec.c

    r224a429b r4d6ad9e  
    11721172   * Process options
    11731173   */
    1174   if (config->hardware_address) {
     1174  if ((config->hardware_address) &&
     1175      (0 != memcmp(maczero,config->hardware_address,ETHER_ADDR_LEN))) {
    11751176    memcpy (sc->arpcom.ac_enaddr, config->hardware_address, ETHER_ADDR_LEN);
    11761177  }
     
    11781179  else if(0 != memcmp(maczero,TQM_BD_INFO.eth_addr,ETHER_ADDR_LEN)) {
    11791180    memcpy (sc->arpcom.ac_enaddr, TQM_BD_INFO.eth_addr, ETHER_ADDR_LEN);
     1181  }
     1182#endif
     1183#ifdef BSP_HAS_UBOOT
     1184  else if(0 != memcmp(maczero,mpc8xx_uboot_board_info.bi_enetaddr,
     1185                      ETHER_ADDR_LEN)) {
     1186    memcpy (sc->arpcom.ac_enaddr,
     1187            mpc8xx_uboot_board_info.bi_enetaddr, ETHER_ADDR_LEN);
    11801188  }
    11811189#endif
  • c/src/lib/libbsp/powerpc/tqm8xx/network/network_scc.c

    r224a429b r4d6ad9e  
    231231
    232232  /*
    233    * Connect CLK1 and CLK2 to SCC1 in the SICR.
    234    * CLK1 is TxClk, CLK2 is RxClk. No grant mechanism, SCC1 is directly
     233   * FIXME: which pins?
     234   * Connect CLK1 and CLK3 to SCC1 in the SICR.
     235   * CLK1 is RxClk, CLK3 is TxClk. No grant mechanism, SCC1 is directly
    235236   * connected to the NMSI pins.
    236    * R1CS = 0b101 (CLK2)
    237    * T1CS = 0b100 (CLK1)
    238    */
    239   m8xx.sicr |= 0x2C;
     237   * R1CS = 0b100 (CLK1)
     238   * T1CS = 0b110 (CLK3)
     239   */
     240  m8xx.sicr = (m8xx.sicr & ~0xffffff00) | 0x26;
    240241
    241242  /*
     
    991992   * MAC address: try to fetch it from config, else from TQMMon, else panic
    992993   */
    993   if (config->hardware_address) {
     994  if ((config->hardware_address) &&
     995      (0 != memcmp(maczero,config->hardware_address,ETHER_ADDR_LEN))) {
    994996    memcpy (sc->arpcom.ac_enaddr, config->hardware_address, ETHER_ADDR_LEN);
    995997  }
     
    997999  else if(0 != memcmp(maczero,TQM_BD_INFO.eth_addr,ETHER_ADDR_LEN)) {
    9981000    memcpy (sc->arpcom.ac_enaddr, TQM_BD_INFO.eth_addr, ETHER_ADDR_LEN);
     1001  }
     1002#endif
     1003#ifdef BSP_HAS_UBOOT
     1004  else if(0 != memcmp(maczero,mpc8xx_uboot_board_info.bi_enetaddr,
     1005                      ETHER_ADDR_LEN)) {
     1006    memcpy (sc->arpcom.ac_enaddr,
     1007            mpc8xx_uboot_board_info.bi_enetaddr, ETHER_ADDR_LEN);
    9991008  }
    10001009#endif
  • c/src/lib/libbsp/powerpc/tqm8xx/preinstall.am

    r224a429b r4d6ad9e  
    7070PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq-config.h
    7171
     72$(PROJECT_INCLUDE)/bsp/u-boot.h: ../shared/include/u-boot.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
     73        $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/u-boot.h
     74PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/u-boot.h
     75
    7276$(PROJECT_INCLUDE)/bsp/irq-generic.h: ../../shared/include/irq-generic.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
    7377        $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq-generic.h
  • c/src/lib/libbsp/powerpc/tqm8xx/startup/bspstart.c

    r224a429b r4d6ad9e  
    4040#endif /* BSP_HAS_TQMMON */
    4141
     42#ifdef BSP_HAS_UBOOT
     43
     44/*
     45 * We want this in the data section, because the startup code clears the BSS
     46 * section after the initialization of the board info.
     47 */
     48bd_t mpc8xx_uboot_board_info = { .bi_baudrate = 123 };
     49
     50/* Size in words */
     51const size_t mpc8xx_uboot_board_info_size = (sizeof( bd_t) + 3) / 4;
     52
     53#endif /* BSP_HAS_UBOOT */
     54
    4255/* Configuration parameters for console driver, ... */
    4356unsigned int BSP_bus_frequency;
    4457
    4558/* Configuration parameters for clock driver, ... */
    46 uint32_t bsp_clicks_per_usec; /* for PIT driver: OSCCLK */
     59uint32_t bsp_clicks_per_usec; /* for PIT driver: OSCCLK, for DEC: core clock */
    4760uint32_t bsp_clock_speed    ; /* needed for PIT driver  */
    4861/* for timer: */
     
    8598}
    8699
     100#if defined(BSP_HAS_TQMMON)
    87101const char *bsp_tqm_get_cib_string( const char *cib_id)
    88102{
     
    130144  return RTEMS_SUCCESSFUL;
    131145}
     146#endif /* BSP_HAS_TQMMON */
    132147
    133148void bsp_get_work_area( void **work_area_start, size_t *work_area_size, void **heap_start, size_t *heap_size)
    134149{
     150#ifdef BSP_HAS_TQMMON
    135151  char *ram_end = (char *) (TQM_BD_INFO.sdram_size - (uint32_t)TopRamReserved);
     152#endif
     153
     154#ifdef BSP_HAS_UBOOT
     155  char *ram_end = (char *) (mpc8xx_uboot_board_info.bi_memstart
     156                            + mpc8xx_uboot_board_info.bi_memsize
     157                            - (uint32_t)TopRamReserved);
     158  /*
     159   * make sure that the memory size is properly aligned
     160   */
     161  ram_end = ram_end - (((uint32_t) ram_end) % CPU_ALIGNMENT);
     162#endif
    136163
    137164  *work_area_start = bsp_work_area_start;
     
    180207   * DEC, baudrate generator etc)
    181208   */
     209#ifdef BSP_HAS_UBOOT
     210  /* internal !!! bus frequency */
     211  BSP_bus_frequency = mpc8xx_uboot_board_info.bi_intfreq;
     212#endif /* BSP_HAS_UBOOT */
     213
     214#ifdef BSP_HAS_TQMMON
    182215  if (RTEMS_SUCCESSFUL !=
    183216      bsp_tqm_get_cib_uint32("cu",
     
    185218    BSP_panic("Cannot determine BUS frequency\n");
    186219  }
    187 
     220#endif
     221
     222#if 0
     223  /* for PIT timer */
    188224  bsp_clicks_per_usec = 0; /* force to zero to control
    189225                            * PIT clock driver from EXTCLK
    190226                            */
     227#else
     228  /* for DEC timer */
     229  bsp_clicks_per_usec = BSP_bus_frequency/16000000;
     230#endif
    191231  bsp_clock_speed     = BSP_bus_frequency;
    192232  bsp_timer_least_valid = 3;
  • c/src/lib/libbsp/powerpc/tqm8xx/startup/start.S

    r224a429b r4d6ad9e  
    3131start:
    3232
     33#ifdef BSP_HAS_UBOOT
     34
     35.extern mpc8xx_uboot_board_info
     36.extern mpc8xx_uboot_board_info_size
     37
     38        /* Copy board info */
     39        LA      r6, mpc8xx_uboot_board_info
     40        LW      r5, mpc8xx_uboot_board_info_size
     41        mtctr   r5
     42
     43copy_uboot_board_info:
     44
     45        lwz     r5, 0(r3)
     46        addi    r3, r3, 4
     47        stw     r5, 0(r6)
     48        addi    r6, r6, 4
     49        bdnz    copy_uboot_board_info
     50
     51#endif /* BSP_HAS_UBOOT */
    3352        /*
    3453         * basic CPU setup:     
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