Ignore:
Timestamp:
Jan 27, 2018, 1:37:51 PM (3 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
5, master
Children:
05015dc1
Parents:
d8d6a08
git-author:
Sebastian Huber <sebastian.huber@…> (01/27/18 13:37:51)
git-committer:
Sebastian Huber <sebastian.huber@…> (01/31/18 11:49:09)
Message:

bsps: Rework cache manager implementation

The previous cache manager support used a single souce file
(cache_manager.c) which included an implementation header (cache_.h).
This required the use of specialized include paths to find the right
header file. Change this to include a generic implementation header
(cacheimpl.h) in specialized source files.

Use the following directories and files:

  • bsps/shared/cache
  • bsps/@RTEMS_CPU@/shared/cache
  • bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILY/start/cache.c

Update #3285.

File:
1 moved

Legend:

Unmodified
Added
Removed
  • bsps/m68k/shared/cache/cache-mcf532x.c

    rd8d6a08 r4cf93658  
    77#include <rtems.h>
    88#include <mcf532x/mcf532x.h>
    9 #include "cache_.h"
     9#include "cache.h"
    1010
    1111#define m68k_set_cacr(_cacr) \
     
    2424 * Cannot be frozen
    2525 */
    26 void _CPU_cache_freeze_data(void)
     26static void _CPU_cache_freeze_data(void)
    2727{
    2828}
    2929
    30 void _CPU_cache_unfreeze_data(void)
     30static void _CPU_cache_unfreeze_data(void)
    3131{
    3232}
    3333
    34 void _CPU_cache_freeze_instruction(void)
     34static void _CPU_cache_freeze_instruction(void)
    3535{
    3636}
    3737
    38 void _CPU_cache_unfreeze_instruction(void)
     38static void _CPU_cache_unfreeze_instruction(void)
    3939{
    4040}
    4141
    42 void _CPU_cache_flush_1_data_line(const void *d_addr)
     42static void _CPU_cache_flush_1_data_line(const void *d_addr)
    4343{
    4444  register unsigned long adr = (((unsigned long) d_addr >> 4) & 0xff) << 4;
     
    5353}
    5454
    55 void _CPU_cache_flush_entire_data(void)
     55static void _CPU_cache_flush_entire_data(void)
    5656{
    5757  register unsigned long set, adr;
     
    6969}
    7070
    71 void _CPU_cache_enable_instruction(void)
     71static void _CPU_cache_enable_instruction(void)
    7272{
    7373  rtems_interrupt_level level;
     
    8282}
    8383
    84 void _CPU_cache_disable_instruction(void)
     84static void _CPU_cache_disable_instruction(void)
    8585{
    8686  rtems_interrupt_level level;
     
    9595}
    9696
    97 void _CPU_cache_invalidate_entire_instruction(void)
     97static void _CPU_cache_invalidate_entire_instruction(void)
    9898{
    9999  m68k_set_cacr(cacr_mode | MCF_CACR_CINVA);
    100100}
    101101
    102 void _CPU_cache_invalidate_1_instruction_line(const void *addr)
     102static void _CPU_cache_invalidate_1_instruction_line(const void *addr)
    103103{
    104104  register unsigned long adr = (((unsigned long) addr >> 4) & 0xff) << 4;
     
    113113}
    114114
    115 void _CPU_cache_enable_data(void)
     115static void _CPU_cache_enable_data(void)
    116116{
    117117  /*
     
    122122}
    123123
    124 void _CPU_cache_disable_data(void)
     124static void _CPU_cache_disable_data(void)
    125125{
    126126  /*
     
    131131}
    132132
    133 void _CPU_cache_invalidate_entire_data(void)
     133static void _CPU_cache_invalidate_entire_data(void)
    134134{
    135135  _CPU_cache_invalidate_entire_instruction();
    136136}
    137137
    138 void _CPU_cache_invalidate_1_data_line(const void *addr)
     138static void _CPU_cache_invalidate_1_data_line(const void *addr)
    139139{
    140140  _CPU_cache_invalidate_1_instruction_line(addr);
    141141}
     142
     143#include "../../../shared/cache/cacheimpl.h"
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