Changeset 4cf93658 in rtems for bsps/i386


Ignore:
Timestamp:
Jan 27, 2018, 1:37:51 PM (23 months ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
master
Children:
05015dc1
Parents:
d8d6a08
git-author:
Sebastian Huber <sebastian.huber@…> (01/27/18 13:37:51)
git-committer:
Sebastian Huber <sebastian.huber@…> (01/31/18 11:49:09)
Message:

bsps: Rework cache manager implementation

The previous cache manager support used a single souce file
(cache_manager.c) which included an implementation header (cache_.h).
This required the use of specialized include paths to find the right
header file. Change this to include a generic implementation header
(cacheimpl.h) in specialized source files.

Use the following directories and files:

  • bsps/shared/cache
  • bsps/@RTEMS_CPU@/shared/cache
  • bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILY/start/cache.c

Update #3285.

File:
1 moved

Legend:

Unmodified
Added
Removed
  • bsps/i386/shared/cache/cache.c

    rd8d6a08 r4cf93658  
    44
    55#include <rtems.h>
    6 #include "cache_.h"
    76#include <rtems/score/cpu.h>
    87#include <libcpu/page.h>
     8
     9#define I386_CACHE_ALIGNMENT 16
     10#define CPU_DATA_CACHE_ALIGNMENT I386_CACHE_ALIGNMENT
     11#define CPU_INSTRUCTION_CACHE_ALIGNEMNT I386_CACHE_ALIGNMENT
    912
    1013void _CPU_disable_cache(void)
     
    4548
    4649#if defined(I386_CACHE_ALIGNMENT)
    47 void _CPU_cache_flush_1_data_line(const void *d_addr) {}
    48 void _CPU_cache_invalidate_1_data_line(const void *d_addr) {}
    49 void _CPU_cache_freeze_data(void) {}
    50 void _CPU_cache_unfreeze_data(void) {}
    51 void _CPU_cache_invalidate_1_instruction_line ( const void *d_addr ) {}
    52 void _CPU_cache_freeze_instruction(void) {}
    53 void _CPU_cache_unfreeze_instruction(void) {}
     50static void _CPU_cache_flush_1_data_line(const void *d_addr) {}
     51static void _CPU_cache_invalidate_1_data_line(const void *d_addr) {}
     52static void _CPU_cache_freeze_data(void) {}
     53static void _CPU_cache_unfreeze_data(void) {}
     54static void _CPU_cache_invalidate_1_instruction_line ( const void *d_addr ) {}
     55static void _CPU_cache_freeze_instruction(void) {}
     56static void _CPU_cache_unfreeze_instruction(void) {}
    5457
    55 void _CPU_cache_flush_entire_data(void)
     58static void _CPU_cache_flush_entire_data(void)
    5659{
    5760  __asm__ volatile ("wbinvd");
    5861}
    59 void _CPU_cache_invalidate_entire_data(void)
     62static void _CPU_cache_invalidate_entire_data(void)
    6063{
    6164  __asm__ volatile ("invd");
    6265}
    6366
    64 void _CPU_cache_enable_data(void)
     67static void _CPU_cache_enable_data(void)
    6568{
    6669        _CPU_enable_cache();
    6770}
    6871
    69 void _CPU_cache_disable_data(void)
     72static void _CPU_cache_disable_data(void)
    7073{
    7174        _CPU_disable_cache();
    7275}
    7376
    74 void _CPU_cache_invalidate_entire_instruction(void)
     77static void _CPU_cache_invalidate_entire_instruction(void)
    7578{
    7679  __asm__ volatile ("invd");
    7780}
    7881
    79 void _CPU_cache_enable_instruction(void)
     82static void _CPU_cache_enable_instruction(void)
    8083{
    8184  _CPU_enable_cache();
    8285}
    8386
    84 void _CPU_cache_disable_instruction( void )
     87static void _CPU_cache_disable_instruction( void )
    8588{
    8689  _CPU_disable_cache();
    8790}
    8891#endif
     92
     93#include "../../../shared/cache/cacheimpl.h"
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