Changeset 4cf93658 in rtems


Ignore:
Timestamp:
Jan 27, 2018, 1:37:51 PM (17 months ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
master
Children:
05015dc1
Parents:
d8d6a08
git-author:
Sebastian Huber <sebastian.huber@…> (01/27/18 13:37:51)
git-committer:
Sebastian Huber <sebastian.huber@…> (01/31/18 11:49:09)
Message:

bsps: Rework cache manager implementation

The previous cache manager support used a single souce file
(cache_manager.c) which included an implementation header (cache_.h).
This required the use of specialized include paths to find the right
header file. Change this to include a generic implementation header
(cacheimpl.h) in specialized source files.

Use the following directories and files:

  • bsps/shared/cache
  • bsps/@RTEMS_CPU@/shared/cache
  • bsps/@RTEMS_CPU@/@RTEMS_BSP_FAMILY/start/cache.c

Update #3285.

Files:
4 added
19 deleted
94 edited
16 moved

Legend:

Unmodified
Added
Removed
  • bsps/arm/shared/cache/cache-cp15.c

    rd8d6a08 r4cf93658  
    2121 */
    2222
    23 #ifndef LIBBSP_ARM_ARMV467AR_BASIC_CACHE_H
    24 #define LIBBSP_ARM_ARMV467AR_BASIC_CACHE_H
    25 
    2623#include <libcpu/arm-cp15.h>
    27 #include "../include/arm-cache-l1.h"
     24#include "cache-cp15.h"
    2825
    2926#define CPU_DATA_CACHE_ALIGNMENT 32
     
    185182}
    186183
    187 #endif /* LIBBSP_ARM_ARMV467AR_BASIC_CACHE_H */
     184#include "../../shared/cache/cacheimpl.h"
  • bsps/arm/shared/cache/cache-cp15.h

    rd8d6a08 r4cf93658  
    11/**
    2  * @file arm-cache-l1.h
    3  *
    42 * @ingroup arm_shared
    53 *
  • bsps/arm/shared/cache/cache-l2c-310.c

    rd8d6a08 r4cf93658  
    11/**
    2  * @file cache_.h
    3  *
    42 * @ingroup L2C-310_cache
    53 *
     
    5452 */
    5553
    56 #ifndef LIBBSP_ARM_SHARED_L2C_310_CACHE_H
    57 #define LIBBSP_ARM_SHARED_L2C_310_CACHE_H
    58 
    5954#include <assert.h>
    6055#include <bsp.h>
     
    6459#include <bsp/arm-release-id.h>
    6560#include <bsp/arm-errata.h>
    66 #include "../include/arm-cache-l1.h"
    67 
    68 #ifdef __cplusplus
    69 extern "C" {
    70 #endif /* __cplusplus */
     61
     62#include "cache-cp15.h"
    7163
    7264/* These two defines also ensure that the rtems_cache_* functions have bodies */
     
    13391331}
    13401332
    1341 
    1342 /** @} */
    1343 
    1344 #ifdef __cplusplus
    1345 }
    1346 #endif /* __cplusplus */
    1347 
    1348 #endif /* LIBBSP_ARM_SHARED_L2C_310_CACHE_H */
     1333#include "../../shared/cache/cacheimpl.h"
  • bsps/arm/shared/cache/cache-v7m.c

    rd8d6a08 r4cf93658  
    1212 * http://www.rtems.org/license/LICENSE.
    1313 */
    14 
    15 #ifndef LIBBSP_ARM_ARMV7M_CACHE__H
    16 #define LIBBSP_ARM_ARMV7M_CACHE__H
    1714
    1815#include <rtems.h>
     
    142139}
    143140
    144 #endif /* LIBBSP_ARM_ARMV7M_CACHE__H */
     141#include "../../shared/cache/cacheimpl.h"
  • bsps/bfin/shared/cache/cache.c

    rd8d6a08 r4cf93658  
    1313#include <bsp.h>
    1414#include <libcpu/memoryRegs.h>
    15 #include "cache_.h"
    1615
     16#define CPU_DATA_CACHE_ALIGNMENT          32
     17#define CPU_INSTRUCTION_CACHE_ALIGNMENT   32
     18
     19#ifdef BSP_DATA_CACHE_CONFIG
     20#define LIBCPU_DATA_CACHE_CONFIG BSP_DATA_CACHE_CONFIG
     21#else
     22/* use 16K of each SRAM bank */
     23#define LIBCPU_DATA_CACHE_CONFIG (3 << DMEM_CONTROL_DMC_SHIFT)
     24#endif
    1725
    1826/* There are many syncs in the following code because they should be
     
    2230
    2331
    24 void _CPU_cache_flush_1_data_line(const void *d_addr) {
     32static void _CPU_cache_flush_1_data_line(const void *d_addr) {
    2533
    2634  __asm__ __volatile__ ("ssync; flush [%0]; ssync" :: "a" (d_addr));
     
    3341   way to insure the dirty line hadn't been written out anyway prior
    3442   to the invalidate. */
    35 void _CPU_cache_invalidate_1_data_line(const void *d_addr) {
     43static void _CPU_cache_invalidate_1_data_line(const void *d_addr) {
    3644
    3745  __asm__ __volatile__ ("ssync; flushinv [%0]; ssync" :: "a" (d_addr));
    3846}
    3947
    40 void _CPU_cache_freeze_data(void) {
     48static void _CPU_cache_freeze_data(void) {
    4149}
    4250
    43 void _CPU_cache_unfreeze_data(void) {
     51static void _CPU_cache_unfreeze_data(void) {
    4452}
    4553
    46 void _CPU_cache_invalidate_1_instruction_line(const void *d_addr) {
     54static void _CPU_cache_invalidate_1_instruction_line(const void *d_addr) {
    4755
    4856  __asm__ __volatile__ ("ssync; iflush [%0]; ssync" :: "a" (d_addr));
    4957}
    5058
    51 void _CPU_cache_freeze_instruction(void) {
     59static void _CPU_cache_freeze_instruction(void) {
    5260}
    5361
    54 void _CPU_cache_unfreeze_instruction(void) {
     62static void _CPU_cache_unfreeze_instruction(void) {
    5563}
    5664
     
    6068   seen on those is a bit sketchy, and I sure wouldn't want to get it
    6169   wrong. */
    62 void _CPU_cache_flush_entire_data(void) {
     70static void _CPU_cache_flush_entire_data(void) {
    6371  uint32_t i;
    6472
     
    7280}
    7381
    74 void _CPU_cache_invalidate_entire_data(void) {
     82static void _CPU_cache_invalidate_entire_data(void) {
    7583  uint32_t dmemControl;
    7684
     
    8492/* this does not actually enable data cache unless CPLBs are also enabled.
    8593   LIBCPU_DATA_CACHE_CONFIG contains the DMEM_CONTROL_DMC bits to set. */
    86 void _CPU_cache_enable_data(void) {
     94static void _CPU_cache_enable_data(void) {
    8795
    8896  __asm__ __volatile__ ("ssync");
     
    9199}
    92100
    93 void _CPU_cache_disable_data(void) {
     101static void _CPU_cache_disable_data(void) {
    94102
    95103  __asm__ __volatile__ ("ssync");
     
    98106}
    99107
    100 void _CPU_cache_invalidate_entire_instruction(void) {
     108static void _CPU_cache_invalidate_entire_instruction(void) {
    101109  uint32_t imemControl;
    102110
     
    110118/* this only actually enables the instruction cache if the CPLBs are also
    111119   enabled. */
    112 void _CPU_cache_enable_instruction(void) {
     120static void _CPU_cache_enable_instruction(void) {
    113121
    114122  __asm__ __volatile__ ("ssync");
     
    117125}
    118126
    119 void _CPU_cache_disable_instruction(void) {
     127static void _CPU_cache_disable_instruction(void) {
    120128
    121129  __asm__ __volatile__ ("ssync");
     
    124132}
    125133
     134#include "../../../shared/cache/cacheimpl.h"
  • bsps/i386/shared/cache/cache.c

    rd8d6a08 r4cf93658  
    44
    55#include <rtems.h>
    6 #include "cache_.h"
    76#include <rtems/score/cpu.h>
    87#include <libcpu/page.h>
     8
     9#define I386_CACHE_ALIGNMENT 16
     10#define CPU_DATA_CACHE_ALIGNMENT I386_CACHE_ALIGNMENT
     11#define CPU_INSTRUCTION_CACHE_ALIGNEMNT I386_CACHE_ALIGNMENT
    912
    1013void _CPU_disable_cache(void)
     
    4548
    4649#if defined(I386_CACHE_ALIGNMENT)
    47 void _CPU_cache_flush_1_data_line(const void *d_addr) {}
    48 void _CPU_cache_invalidate_1_data_line(const void *d_addr) {}
    49 void _CPU_cache_freeze_data(void) {}
    50 void _CPU_cache_unfreeze_data(void) {}
    51 void _CPU_cache_invalidate_1_instruction_line ( const void *d_addr ) {}
    52 void _CPU_cache_freeze_instruction(void) {}
    53 void _CPU_cache_unfreeze_instruction(void) {}
     50static void _CPU_cache_flush_1_data_line(const void *d_addr) {}
     51static void _CPU_cache_invalidate_1_data_line(const void *d_addr) {}
     52static void _CPU_cache_freeze_data(void) {}
     53static void _CPU_cache_unfreeze_data(void) {}
     54static void _CPU_cache_invalidate_1_instruction_line ( const void *d_addr ) {}
     55static void _CPU_cache_freeze_instruction(void) {}
     56static void _CPU_cache_unfreeze_instruction(void) {}
    5457
    55 void _CPU_cache_flush_entire_data(void)
     58static void _CPU_cache_flush_entire_data(void)
    5659{
    5760  __asm__ volatile ("wbinvd");
    5861}
    59 void _CPU_cache_invalidate_entire_data(void)
     62static void _CPU_cache_invalidate_entire_data(void)
    6063{
    6164  __asm__ volatile ("invd");
    6265}
    6366
    64 void _CPU_cache_enable_data(void)
     67static void _CPU_cache_enable_data(void)
    6568{
    6669        _CPU_enable_cache();
    6770}
    6871
    69 void _CPU_cache_disable_data(void)
     72static void _CPU_cache_disable_data(void)
    7073{
    7174        _CPU_disable_cache();
    7275}
    7376
    74 void _CPU_cache_invalidate_entire_instruction(void)
     77static void _CPU_cache_invalidate_entire_instruction(void)
    7578{
    7679  __asm__ volatile ("invd");
    7780}
    7881
    79 void _CPU_cache_enable_instruction(void)
     82static void _CPU_cache_enable_instruction(void)
    8083{
    8184  _CPU_enable_cache();
    8285}
    8386
    84 void _CPU_cache_disable_instruction( void )
     87static void _CPU_cache_disable_instruction( void )
    8588{
    8689  _CPU_disable_cache();
    8790}
    8891#endif
     92
     93#include "../../../shared/cache/cacheimpl.h"
  • bsps/m68k/genmcf548x/start/cache.c

    rd8d6a08 r4cf93658  
    1212 * http://www.rtems.org/license/LICENSE.
    1313 */
    14 
    15 
    16 #ifndef LIBBSP_M68K_GENMCF548X_CACHE_H
    17 #define LIBBSP_M68K_GENMCF548X_CACHE_H
    1814
    1915#include <bsp.h>
     
    115111}
    116112
    117 #endif /* LIBBSP_M68K_GENMCF548X_CACHE_H */
     113#include "../../../shared/cache/cacheimpl.h"
  • bsps/m68k/shared/cache/cache-mcf5235.c

    rd8d6a08 r4cf93658  
    1010#include <rtems.h>
    1111#include <mcf5235/mcf5235.h>
    12 #include "cache_.h"
     12#include "cache.h"
    1313
    1414/*
     
    2020 * Cannot be frozen
    2121 */
    22 void _CPU_cache_freeze_data(void) {}
    23 void _CPU_cache_unfreeze_data(void) {}
    24 void _CPU_cache_freeze_instruction(void) {}
    25 void _CPU_cache_unfreeze_instruction(void) {}
     22static void _CPU_cache_freeze_data(void) {}
     23static void _CPU_cache_unfreeze_data(void) {}
     24static void _CPU_cache_freeze_instruction(void) {}
     25static void _CPU_cache_unfreeze_instruction(void) {}
    2626
    2727/*
    2828 * Write-through data cache -- flushes are unnecessary
    2929 */
    30 void _CPU_cache_flush_1_data_line(const void *d_addr) {}
    31 void _CPU_cache_flush_entire_data(void) {}
     30static void _CPU_cache_flush_1_data_line(const void *d_addr) {}
     31static void _CPU_cache_flush_entire_data(void) {}
    3232
    33 void _CPU_cache_enable_instruction(void)
     33static void _CPU_cache_enable_instruction(void)
    3434{
    3535    rtems_interrupt_level level;
     
    4141}
    4242
    43 void _CPU_cache_disable_instruction(void)
     43static void _CPU_cache_disable_instruction(void)
    4444{
    4545    rtems_interrupt_level level;
     
    5151}
    5252
    53 void _CPU_cache_invalidate_entire_instruction(void)
     53static void _CPU_cache_invalidate_entire_instruction(void)
    5454{
    5555    m68k_set_cacr(cacr_mode | MCF5XXX_CACR_CINV | MCF5XXX_CACR_INVI);
    5656}
    5757
    58 void _CPU_cache_invalidate_1_instruction_line(const void *addr)
     58static void _CPU_cache_invalidate_1_instruction_line(const void *addr)
    5959{
    6060    /*
     
    6565}
    6666
    67 void _CPU_cache_enable_data(void)
     67static void _CPU_cache_enable_data(void)
    6868{
    6969    rtems_interrupt_level level;
     
    7575}
    7676
    77 void _CPU_cache_disable_data(void)
     77static void _CPU_cache_disable_data(void)
    7878{
    7979    rtems_interrupt_level level;
     
    8585}
    8686
    87 void _CPU_cache_invalidate_entire_data(void)
     87static void _CPU_cache_invalidate_entire_data(void)
    8888{
    8989    m68k_set_cacr(cacr_mode | MCF5XXX_CACR_CINV | MCF5XXX_CACR_INVD);
    9090}
    9191
    92 void _CPU_cache_invalidate_1_data_line(const void *addr)
     92static void _CPU_cache_invalidate_1_data_line(const void *addr)
    9393{
    9494    /*
     
    9898    __asm__ volatile ("cpushl %%bc,(%0)" :: "a" (addr));
    9999}
     100
     101#include "../../../shared/cache/cacheimpl.h"
  • bsps/m68k/shared/cache/cache-mcf5282.c

    rd8d6a08 r4cf93658  
    77#include <rtems.h>
    88#include <mcf5282/mcf5282.h>   /* internal MCF5282 modules */
    9 #include "cache_.h"
     9#include "cache.h"
    1010
    1111/*
     
    4141 * Cannot be frozen
    4242 */
    43 void _CPU_cache_freeze_data(void) {}
    44 void _CPU_cache_unfreeze_data(void) {}
    45 void _CPU_cache_freeze_instruction(void) {}
    46 void _CPU_cache_unfreeze_instruction(void) {}
     43static void _CPU_cache_freeze_data(void) {}
     44static void _CPU_cache_unfreeze_data(void) {}
     45static void _CPU_cache_freeze_instruction(void) {}
     46static void _CPU_cache_unfreeze_instruction(void) {}
    4747
    4848/*
    4949 * Write-through data cache -- flushes are unnecessary
    5050 */
    51 void _CPU_cache_flush_1_data_line(const void *d_addr) {}
    52 void _CPU_cache_flush_entire_data(void) {}
     51static void _CPU_cache_flush_1_data_line(const void *d_addr) {}
     52static void _CPU_cache_flush_entire_data(void) {}
    5353
    54 void _CPU_cache_enable_instruction(void)
     54static void _CPU_cache_enable_instruction(void)
    5555{
    5656  rtems_interrupt_level level;
     
    6363}
    6464
    65 void _CPU_cache_disable_instruction(void)
     65static void _CPU_cache_disable_instruction(void)
    6666{
    6767  rtems_interrupt_level level;
     
    7373}
    7474
    75 void _CPU_cache_invalidate_entire_instruction(void)
     75static void _CPU_cache_invalidate_entire_instruction(void)
    7676{
    7777  m68k_set_cacr(cacr_mode | MCF5XXX_CACR_CINV | MCF5XXX_CACR_INVI);
     
    7979}
    8080
    81 void _CPU_cache_invalidate_1_instruction_line(const void *addr)
     81static void _CPU_cache_invalidate_1_instruction_line(const void *addr)
    8282{
    8383  /*
     
    8888}
    8989
    90 void _CPU_cache_enable_data(void)
     90static void _CPU_cache_enable_data(void)
    9191{
    9292  rtems_interrupt_level level;
     
    9898}
    9999
    100 void _CPU_cache_disable_data(void)
     100static void _CPU_cache_disable_data(void)
    101101{
    102102  rtems_interrupt_level level;
     
    108108}
    109109
    110 void _CPU_cache_invalidate_entire_data(void)
     110static void _CPU_cache_invalidate_entire_data(void)
    111111{
    112112  m68k_set_cacr(cacr_mode | MCF5XXX_CACR_CINV | MCF5XXX_CACR_INVD);
    113113}
    114114
    115 void _CPU_cache_invalidate_1_data_line(const void *addr)
     115static void _CPU_cache_invalidate_1_data_line(const void *addr)
    116116{
    117117  /*
     
    121121  __asm__ volatile ("cpushl %%bc,(%0)" :: "a" (addr));
    122122}
     123
     124#include "../../../shared/cache/cacheimpl.h"
  • bsps/m68k/shared/cache/cache-mcf532x.c

    rd8d6a08 r4cf93658  
    77#include <rtems.h>
    88#include <mcf532x/mcf532x.h>
    9 #include "cache_.h"
     9#include "cache.h"
    1010
    1111#define m68k_set_cacr(_cacr) \
     
    2424 * Cannot be frozen
    2525 */
    26 void _CPU_cache_freeze_data(void)
     26static void _CPU_cache_freeze_data(void)
    2727{
    2828}
    2929
    30 void _CPU_cache_unfreeze_data(void)
     30static void _CPU_cache_unfreeze_data(void)
    3131{
    3232}
    3333
    34 void _CPU_cache_freeze_instruction(void)
     34static void _CPU_cache_freeze_instruction(void)
    3535{
    3636}
    3737
    38 void _CPU_cache_unfreeze_instruction(void)
     38static void _CPU_cache_unfreeze_instruction(void)
    3939{
    4040}
    4141
    42 void _CPU_cache_flush_1_data_line(const void *d_addr)
     42static void _CPU_cache_flush_1_data_line(const void *d_addr)
    4343{
    4444  register unsigned long adr = (((unsigned long) d_addr >> 4) & 0xff) << 4;
     
    5353}
    5454
    55 void _CPU_cache_flush_entire_data(void)
     55static void _CPU_cache_flush_entire_data(void)
    5656{
    5757  register unsigned long set, adr;
     
    6969}
    7070
    71 void _CPU_cache_enable_instruction(void)
     71static void _CPU_cache_enable_instruction(void)
    7272{
    7373  rtems_interrupt_level level;
     
    8282}
    8383
    84 void _CPU_cache_disable_instruction(void)
     84static void _CPU_cache_disable_instruction(void)
    8585{
    8686  rtems_interrupt_level level;
     
    9595}
    9696
    97 void _CPU_cache_invalidate_entire_instruction(void)
     97static void _CPU_cache_invalidate_entire_instruction(void)
    9898{
    9999  m68k_set_cacr(cacr_mode | MCF_CACR_CINVA);
    100100}
    101101
    102 void _CPU_cache_invalidate_1_instruction_line(const void *addr)
     102static void _CPU_cache_invalidate_1_instruction_line(const void *addr)
    103103{
    104104  register unsigned long adr = (((unsigned long) addr >> 4) & 0xff) << 4;
     
    113113}
    114114
    115 void _CPU_cache_enable_data(void)
     115static void _CPU_cache_enable_data(void)
    116116{
    117117  /*
     
    122122}
    123123
    124 void _CPU_cache_disable_data(void)
     124static void _CPU_cache_disable_data(void)
    125125{
    126126  /*
     
    131131}
    132132
    133 void _CPU_cache_invalidate_entire_data(void)
     133static void _CPU_cache_invalidate_entire_data(void)
    134134{
    135135  _CPU_cache_invalidate_entire_instruction();
    136136}
    137137
    138 void _CPU_cache_invalidate_1_data_line(const void *addr)
     138static void _CPU_cache_invalidate_1_data_line(const void *addr)
    139139{
    140140  _CPU_cache_invalidate_1_instruction_line(addr);
    141141}
     142
     143#include "../../../shared/cache/cacheimpl.h"
  • bsps/m68k/shared/cache/cache.h

    rd8d6a08 r4cf93658  
    11/*
    2  *  Cache Management Support Routines for the MC68040
    3  */
    4 
    5 #include <rtems.h>
    6 #include "cache_.h"
     2 *  M68K Cache Manager Support
     3 */
     4
     5#if (defined(__mc68020__) && !defined(__mcpu32__))
     6# define M68K_INSTRUCTION_CACHE_ALIGNMENT 16
     7#elif defined(__mc68030__)
     8# define M68K_INSTRUCTION_CACHE_ALIGNMENT 16
     9# define M68K_DATA_CACHE_ALIGNMENT 16
     10#elif ( defined(__mc68040__) || defined (__mc68060__) )
     11# define M68K_INSTRUCTION_CACHE_ALIGNMENT 16
     12# define M68K_DATA_CACHE_ALIGNMENT 16
     13#elif ( defined(__mcf5200__) )
     14# define M68K_INSTRUCTION_CACHE_ALIGNMENT 16
     15# if ( defined(__mcf528x__) )
     16#  define M68K_DATA_CACHE_ALIGNMENT 16
     17# endif
     18#elif ( defined(__mcf5300__) )
     19# define M68K_INSTRUCTION_CACHE_ALIGNMENT 16
     20# define M68K_DATA_CACHE_ALIGNMENT 16
     21#elif defined(__mcfv4e__)
     22# define M68K_INSTRUCTION_CACHE_ALIGNMENT 16
     23# define M68K_DATA_CACHE_ALIGNMENT 16
     24#endif
     25
     26#if defined(M68K_DATA_CACHE_ALIGNMENT)
     27#define CPU_DATA_CACHE_ALIGNMENT M68K_DATA_CACHE_ALIGNMENT
     28#endif
     29
     30#if defined(M68K_INSTRUCTION_CACHE_ALIGNMENT)
     31#define CPU_INSTRUCTION_CACHE_ALIGNMENT M68K_INSTRUCTION_CACHE_ALIGNMENT
     32#endif
    733
    834/*
     
    188214}
    189215#endif
    190 /* end of file */
  • bsps/or1k/headers.am

    rd8d6a08 r4cf93658  
    33include_bspdir = $(includedir)/bsp
    44include_bsp_HEADERS =
    5 include_bsp_HEADERS += ../../../../../bsps/or1k/include/bsp/cache_.h
    65include_bsp_HEADERS += ../../../../../bsps/or1k/include/bsp/linker-symbols.h
  • bsps/or1k/shared/cache/cache.c

    rd8d6a08 r4cf93658  
    2020#include <rtems/score/or1k-utility.h>
    2121#include <rtems/score/percpu.h>
    22 #include "cache_.h"
     22
     23#define CPU_DATA_CACHE_ALIGNMENT        32
     24#define CPU_INSTRUCTION_CACHE_ALIGNMENT 32
     25
     26#define CPU_CACHE_SUPPORT_PROVIDES_RANGE_FUNCTIONS 1
     27#define CPU_CACHE_SUPPORT_PROVIDES_CACHE_SIZE_FUNCTIONS 1
     28
     29static inline size_t
     30_CPU_cache_get_data_cache_size( const uint32_t level )
     31{
     32  return (level == 0 || level == 1)? 8192 : 0;
     33}
     34
     35static inline size_t
     36_CPU_cache_get_instruction_cache_size( const uint32_t level )
     37{
     38  return (level == 0 || level == 1)? 8192 : 0;
     39}
    2340
    2441static inline void _CPU_OR1K_Cache_data_block_prefetch(const void *d_addr)
     
    8198/* Implement RTEMS cache manager functions */
    8299
    83 void _CPU_cache_flush_1_data_line(const void *d_addr)
     100static void _CPU_cache_flush_1_data_line(const void *d_addr)
    84101{
    85102  ISR_Level level;
     
    94111}
    95112
    96 void _CPU_cache_invalidate_1_data_line(const void *d_addr)
     113static void _CPU_cache_invalidate_1_data_line(const void *d_addr)
    97114{
    98115  ISR_Level level;
     
    105122}
    106123
    107 void _CPU_cache_freeze_data(void)
     124static void _CPU_cache_freeze_data(void)
    108125{
    109126  /* Do nothing */
    110127}
    111128
    112 void _CPU_cache_unfreeze_data(void)
     129static void _CPU_cache_unfreeze_data(void)
    113130{
    114131  /* Do nothing */
    115132}
    116133
    117 void _CPU_cache_invalidate_1_instruction_line(const void *d_addr)
     134static void _CPU_cache_invalidate_1_instruction_line(const void *d_addr)
    118135{
    119136  ISR_Level level;
     
    126143}
    127144
    128 void _CPU_cache_freeze_instruction(void)
     145static void _CPU_cache_freeze_instruction(void)
    129146{
    130147  /* Do nothing */
    131148}
    132149
    133 void _CPU_cache_unfreeze_instruction(void)
     150static void _CPU_cache_unfreeze_instruction(void)
    134151{
    135152  /* Do nothing */
    136153}
    137154
    138 void _CPU_cache_flush_entire_data(void)
     155static void _CPU_cache_flush_entire_data(void)
    139156{
    140157  size_t addr;
     
    155172}
    156173
    157 void _CPU_cache_invalidate_entire_data(void)
     174static void _CPU_cache_invalidate_entire_data(void)
    158175{
    159176  size_t addr;
     
    174191}
    175192
    176 void _CPU_cache_invalidate_entire_instruction(void)
     193static void _CPU_cache_invalidate_entire_instruction(void)
    177194{
    178195  size_t addr;
     
    207224 */
    208225
    209 void _CPU_cache_flush_data_range(const void *d_addr, size_t n_bytes)
     226static void _CPU_cache_flush_data_range(const void *d_addr, size_t n_bytes)
    210227{
    211228  const void * final_address;
     
    244261}
    245262
    246 void _CPU_cache_invalidate_data_range(const void *d_addr, size_t n_bytes)
     263static void _CPU_cache_invalidate_data_range(const void *d_addr, size_t n_bytes)
    247264{
    248265  const void * final_address;
     
    281298}
    282299
    283 void _CPU_cache_invalidate_instruction_range(const void *i_addr, size_t n_bytes)
     300static void _CPU_cache_invalidate_instruction_range(const void *i_addr, size_t n_bytes)
    284301{
    285302  const void * final_address;
     
    318335}
    319336
    320 void _CPU_cache_enable_data(void)
     337static void _CPU_cache_enable_data(void)
    321338{
    322339  uint32_t sr;
     
    331348}
    332349
    333 void _CPU_cache_disable_data(void)
     350static void _CPU_cache_disable_data(void)
    334351{
    335352  uint32_t sr;
     
    344361}
    345362
    346 void _CPU_cache_enable_instruction(void)
     363static void _CPU_cache_enable_instruction(void)
    347364{
    348365  uint32_t sr;
     
    357374}
    358375
    359 void _CPU_cache_disable_instruction(void)
     376static void _CPU_cache_disable_instruction(void)
    360377{
    361378  uint32_t sr;
     
    369386  _ISR_Local_enable(level);
    370387}
     388
     389#include "../../../shared/cache/cacheimpl.h"
  • bsps/powerpc/shared/cache/cache.c

    rd8d6a08 r4cf93658  
    1212 * Surrey Satellite Technology Limited (SSTL), 2001
    1313 */
    14 
    15 #ifndef LIBCPU_POWERPC_CACHE_H
    16 #define LIBCPU_POWERPC_CACHE_H
    1714
    1815#include <rtems.h>
     
    320317}
    321318
    322 #endif /* LIBCPU_POWERPC_CACHE_H */
     319#include "../../../bsps/shared/cache/cacheimpl.h"
  • bsps/shared/cache/cacheimpl.h

    rd8d6a08 r4cf93658  
    4141
    4242#include <rtems.h>
    43 #include "cache_.h"
    4443
    4544#if CPU_DATA_CACHE_ALIGNMENT > CPU_CACHE_LINE_BYTES
  • bsps/sparc/leon2/start/cache.c

    rd8d6a08 r4cf93658  
    22 *  SPARC Cache Manager Support
    33 */
    4 
    5 #ifndef __SPARC_CACHE_h
    6 #define __SPARC_CACHE_h
    74
    85/*
     
    1512 */
    1613
    17 /* This define is set in a Makefile */
    18 #if defined(HAS_INSTRUCTION_CACHE)
     14#include <stddef.h>
    1915
    2016#define CPU_INSTRUCTION_CACHE_ALIGNMENT 0
     
    5349}
    5450
    55 #endif /* defined(HAS_INSTRUCTION_CACHE) */
    56 
    57 #endif
    58 /* end of include file */
     51#include "../../../shared/cache/cacheimpl.h"
  • bsps/sparc/leon3/start/cache.c

    rd8d6a08 r4cf93658  
    1313 */
    1414
    15 #ifndef LEON3_CACHE_H
    16 #define LEON3_CACHE_H
    17 
    1815#include <amba.h>
    1916#include <leon.h>
    20 
    21 #ifdef __cplusplus
    22 extern "C" {
    23 #endif
    2417
    2518#define CPU_CACHE_SUPPORT_PROVIDES_RANGE_FUNCTIONS
     
    196189}
    197190
    198 #ifdef __cplusplus
    199 }
    200 #endif /* __cplusplus */
    201 
    202 #endif /* LEON3_CACHE_H */
     191#include "../../../shared/cache/cacheimpl.h"
  • c/src/lib/libbsp/arm/altera-cyclone-v/Makefile.am

    rd8d6a08 r4cf93658  
    5353libbsp_a_SOURCES =
    5454libbsp_a_CPPFLAGS = $(AM_CPPFLAGS)
    55 libbsp_a_LIBADD =
    5655
    5756# for the Altera hwlib
     
    134133
    135134# Cache
    136 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    137 libbsp_a_SOURCES += ../shared/include/arm-cache-l1.h
    138 libbsp_a_SOURCES += ../shared/arm-l2c-310/cache_.h
    139 libbsp_a_CPPFLAGS += -I$(srcdir)/../shared/arm-l2c-310
     135libbsp_a_SOURCES += ../../../../../../bsps/arm/shared/cache/cache-l2c-310.c
    140136
    141137###############################################################################
  • c/src/lib/libbsp/arm/atsam/Makefile.am

    rd8d6a08 r4cf93658  
    137137
    138138# Cache
    139 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    140 libbsp_a_SOURCES += ../shared/armv7m/include/cache_.h
    141 libbsp_a_CPPFLAGS += -I$(srcdir)/../shared/armv7m/include
     139libbsp_a_SOURCES += ../../../../../../bsps/arm/shared/cache/cache-v7m.c
    142140
    143141# Network
  • c/src/lib/libbsp/arm/beagle/Makefile.am

    rd8d6a08 r4cf93658  
    3737
    3838libbsp_a_SOURCES =
    39 libbsp_a_CPPFLAGS = $(AM_CPPFLAGS)
    4039libbsp_a_LIBADD =
    4140
     
    9897
    9998# Cache
    100 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    101 libbsp_a_SOURCES += ../shared/include/arm-cache-l1.h
    102 libbsp_a_SOURCES += ../shared/armv467ar-basic-cache/cache_.h
    103 libbsp_a_CPPFLAGS += -I$(srcdir)/../shared/armv467ar-basic-cache
     99libbsp_a_SOURCES += ../../../../../../bsps/arm/shared/cache/cache-cp15.c
    104100
    105101###############################################################################
  • c/src/lib/libbsp/arm/csb336/Makefile.am

    rd8d6a08 r4cf93658  
    66
    77dist_project_lib_DATA = startup/bsp_specs
    8 
    9 libbsp_a_CPPFLAGS = $(AM_CPPFLAGS)
    108
    119DISTCLEANFILES = include/bspopts.h
     
    4644
    4745# Cache
    48 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    49 libbsp_a_SOURCES += ../shared/include/arm-cache-l1.h
    50 libbsp_a_SOURCES += ../shared/armv467ar-basic-cache/cache_.h
    51 libbsp_a_CPPFLAGS += -I$(srcdir)/../shared/armv467ar-basic-cache
     46libbsp_a_SOURCES += ../../../../../../bsps/arm/shared/cache/cache-cp15.c
    5247
    5348if HAS_NETWORKING
  • c/src/lib/libbsp/arm/csb337/Makefile.am

    rd8d6a08 r4cf93658  
    99if ENABLE_LCD
    1010endif
    11 
    12 libbsp_a_CPPFLAGS = $(AM_CPPFLAGS)
    1311
    1412if ENABLE_UMON
     
    7775
    7876# Cache
    79 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    80 libbsp_a_SOURCES += ../shared/include/arm-cache-l1.h
    81 libbsp_a_SOURCES += ../shared/armv467ar-basic-cache/cache_.h
    82 libbsp_a_CPPFLAGS += -I$(srcdir)/../shared/armv467ar-basic-cache
     77libbsp_a_SOURCES += ../../../../../../bsps/arm/shared/cache/cache-cp15.c
    8378
    8479if HAS_NETWORKING
  • c/src/lib/libbsp/arm/edb7312/Makefile.am

    rd8d6a08 r4cf93658  
    5151
    5252# Cache
    53 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    54 libbsp_a_SOURCES += ../../shared/include/cache_.h
    55 libbsp_a_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/../../shared/include
     53libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c
    5654
    5755if HAS_NETWORKING
  • c/src/lib/libbsp/arm/gdbarmsim/Makefile.am

    rd8d6a08 r4cf93658  
    5151
    5252# Cache
    53 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    54 libbsp_a_SOURCES += ../../shared/include/cache_.h
    55 libbsp_a_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/../../shared/include
     53libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c
    5654
    5755#libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/arm920.rel \
  • c/src/lib/libbsp/arm/gumstix/Makefile.am

    rd8d6a08 r4cf93658  
    4747
    4848# Cache
    49 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    50 libbsp_a_SOURCES += ../../shared/include/cache_.h
    51 libbsp_a_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/../../shared/include
     49libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c
    5250
    5351if ON_SKYEYE
  • c/src/lib/libbsp/arm/imx/Makefile.am

    rd8d6a08 r4cf93658  
    3030
    3131libbsp_a_SOURCES =
    32 libbsp_a_CPPFLAGS = $(AM_CPPFLAGS)
    33 libbsp_a_LIBADD =
    3432
    3533# Shared
     
    7775
    7876# Cache
    79 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    80 libbsp_a_SOURCES += ../shared/include/arm-cache-l1.h
    81 libbsp_a_SOURCES += ../shared/armv467ar-basic-cache/cache_.h
    82 libbsp_a_CPPFLAGS += -I$(srcdir)/../shared/armv467ar-basic-cache
     77libbsp_a_SOURCES += ../../../../../../bsps/arm/shared/cache/cache-cp15.c
    8378
    8479# I2C
  • c/src/lib/libbsp/arm/lm3s69xx/Makefile.am

    rd8d6a08 r4cf93658  
    3232
    3333libbsp_a_SOURCES =
    34 libbsp_a_CPPFLAGS = $(AM_CPPFLAGS)
    35 libbsp_a_LIBADD =
    3634
    3735# Shared
     
    8280
    8381# Cache
    84 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    85 libbsp_a_SOURCES += ../../../libcpu/arm/shared/cache/cache_.h
    86 libbsp_a_CPPFLAGS += -I$(srcdir)/../../../libcpu/arm/shared/include
     82libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c
    8783
    8884# SSI
  • c/src/lib/libbsp/arm/lpc176x/Makefile.am

    rd8d6a08 r4cf93658  
    4141
    4242libbsp_a_SOURCES =
    43 libbsp_a_CPPFLAGS = $(AM_CPPFLAGS)
    44 libbsp_a_LIBADD =
    4543
    4644# Shared
     
    115113
    116114# Cache
    117 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    118 libbsp_a_SOURCES += ../../../libcpu/arm/shared/include/cache_.h
    119 libbsp_a_CPPFLAGS += -I$(srcdir)/../../../libcpu/arm/shared/include
     115libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c
    120116
    121117# Start hooks
  • c/src/lib/libbsp/arm/lpc24xx/Makefile.am

    rd8d6a08 r4cf93658  
    5050
    5151libbsp_a_SOURCES =
    52 libbsp_a_CPPFLAGS = $(AM_CPPFLAGS)
    53 libbsp_a_LIBADD =
    5452
    5553# Shared
     
    122120
    123121# Cache
    124 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    125 libbsp_a_SOURCES += ../../../libcpu/arm/shared/include/cache_.h
    126 libbsp_a_CPPFLAGS += -I$(srcdir)/../../../libcpu/arm/shared/include
     122libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c
    127123
    128124# Start hooks
  • c/src/lib/libbsp/arm/lpc32xx/Makefile.am

    rd8d6a08 r4cf93658  
    4141
    4242libbsp_a_SOURCES =
    43 libbsp_a_CPPFLAGS = $(AM_CPPFLAGS)
    44 libbsp_a_LIBADD =
    4543
    4644# Shared
     
    104102
    105103# Cache
    106 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    107 libbsp_a_SOURCES += ../shared/include/arm-cache-l1.h
    108 libbsp_a_SOURCES += ../shared/armv467ar-basic-cache/cache_.h
    109 libbsp_a_CPPFLAGS += -I$(srcdir)/../shared/armv467ar-basic-cache
    110 
     104libbsp_a_SOURCES += ../../../../../../bsps/arm/shared/cache/cache-cp15.c
    111105
    112106# Start hooks
  • c/src/lib/libbsp/arm/raspberrypi/Makefile.am

    rd8d6a08 r4cf93658  
    115115
    116116# Cache
    117 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    118 libbsp_a_SOURCES += ../shared/include/arm-cache-l1.h
    119 libbsp_a_SOURCES += ../shared/armv467ar-basic-cache/cache_.h
    120 libbsp_a_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/../shared/armv467ar-basic-cache
     117libbsp_a_SOURCES += ../../../../../../bsps/arm/shared/cache/cache-cp15.c
    121118
    122119# Start hooks
  • c/src/lib/libbsp/arm/realview-pbx-a9/Makefile.am

    rd8d6a08 r4cf93658  
    3838
    3939libbsp_a_SOURCES =
    40 libbsp_a_CPPFLAGS = $(AM_CPPFLAGS)
    41 libbsp_a_LIBADD =
    4240
    4341# Shared
     
    8684
    8785# Cache
    88 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    89 libbsp_a_SOURCES += ../shared/include/arm-cache-l1.h
    90 libbsp_a_SOURCES += ../shared/armv467ar-basic-cache/cache_.h
    91 libbsp_a_CPPFLAGS += -I$(srcdir)/../shared/armv467ar-basic-cache
     86libbsp_a_SOURCES += ../../../../../../bsps/arm/shared/cache/cache-cp15.c
    9287
    9388# Start hooks
  • c/src/lib/libbsp/arm/rtl22xx/Makefile.am

    rd8d6a08 r4cf93658  
    5050
    5151# Cache
    52 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    53 libbsp_a_SOURCES += ../../shared/include/cache_.h
    54 libbsp_a_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/../../shared/include
     52libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c
    5553
    5654if HAS_NETWORKING
  • c/src/lib/libbsp/arm/smdk2410/Makefile.am

    rd8d6a08 r4cf93658  
    66
    77dist_project_lib_DATA = startup/bsp_specs
    8 
    9 libbsp_a_CPPFLAGS = $(AM_CPPFLAGS)
    108
    119DISTCLEANFILES = include/bspopts.h
     
    5957
    6058# Cache
    61 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    62 libbsp_a_SOURCES += ../shared/include/arm-cache-l1.h
    63 libbsp_a_SOURCES += ../shared/armv467ar-basic-cache/cache_.h
    64 libbsp_a_CPPFLAGS += -I$(srcdir)/../shared/armv467ar-basic-cache
     59libbsp_a_SOURCES += ../../../../../../bsps/arm/shared/cache/cache-cp15.c
    6560
    6661libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/arm920.rel
  • c/src/lib/libbsp/arm/stm32f4/Makefile.am

    rd8d6a08 r4cf93658  
    3131
    3232libbsp_a_SOURCES =
    33 libbsp_a_CPPFLAGS = $(AM_CPPFLAGS)
    34 libbsp_a_LIBADD =
    3533
    3634# Shared
     
    8684
    8785# Cache
    88 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    89 libbsp_a_SOURCES += ../../../libcpu/arm/shared/cache/cache_.h
    90 libbsp_a_CPPFLAGS += -I$(srcdir)/../../../libcpu/arm/shared/include
     86libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c
    9187
    9288###############################################################################
  • c/src/lib/libbsp/arm/tms570/Makefile.am

    rd8d6a08 r4cf93658  
    4040
    4141libbsp_a_SOURCES =
    42 libbsp_a_CPPFLAGS = $(AM_CPPFLAGS)
    43 libbsp_a_LIBADD =
    4442
    4543# Shared
     
    9795
    9896# Cache
    99 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    100 libbsp_a_SOURCES += ../../../libcpu/arm/shared/include/cache_.h
    101 libbsp_a_CPPFLAGS += -I$(srcdir)/../../../libcpu/arm/shared/include
     97libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c
    10298
    10399if TMS570_USE_HWINIT_STARTUP
  • c/src/lib/libbsp/arm/xilinx-zynq/Makefile.am

    rd8d6a08 r4cf93658  
    3636
    3737libbsp_a_SOURCES =
    38 libbsp_a_CPPFLAGS = $(AM_CPPFLAGS)
    39 libbsp_a_LIBADD =
    4038
    4139# Shared
     
    8583
    8684# Cache
    87 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    88 libbsp_a_SOURCES += ../shared/include/arm-cache-l1.h
    89 libbsp_a_SOURCES += ../shared/arm-l2c-310/cache_.h
    90 libbsp_a_CPPFLAGS += -I$(srcdir)/../shared/arm-l2c-310
     85libbsp_a_SOURCES += ../../../../../../bsps/arm/shared/cache/cache-l2c-310.c
    9186
    9287# Start hooks
  • c/src/lib/libbsp/bfin/TLL6527M/Makefile.am

    rd8d6a08 r4cf93658  
    3030
    3131libbsp_a_SOURCES += console/console.c
     32libbsp_a_SOURCES += ../../../../../../bsps/bfin/shared/cache/cache.c
    3233
    3334libbsp_a_LIBADD  = ../../../libcpu/@RTEMS_CPU@/mmu.rel
    3435libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/@RTEMS_CPU_MODEL@/interrupt.rel
    35 libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/cache.rel
    3636libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/uart.rel
    3737libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/clock.rel
  • c/src/lib/libbsp/bfin/bf537Stamp/Makefile.am

    rd8d6a08 r4cf93658  
    3131
    3232libbsp_a_SOURCES += console/console.c
     33libbsp_a_SOURCES += ../../../../../../bsps/bfin/shared/cache/cache.c
    3334
    3435if HAS_NETWORKING
     
    3839libbsp_a_LIBADD  = ../../../libcpu/@RTEMS_CPU@/mmu.rel
    3940libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/interrupt.rel
    40 libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/cache.rel
    4141libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/uart.rel
    4242libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/clock.rel
  • c/src/lib/libbsp/bfin/eZKit533/Makefile.am

    rd8d6a08 r4cf93658  
    3131
    3232libbsp_a_SOURCES += console/console-io.c
     33libbsp_a_SOURCES += ../../../../../../bsps/bfin/shared/cache/cache.c
    3334
    3435libbsp_a_LIBADD  = ../../../libcpu/@RTEMS_CPU@/mmu.rel
    3536libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/interrupt.rel
    36 libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/cache.rel
    3737libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/uart.rel
    3838libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/clock.rel
  • c/src/lib/libbsp/epiphany/epiphany_sim/Makefile.am

    rd8d6a08 r4cf93658  
    6363
    6464# Cache
    65 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    66 libbsp_a_SOURCES += ../../shared/include/cache_.h
    67 libbsp_a_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/../../shared/include
     65libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c
    6866
    6967# debugio
  • c/src/lib/libbsp/i386/pc386/Makefile.am

    rd8d6a08 r4cf93658  
    171171endif
    172172
    173 libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/cache.rel
    174 libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/page.rel
     173libbsp_a_SOURCES += ../../../../../../bsps/i386/shared/cache/cache.c
     174
     175libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/page.rel
    175176libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/score.rel
    176177
  • c/src/lib/libbsp/lm32/lm32_evr/Makefile.am

    rd8d6a08 r4cf93658  
    4242
    4343# Cache
    44 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    45 libbsp_a_SOURCES += ../../shared/include/cache_.h
    46 libbsp_a_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/../../shared/include
     44libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c
    4745
    4846if HAS_NETWORKING
  • c/src/lib/libbsp/lm32/milkymist/Makefile.am

    rd8d6a08 r4cf93658  
    8989
    9090# Cache
    91 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    92 libbsp_a_SOURCES += ../../shared/include/cache_.h
    93 libbsp_a_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/../../shared/include
     91libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c
    9492
    9593if HAS_NETWORKING
  • c/src/lib/libbsp/m32c/m32cbsp/Makefile.am

    rd8d6a08 r4cf93658  
    3535
    3636# Cache
    37 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    38 libbsp_a_SOURCES += ../../shared/include/cache_.h
    39 libbsp_a_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/../../shared/include
     37libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c
    4038
    4139include $(top_srcdir)/../../../../automake/local.am
  • c/src/lib/libbsp/m68k/av5282/Makefile.am

    rd8d6a08 r4cf93658  
    4141endif
    4242
     43libbsp_a_SOURCES += ../../../../../../bsps/m68k/shared/cache/cache-mcf5282.c
     44
    4345libbsp_a_LIBADD = \
    44     ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
    45     ../../../libcpu/@RTEMS_CPU@/mcf5282/cachepd.rel \
    4646    ../../../libcpu/@RTEMS_CPU@/shared/misc.rel
    4747
  • c/src/lib/libbsp/m68k/csb360/Makefile.am

    rd8d6a08 r4cf93658  
    3535
    3636# Cache
    37 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    38 libbsp_a_SOURCES += ../../shared/include/cache_.h
    39 libbsp_a_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/../../shared/include
     37libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c
    4038
    4139libbsp_a_LIBADD = \
  • c/src/lib/libbsp/m68k/gen68340/Makefile.am

    rd8d6a08 r4cf93658  
    3838libbsp_a_SOURCES += timer/timer.c
    3939
     40libbsp_a_SOURCES += ../../../../../../bsps/m68k/shared/cache/cache.c
     41
    4042libbsp_a_LIBADD = \
    41     ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
    4243    ../../../libcpu/@RTEMS_CPU@/shared/misc.rel
    4344
  • c/src/lib/libbsp/m68k/gen68360/Makefile.am

    rd8d6a08 r4cf93658  
    4343endif
    4444
     45libbsp_a_SOURCES += ../../../../../../bsps/m68k/shared/cache/cache.c
     46
    4547libbsp_a_LIBADD = \
    46     ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
    4748    ../../../libcpu/@RTEMS_CPU@/shared/misc.rel
    4849if HAS_FPSP
  • c/src/lib/libbsp/m68k/genmcf548x/Makefile.am

    rd8d6a08 r4cf93658  
    5050
    5151# Cache
    52 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    53 libbsp_a_SOURCES += ../include/cache_.h
    54 libbsp_a_CPPFLAGS += -I$(srcdir)/include
     52libbsp_a_SOURCES += ../../../../../../bsps/m68k/genmcf548x/start/cache.c
    5553
    5654if HAS_NETWORKING
  • c/src/lib/libbsp/m68k/mcf5206elite/Makefile.am

    rd8d6a08 r4cf93658  
    4545
    4646# Cache
    47 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    48 libbsp_a_SOURCES += ../../shared/include/cache_.h
    49 libbsp_a_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/../../shared/include
     47libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c
    5048
    5149libbsp_a_LIBADD = \
  • c/src/lib/libbsp/m68k/mcf52235/Makefile.am

    rd8d6a08 r4cf93658  
    3939libbsp_a_SOURCES += timer/timer.c
    4040
     41libbsp_a_SOURCES += ../../../../../../bsps/m68k/shared/cache/cache-mcf5223x.c
     42
    4143libbsp_a_LIBADD = \
    42     ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
    43     ../../../libcpu/@RTEMS_CPU@/mcf5223x/cachepd.rel \
    4444    ../../../libcpu/@RTEMS_CPU@/shared/misc.rel
    4545
  • c/src/lib/libbsp/m68k/mcf5225x/Makefile.am

    rd8d6a08 r4cf93658  
    3434libbsp_a_SOURCES += timer/timer.c
    3535
     36libbsp_a_SOURCES += ../../../../../../bsps/m68k/shared/cache/cache-mcf5225x.c
     37
    3638libbsp_a_LIBADD = \
    37     ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
    38     ../../../libcpu/@RTEMS_CPU@/mcf5225x/cachepd.rel \
    3939    ../../../libcpu/@RTEMS_CPU@/shared/misc.rel
    4040
  • c/src/lib/libbsp/m68k/mcf5235/Makefile.am

    rd8d6a08 r4cf93658  
    4343endif
    4444
     45libbsp_a_SOURCES += ../../../../../../bsps/m68k/shared/cache/cache-mcf5235.c
     46
    4547libbsp_a_LIBADD = \
    46     ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
    47     ../../../libcpu/@RTEMS_CPU@/mcf5235/cachepd.rel \
    4848    ../../../libcpu/@RTEMS_CPU@/shared/misc.rel
    4949
  • c/src/lib/libbsp/m68k/mcf5329/Makefile.am

    rd8d6a08 r4cf93658  
    4242endif
    4343
     44libbsp_a_SOURCES += ../../../../../../bsps/m68k/shared/cache/cache-mcf532x.c
     45
    4446libbsp_a_LIBADD = \
    45     ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
    46     ../../../libcpu/@RTEMS_CPU@/shared/misc.rel \
    47     ../../../libcpu/@RTEMS_CPU@/mcf532x/cachepd.rel
     47    ../../../libcpu/@RTEMS_CPU@/shared/misc.rel
    4848
    4949include $(top_srcdir)/../../../../automake/local.am
  • c/src/lib/libbsp/m68k/mrm332/Makefile.am

    rd8d6a08 r4cf93658  
    3939libbsp_a_SOURCES += timer/timer.c
    4040
     41libbsp_a_SOURCES += ../../../../../../bsps/m68k/shared/cache/cache.c
     42
    4143libbsp_a_LIBADD = \
    42     ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
    4344    ../../../libcpu/@RTEMS_CPU@/shared/misc.rel
    4445
  • c/src/lib/libbsp/m68k/mvme147/Makefile.am

    rd8d6a08 r4cf93658  
    3838libbsp_a_SOURCES += timer/timer.c timer/timerisr.S
    3939
     40libbsp_a_SOURCES += ../../../../../../bsps/m68k/shared/cache/cache.c
     41
    4042libbsp_a_LIBADD = \
    41     ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
    4243    ../../../libcpu/@RTEMS_CPU@/shared/misc.rel
    4344
  • c/src/lib/libbsp/m68k/mvme147s/Makefile.am

    rd8d6a08 r4cf93658  
    4646endif
    4747
     48libbsp_a_SOURCES += ../../../../../../bsps/m68k/shared/cache/cache.c
     49
    4850libbsp_a_LIBADD = \
    49     ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
    5051    ../../../libcpu/@RTEMS_CPU@/shared/misc.rel
    5152
  • c/src/lib/libbsp/m68k/mvme162/Makefile.am

    rd8d6a08 r4cf93658  
    4545endif
    4646
     47libbsp_a_SOURCES += ../../../../../../bsps/m68k/shared/cache/cache.c
     48
    4749libbsp_a_LIBADD = \
    48     ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
    4950    ../../../libcpu/@RTEMS_CPU@/shared/misc.rel
    5051if HAS_FPSP
  • c/src/lib/libbsp/m68k/mvme167/Makefile.am

    rd8d6a08 r4cf93658  
    4242endif
    4343
     44libbsp_a_SOURCES += ../../../../../../bsps/m68k/shared/cache/cache.c
     45
    4446libbsp_a_LIBADD = \
    45     ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
    4647    ../../../libcpu/@RTEMS_CPU@/shared/misc.rel \
    4748    ../../../libcpu/@RTEMS_CPU@/@RTEMS_CPU_MODEL@/fpsp.rel
  • c/src/lib/libbsp/m68k/uC5282/Makefile.am

    rd8d6a08 r4cf93658  
    4040endif
    4141
    42 libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
    43     ../../../libcpu/@RTEMS_CPU@/mcf5282/cachepd.rel \
    44     ../../../libcpu/@RTEMS_CPU@/shared/misc.rel
     42libbsp_a_SOURCES += ../../../../../../bsps/m68k/shared/cache/cache-mcf5282.c
     43
     44libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/misc.rel
    4545
    4646include $(top_srcdir)/../../../../automake/local.am
  • c/src/lib/libbsp/mips/csb350/Makefile.am

    rd8d6a08 r4cf93658  
    5454endif
    5555
    56 libbsp_a_LIBADD  = ../../../libcpu/mips/shared/cache.rel
    57 libbsp_a_LIBADD += ../../../libcpu/mips/shared/interrupts.rel
     56libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c
     57
     58libbsp_a_LIBADD = ../../../libcpu/mips/shared/interrupts.rel
    5859
    5960include $(top_srcdir)/../../../../automake/local.am
  • c/src/lib/libbsp/mips/hurricane/Makefile.am

    rd8d6a08 r4cf93658  
    5656libbsp_a_SOURCES += ../shared/irq/interruptmask.c
    5757
    58 libbsp_a_LIBADD  = ../../../libcpu/@RTEMS_CPU@/shared/cache.rel
    59 libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/shared/interrupts.rel
     58libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c
     59
     60libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/interrupts.rel
    6061libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/rm52xx/timer.rel
    6162
  • c/src/lib/libbsp/mips/jmr3904/Makefile.am

    rd8d6a08 r4cf93658  
    4848libbsp_a_SOURCES += ../shared/irq/interruptmask.c
    4949
    50 libbsp_a_LIBADD  = ../../../libcpu/@RTEMS_CPU@/shared/cache.rel
    51 libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/shared/interrupts.rel
     50libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c
     51
     52libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/interrupts.rel
    5253
    5354include $(top_srcdir)/../../../../automake/local.am
  • c/src/lib/libbsp/mips/malta/Makefile.am

    rd8d6a08 r4cf93658  
    5555libbsp_a_SOURCES += ../../shared/timerstub.c
    5656
    57 libbsp_a_LIBADD  = ../../../libcpu/@RTEMS_CPU@/shared/cache.rel
    58 libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/shared/interrupts.rel
     57libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c
     58
     59libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/interrupts.rel
    5960
    6061# pci
  • c/src/lib/libbsp/mips/rbtx4925/Makefile.am

    rd8d6a08 r4cf93658  
    5656libbsp_a_SOURCES += ../shared/irq/interruptmask_TX49.c
    5757
    58 libbsp_a_LIBADD  = ../../../libcpu/@RTEMS_CPU@/shared/cache.rel
    59 libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/shared/interrupts.rel
     58libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c
     59
     60libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/interrupts.rel
    6061libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/tx49/timer.rel
    6162
  • c/src/lib/libbsp/mips/rbtx4938/Makefile.am

    rd8d6a08 r4cf93658  
    5656libbsp_a_SOURCES += ../shared/irq/interruptmask_TX49.c
    5757
    58 libbsp_a_LIBADD  = ../../../libcpu/@RTEMS_CPU@/shared/cache.rel
    59 libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/shared/interrupts.rel
     58libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c
     59
     60libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/interrupts.rel
    6061libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/tx49/timer.rel
    6162
  • c/src/lib/libbsp/moxie/moxiesim/Makefile.am

    rd8d6a08 r4cf93658  
    4141
    4242# Cache
    43 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    44 libbsp_a_SOURCES += ../../shared/include/cache_.h
    45 libbsp_a_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/../../shared/include
     43libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c
    4644
    4745EXTRA_DIST += times
  • c/src/lib/libbsp/nios2/nios2_iss/Makefile.am

    rd8d6a08 r4cf93658  
    4545
    4646# Cache
    47 libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cache.rel
     47libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c
    4848
    4949include $(top_srcdir)/../../../../automake/local.am
  • c/src/lib/libbsp/or1k/generic_or1k/Makefile.am

    rd8d6a08 r4cf93658  
    7575
    7676# Cache
    77 libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/shared/cache.rel
     77libbsp_a_SOURCES += ../../../../../../bsps/or1k/shared/cache/cache.c
    7878
    7979###############################################################################
  • c/src/lib/libbsp/powerpc/beatnik/Makefile.am

    rd8d6a08 r4cf93658  
    164164libbsp_a_SOURCES += ../../shared/tod.c tod/todcfg.c
    165165
     166libbsp_a_SOURCES += ../../../../../../bsps/powerpc/shared/cache/cache.c
     167
    166168libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
    167     ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
    168169    ../../../libcpu/@RTEMS_CPU@/shared/stack.rel \
    169170    ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
  • c/src/lib/libbsp/powerpc/gen5200/Makefile.am

    rd8d6a08 r4cf93658  
    111111endif
    112112
     113libbsp_a_SOURCES += ../../../../../../bsps/powerpc/shared/cache/cache.c
     114
    113115libbsp_a_LIBADD =  ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
    114         ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
    115116        ../../../libcpu/@RTEMS_CPU@/shared/stack.rel \
    116117        ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
  • c/src/lib/libbsp/powerpc/gen83xx/Makefile.am

    rd8d6a08 r4cf93658  
    7474libbsp_a_SOURCES += spi/spi_init.c
    7575
    76 if HAS_NETWORKING
    77 libbsp_a_SOURCES += network/network.c
    78 libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/mpc83xx/tsec.rel
    79 endif
     76libbsp_a_SOURCES += ../../../../../../bsps/powerpc/shared/cache/cache.c
    8077
    8178libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
    82         ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
    8379        ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
    8480        ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
     
    8985        ../../../libcpu/@RTEMS_CPU@/mpc83xx/gtm.rel
    9086
     87if HAS_NETWORKING
     88libbsp_a_SOURCES += network/network.c
     89libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/mpc83xx/tsec.rel
     90endif
     91
    9192EXTRA_DIST += README.mpc8349eamds
    9293
  • c/src/lib/libbsp/powerpc/haleakala/Makefile.am

    rd8d6a08 r4cf93658  
    4343endif
    4444
     45libbsp_a_SOURCES += ../../../../../../bsps/powerpc/shared/cache/cache.c
     46
    4547libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
    4648    ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
    4749    ../../../libcpu/@RTEMS_CPU@/@exceptions@/irq_bspsupport.rel \
    48     ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
    4950    ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
    5051    ../../../libcpu/@RTEMS_CPU@/ppc403/clock.rel \
  • c/src/lib/libbsp/powerpc/motorola_powerpc/Makefile.am

    rd8d6a08 r4cf93658  
    115115endif
    116116
     117libbsp_a_SOURCES += ../../../../../../bsps/powerpc/shared/cache/cache.c
     118
    117119libbsp_a_LIBADD = \
    118120    polledIO.rel \
    119     ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
    120121    ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
    121122    ../../../libcpu/@RTEMS_CPU@/shared/stack.rel \
  • c/src/lib/libbsp/powerpc/mpc55xxevb/Makefile.am

    rd8d6a08 r4cf93658  
    107107# BSP library
    108108
     109libbsp_a_SOURCES += ../../../../../../bsps/powerpc/shared/cache/cache.c
     110
    109111libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
    110     ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
    111112    ../../../libcpu/@RTEMS_CPU@/shared/stack.rel \
    112113    ../../../libcpu/@RTEMS_CPU@/@RTEMS_CPU_MODEL@/misc.rel \
  • c/src/lib/libbsp/powerpc/mpc8260ads/Makefile.am

    rd8d6a08 r4cf93658  
    5555endif
    5656
     57libbsp_a_SOURCES += ../../../../../../bsps/powerpc/shared/cache/cache.c
     58
    5759libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
    58     ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
    5960    ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
    6061    ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
  • c/src/lib/libbsp/powerpc/mvme3100/Makefile.am

    rd8d6a08 r4cf93658  
    106106endif
    107107
     108libbsp_a_SOURCES += ../../../../../../bsps/powerpc/shared/cache/cache.c
     109
    108110libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
    109     ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
    110111    ../../../libcpu/@RTEMS_CPU@/shared/stack.rel \
    111112    ../../../libcpu/@RTEMS_CPU@/e500/clock.rel \
  • c/src/lib/libbsp/powerpc/mvme5500/Makefile.am

    rd8d6a08 r4cf93658  
    8484dist_project_lib_DATA += ../shared/startup/linkcmds.share
    8585
     86libbsp_a_SOURCES += ../../../../../../bsps/powerpc/shared/cache/cache.c
     87
    8688libbsp_a_LIBADD = \
    8789    ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
    8890    ../../../libcpu/@RTEMS_CPU@/shared/stack.rel \
    89     ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
    9091    ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
    9192    ../../../libcpu/@RTEMS_CPU@/mpc6xx/clock.rel \
  • c/src/lib/libbsp/powerpc/psim/Makefile.am

    rd8d6a08 r4cf93658  
    6161endif
    6262
     63libbsp_a_SOURCES += ../../../../../../bsps/powerpc/shared/cache/cache.c
     64
    6365libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
    64     ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
    6566    ../../../libcpu/@RTEMS_CPU@/shared/stack.rel \
    6667    ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
  • c/src/lib/libbsp/powerpc/qemuppc/Makefile.am

    rd8d6a08 r4cf93658  
    5252    $(irq_SOURCES)
    5353
     54libbsp_a_SOURCES += ../../../../../../bsps/powerpc/shared/cache/cache.c
     55
    5456libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
    55     ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
    5657    ../../../libcpu/@RTEMS_CPU@/shared/stack.rel \
    5758    ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
  • c/src/lib/libbsp/powerpc/qoriq/Makefile.am

    rd8d6a08 r4cf93658  
    9797        shmsupp/intercom-mpci.c
    9898
     99libbsp_a_SOURCES += ../../../../../../bsps/powerpc/shared/cache/cache.c
     100
    99101libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
    100         ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
    101102        ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
    102103        ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
  • c/src/lib/libbsp/powerpc/ss555/Makefile.am

    rd8d6a08 r4cf93658  
    3636libbsp_a_SOURCES += startup/tm27supp.c
    3737
     38libbsp_a_SOURCES += ../../../../../../bsps/powerpc/shared/cache/cache.c
     39
    3840libbsp_a_LIBADD = \
    3941    ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
    40     ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
    4142    ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
    4243    ../../../libcpu/@RTEMS_CPU@/mpc5xx/clock.rel \
  • c/src/lib/libbsp/powerpc/t32mppc/Makefile.am

    rd8d6a08 r4cf93658  
    6565libbsp_a_SOURCES += console/console.c
    6666
     67libbsp_a_SOURCES += ../../../../../../bsps/powerpc/shared/cache/cache.c
     68
    6769libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
    68         ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
    6970        ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
    7071        ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel
  • c/src/lib/libbsp/powerpc/tqm8xx/Makefile.am

    rd8d6a08 r4cf93658  
    6363endif
    6464
     65libbsp_a_SOURCES += ../../../../../../bsps/powerpc/shared/cache/cache.c
     66
    6567libbsp_a_LIBADD = \
    6668    ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
    67     ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
    6869    ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
    6970    ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
  • c/src/lib/libbsp/powerpc/virtex/Makefile.am

    rd8d6a08 r4cf93658  
    6767libbsp_a_LIBADD += ../../../libcpu/@RTEMS_CPU@/ppc403/timer.rel
    6868
     69libbsp_a_SOURCES += ../../../../../../bsps/powerpc/shared/cache/cache.c
     70
    6971libbsp_a_LIBADD += \
    7072    ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
    7173    ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
    72     ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
    7374    ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel
    7475
  • c/src/lib/libbsp/powerpc/virtex4/Makefile.am

    rd8d6a08 r4cf93658  
    4646libbsp_a_SOURCES += mmu/mmu.c
    4747
     48libbsp_a_SOURCES += ../../../../../../bsps/powerpc/shared/cache/cache.c
     49
    4850libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
    4951                  ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
    50                   ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
    5152                  ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
    5253                  ../../../libcpu/@RTEMS_CPU@/ppc403/clock.rel \
  • c/src/lib/libbsp/powerpc/virtex5/Makefile.am

    rd8d6a08 r4cf93658  
    4848libbsp_a_SOURCES += mmu/mmu.c
    4949
     50libbsp_a_SOURCES += ../../../../../../bsps/powerpc/shared/cache/cache.c
     51
    5052libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
    5153                  ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
    52                   ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
    5354                  ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel \
    5455                  ../../../libcpu/@RTEMS_CPU@/e500/clock.rel \
  • c/src/lib/libbsp/riscv/riscv_generic/Makefile.am

    rd8d6a08 r4cf93658  
    6464
    6565# Cache
    66 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    67 libbsp_a_SOURCES += ../../shared/include/cache_.h
    68 libbsp_a_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/../../shared/include
     66libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c
    6967
    7068# debugio
  • c/src/lib/libbsp/sh/gensh1/Makefile.am

    rd8d6a08 r4cf93658  
    4848
    4949# Cache
    50 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    51 libbsp_a_SOURCES += ../../shared/include/cache_.h
    52 libbsp_a_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/../../shared/include
     50libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c
    5351
    5452EXTRA_DIST += times
  • c/src/lib/libbsp/sh/gensh2/Makefile.am

    rd8d6a08 r4cf93658  
    5252
    5353# Cache
    54 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    55 libbsp_a_SOURCES += ../../shared/include/cache_.h
    56 libbsp_a_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/../../shared/include
     54libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c
    5755
    5856include $(top_srcdir)/../../../../automake/local.am
  • c/src/lib/libbsp/sh/gensh4/Makefile.am

    rd8d6a08 r4cf93658  
    3939
    4040# Cache
    41 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    42 libbsp_a_SOURCES += ../../shared/include/cache_.h
    43 libbsp_a_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/../../shared/include
     41libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c
    4442
    4543EXTRA_DIST += times
  • c/src/lib/libbsp/sh/shsim/Makefile.am

    rd8d6a08 r4cf93658  
    4848
    4949# Cache
    50 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    51 libbsp_a_SOURCES += ../../shared/include/cache_.h
    52 libbsp_a_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/../../shared/include
     50libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c
    5351
    5452include $(top_srcdir)/../../../../automake/local.am
  • c/src/lib/libbsp/sparc/erc32/Makefile.am

    rd8d6a08 r4cf93658  
    7777endif
    7878
     79libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c
     80
    7981libbsp_a_LIBADD  = \
    8082    ../../../libcpu/@RTEMS_CPU@/access.rel \
    81     ../../../libcpu/@RTEMS_CPU@/cache.rel \
    8283    ../../../libcpu/@RTEMS_CPU@/reg_win.rel \
    8384    ../../../libcpu/@RTEMS_CPU@/syscall.rel
  • c/src/lib/libbsp/sparc/leon2/Makefile.am

    rd8d6a08 r4cf93658  
    144144# l2cache
    145145libbsp_a_SOURCES += ../../sparc/shared/l2c/l2c.c
     146libbsp_a_SOURCES += ../../../../../../bsps/sparc/leon2/start/cache.c
    146147# griommu
    147148libbsp_a_SOURCES += ../../sparc/shared/iommu/griommu.c
     
    178179libbsp_a_LIBADD = \
    179180    ../../../libcpu/@RTEMS_CPU@/access.rel \
    180     ../../../libcpu/@RTEMS_CPU@/cache.rel \
    181181    ../../../libcpu/@RTEMS_CPU@/reg_win.rel \
    182182    ../../../libcpu/@RTEMS_CPU@/syscall.rel
  • c/src/lib/libbsp/sparc/leon3/Makefile.am

    rd8d6a08 r4cf93658  
    156156# l2cache
    157157libbsp_a_SOURCES += ../../sparc/shared/l2c/l2c.c
     158libbsp_a_SOURCES += ../../../../../../bsps/sparc/leon3/start/cache.c
    158159# griommu
    159160libbsp_a_SOURCES += ../../sparc/shared/iommu/griommu.c
     
    161162libbsp_a_SOURCES += timer/timer.c
    162163libbsp_a_SOURCES += timer/watchdog.c
    163 # Cache
    164 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    165 libbsp_a_SOURCES += include/cache_.h
    166 libbsp_a_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/include
    167164
    168165# GR712
  • c/src/lib/libbsp/sparc64/niagara/Makefile.am

    rd8d6a08 r4cf93658  
    5151    $(timer_SOURCES)
    5252
     53libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c
     54
    5355libbsp_a_LIBADD = \
    5456      ../../../libcpu/@RTEMS_CPU@/shared/shared-score.rel \
    55       ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
    5657      ../../../libcpu/@RTEMS_CPU@/shared/sparc64-syscall.rel
    5758
  • c/src/lib/libbsp/sparc64/usiii/Makefile.am

    rd8d6a08 r4cf93658  
    6464    $(timer_SOURCES)
    6565
     66libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c
    6667
    6768libbsp_a_LIBADD = \
    6869      ../../../libcpu/@RTEMS_CPU@/shared/shared-score.rel \
    69       ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
    7070      ../../../libcpu/@RTEMS_CPU@/shared/sparc64-syscall.rel
    7171
  • c/src/lib/libbsp/v850/gdbv850sim/Makefile.am

    rd8d6a08 r4cf93658  
    3939
    4040# Cache
    41 libbsp_a_SOURCES += ../../../libcpu/shared/src/cache_manager.c
    42 libbsp_a_SOURCES += ../../shared/include/cache_.h
    43 libbsp_a_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/../../shared/include
     41libbsp_a_SOURCES += ../../../../../../bsps/shared/cache/nocache.c
    4442
    4543noinst_LIBRARIES = libbsp.a
  • c/src/lib/libcpu/Makefile.am

    rd8d6a08 r4cf93658  
    11EXTRA_DIST =
    2 EXTRA_DIST += shared/include/cache.h
    3 EXTRA_DIST += shared/src/cache_manager.c
    42
    53_SUBDIRS = @libcpu_cpu_subdir@
  • c/src/lib/libcpu/bfin/Makefile.am

    rd8d6a08 r4cf93658  
    2222# endof bf52x
    2323############
    24 
    25 noinst_PROGRAMS += cache.rel
    26 cache_rel_SOURCES = cache/cache.c \
    27     ../shared/src/cache_manager.c cache/cache_.h
    28 cache_rel_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/cache
    29 cache_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
    3024
    3125noinst_PROGRAMS += mmu.rel
  • c/src/lib/libcpu/i386/Makefile.am

    rd8d6a08 r4cf93658  
    44
    55include $(top_srcdir)/../../../automake/compile.am
    6 
    7 noinst_PROGRAMS += cache.rel
    8 cache_rel_SOURCES = cache.c cache_.h \
    9     ../shared/src/cache_manager.c ../shared/include/cache.h
    10 cache_rel_CPPFLAGS = $(AM_CPPFLAGS)
    11 cache_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
    126
    137noinst_PROGRAMS += score.rel
  • c/src/lib/libcpu/lm32/Makefile.am

    rd8d6a08 r4cf93658  
    88
    99if shared
    10 
    11 noinst_PROGRAMS += shared/cache.rel
    12 shared_cache_rel_SOURCES = ../shared/src/no_cache.c shared/cache/cache_.h \
    13     ../shared/src/cache_manager.c
    14 shared_cache_rel_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/shared/cache
    15 shared_cache_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
    16 
    1710## shared/misc
    1811noinst_PROGRAMS += shared/misc.rel
  • c/src/lib/libcpu/m68k/Makefile.am

    rd8d6a08 r4cf93658  
    66
    77if shared
    8 
    9 noinst_PROGRAMS += shared/cache.rel
    10 shared_cache_rel_SOURCES = shared/cache/cache.c
    11 shared_cache_rel_SOURCES += shared/cache/cache_.h
    12 shared_cache_rel_SOURCES += ../shared/src/cache_manager.c
    13 shared_cache_rel_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/shared/cache
    14 shared_cache_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
    158
    169## shared/misc
     
    9386endif
    9487
    95 if mcf5223x
    96 ## mcf5223x/include
    97 ## mcf5223x/cache
    98 noinst_PROGRAMS += mcf5223x/cachepd.rel
    99 mcf5223x_cachepd_rel_SOURCES = mcf5223x/cache/cachepd.c
    100 mcf5223x_cachepd_rel_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/shared/cache
    101 mcf5223x_cachepd_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
    102 endif
    103 
    104 if mcf5225x
    105 ## mcf5225x/include
    106 # mcf5225x/cache
    107 noinst_PROGRAMS += mcf5225x/cachepd.rel
    108 mcf5225x_cachepd_rel_SOURCES = mcf5225x/cache/cachepd.c
    109 mcf5225x_cachepd_rel_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/shared/cache
    110 mcf5225x_cachepd_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
    111 
    112 # Network
    113 if HAS_NETWORKING
    114 endif ## HAS_NETWORKING
    115 endif
    116 
    117 if mcf5235
    118 ## mcf5235/include
    119 ## mcf5235/cache
    120 noinst_PROGRAMS += mcf5235/cachepd.rel
    121 mcf5235_cachepd_rel_SOURCES = mcf5235/cache/cachepd.c
    122 mcf5235_cachepd_rel_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/shared/cache
    123 mcf5235_cachepd_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
    124 endif
    125 
    126 if mcf532x
    127 ## mcf532x/include
    128 ## mcf532x/cache
    129 noinst_PROGRAMS += mcf532x/cachepd.rel
    130 mcf532x_cachepd_rel_SOURCES = mcf532x/cache/cachepd.c
    131 mcf532x_cachepd_rel_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/shared/cache
    132 mcf532x_cachepd_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
    133 endif
    134 
    13588if mcf5272
    13689## mcf5272/include
     
    148101endif
    149102
    150 if mcf5282
    151 ## mcf5282/include
    152 noinst_PROGRAMS += mcf5282/cachepd.rel
    153 mcf5282_cachepd_rel_SOURCES = mcf5282/cache/cachepd.c
    154 mcf5282_cachepd_rel_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/shared/cache
    155 mcf5282_cachepd_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
    156 endif
    157 
    158103if mcf548x
    159104## mcf548x/include
  • c/src/lib/libcpu/mips/Makefile.am

    rd8d6a08 r4cf93658  
    66
    77noinst_PROGRAMS =
    8 
    9 ## cache
    10 noinst_PROGRAMS += shared/cache.rel
    11 shared_cache_rel_SOURCES = shared/cache/cache.c \
    12     ../shared/src/cache_manager.c shared/cache/cache_.h
    13 shared_cache_rel_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/shared/cache
    14 shared_cache_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
    158
    169## interrupts
  • c/src/lib/libcpu/nios2/Makefile.am

    rd8d6a08 r4cf93658  
    88
    99if shared
    10 
    11 ## shared/cache
    12 noinst_PROGRAMS += shared/cache.rel
    13 shared_cache_rel_SOURCES = ../shared/src/no_cache.c shared/cache/cache_.h \
    14     ../shared/src/cache_manager.c
    15 shared_cache_rel_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/shared/cache
    16 shared_cache_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
    17 
    1810## shared/misc
    1911noinst_PROGRAMS += shared/misc.rel
  • c/src/lib/libcpu/powerpc/Makefile.am

    rd8d6a08 r4cf93658  
    5252shared_cpuIdent_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
    5353
    54 # shared/cache
    55 noinst_PROGRAMS += shared/cache.rel
    56 shared_cache_rel_SOURCES = shared/src/cache_.h \
    57     ../shared/src/cache_manager.c \
    58     ../shared/include/cache.h
    59 shared_cache_rel_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/shared/src
    60 shared_cache_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
    61 
    6254# shared/stack
    6355noinst_PROGRAMS += shared/stack.rel
  • c/src/lib/libcpu/sparc/Makefile.am

    rd8d6a08 r4cf93658  
    44
    55noinst_PROGRAMS =
    6 
    7 noinst_PROGRAMS += cache.rel
    8 cache_rel_SOURCES = cache/cache_.h \
    9     ../shared/src/cache_manager.c
    10 cache_rel_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/cache
    11 cache_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
    12 
    13 if has_instruction_cache
    14 cache_rel_CPPFLAGS += -DHAS_INSTRUCTION_CACHE
    15 endif
    166
    177noinst_PROGRAMS += syscall.rel
  • c/src/lib/libcpu/sparc/configure.ac

    rd8d6a08 r4cf93658  
    2222RTEMS_PROG_CCAS
    2323
    24 AM_CONDITIONAL(has_instruction_cache, test "$RTEMS_CPU_MODEL" = "leon1" \
    25 || test "$RTEMS_CPU_MODEL" = "leon2" || test "$RTEMS_CPU_MODEL" = "leon3" )
    26 
    2724RTEMS_AMPOLISH3
    2825
  • c/src/lib/libcpu/sparc64/Makefile.am

    rd8d6a08 r4cf93658  
    2222shared_sparc64_syscall_rel_CPPFLAGS = $(AM_CPPFLAGS)
    2323shared_sparc64_syscall_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
    24 
    25 noinst_PROGRAMS += shared/cache.rel
    26 shared_cache_rel_SOURCES = shared/cache/cache.c shared/cache/cache_.h \
    27     ../shared/src/cache_manager.c
    28 shared_cache_rel_CPPFLAGS = $(AM_CPPFLAGS) -I$(srcdir)/shared/cache
    29 shared_cache_rel_LDFLAGS = $(RTEMS_RELLDFLAGS)
    3024endif
    31 
    32 #if has_instruction_cache
    33 #cache_rel_CPPFLAGS += -DHAS_INSTRUCTION_CACHE
    34 #endif
    35 
    36 
    3725
    3826### This is an example of how to define a separate score implementation.
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