Changeset 4cc9094 in rtems-docs


Ignore:
Timestamp:
Oct 28, 2016, 7:50:47 PM (3 years ago)
Author:
Joel Sherrill <joel@…>
Branches:
4.11, master
Children:
01a36ee
Parents:
30c32cb
git-author:
Joel Sherrill <joel@…> (10/28/16 19:50:47)
git-committer:
Joel Sherrill <joel@…> (10/28/16 20:55:45)
Message:

cpu_supplement: Fixed numbered list

File:
1 edited

Legend:

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  • cpu_supplement/powerpc.rst

    r30c32cb r4cc9094  
    173173The following multilibs are available:
    174174
    175 # ``.``: 32-bit PowerPC with FPU
    176 
    177 # ``nof``: 32-bit PowerPC with software floating point support
    178 
    179 # ``m403``: Instruction set for PPC403 with FPU
    180 
    181 # ``m505``: Instruction set for MPC505 with FPU
    182 
    183 # ``m603e``: Instruction set for MPC603e with FPU
    184 
    185 # ``m603e/nof``: Instruction set for MPC603e with software floating
    186   point support
    187 
    188 # ``m604``: Instruction set for MPC604 with FPU
    189 
    190 # ``m604/nof``: Instruction set for MPC604 with software floating point
    191   support
    192 
    193 # ``m860``: Instruction set for MPC860 with FPU
    194 
    195 # ``m7400``: Instruction set for MPC7500 with FPU
    196 
    197 # ``m7400/nof``: Instruction set for MPC7500 with software floating
    198   point support
    199 
    200 # ``m8540``: Instruction set for e200, e500 and e500v2 cores with
    201   single-precision FPU and SPE
    202 
    203 # ``m8540/gprsdouble``: Instruction set for e200, e500 and e500v2 cores
    204   with double-precision FPU and SPE
    205 
    206 # ``m8540/nof/nospe``: Instruction set for e200, e500 and e500v2 cores
    207   with software floating point support and no SPE
    208 
    209 # ``me6500/m32``: 32-bit instruction set for e6500 core with FPU and
    210   AltiVec
    211 
    212 # ``me6500/m32/nof/noaltivec``: 32-bit instruction set for e6500 core
    213   with software floating point support and no AltiVec
     175#. ``.``: 32-bit PowerPC with FPU
     176
     177#. ``nof``: 32-bit PowerPC with software floating point support
     178
     179#. ``m403``: Instruction set for PPC403 with FPU
     180
     181#. ``m505``: Instruction set for MPC505 with FPU
     182
     183#. ``m603e``: Instruction set for MPC603e with FPU
     184
     185#. ``m603e/nof``: Instruction set for MPC603e with software floating
     186   point support
     187
     188#. ``m604``: Instruction set for MPC604 with FPU
     189
     190#. ``m604/nof``: Instruction set for MPC604 with software floating point
     191   support
     192
     193#. ``m860``: Instruction set for MPC860 with FPU
     194
     195#. ``m7400``: Instruction set for MPC7500 with FPU
     196
     197#. ``m7400/nof``: Instruction set for MPC7500 with software floating
     198   point support
     199
     200#. ``m8540``: Instruction set for e200, e500 and e500v2 cores with
     201   single-precision FPU and SPE
     202
     203#. ``m8540/gprsdouble``: Instruction set for e200, e500 and e500v2 cores
     204   with double-precision FPU and SPE
     205
     206#. ``m8540/nof/nospe``: Instruction set for e200, e500 and e500v2 cores
     207   with software floating point support and no SPE
     208
     209#. ``me6500/m32``: 32-bit instruction set for e6500 core with FPU and
     210   AltiVec
     211
     212#. ``me6500/m32/nof/noaltivec``: 32-bit instruction set for e6500 core
     213   with software floating point support and no AltiVec
    214214
    215215Calling Conventions
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