Changeset 4c89fbcd in rtems


Ignore:
Timestamp:
09/27/22 05:43:37 (4 months ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
master
Children:
8d44129d
Parents:
15bba4ae
git-author:
Sebastian Huber <sebastian.huber@…> (09/27/22 05:43:37)
git-committer:
Sebastian Huber <sebastian.huber@…> (10/14/22 08:48:22)
Message:

score: Add CPU_THREAD_LOCAL_STORAGE_VARIANT

Update #3835.

Files:
40 edited

Legend:

Unmodified
Added
Removed

  • bsps/powerpc/shared/cpu.c

    r15bba4ae r4c89fbcd  
    131131
    132132  if ( tls_area != NULL ) {
    133     void *tls_block = _TLS_TCB_before_TLS_block_initialize( tls_area );
     133    void *tls_block = _TLS_Initialize_area( tls_area );
    134134
    135135    the_ppc_context->tp = (uintptr_t) tls_block + 0x7000;

  • cpukit/include/rtems/score/tls.h

    r15bba4ae r4c89fbcd  
    1111
    1212/*
    13  * Copyright (c) 2014 embedded brains GmbH.  All rights reserved.
     13 * Copyright (C) 2014, 2022 embedded brains GmbH
    1414 *
    1515 * Redistribution and use in source and binary forms, with or without
    … …  
    3838#define _RTEMS_SCORE_TLS_H
    3939
    40 #include <rtems/score/cpu.h>
     40#include <rtems/score/cpuimpl.h>
    4141
    4242#include <string.h>
    … …  
    117117
    118118/**
    119  * @brief Gets the TLS size.
    120  *
    121  * @return The TLS size.
     119 * @brief Gets the size of the thread-local storage data in bytes.
     120 *
     121 * @return Returns the size of the thread-local storage data in bytes.
    122122 */
    123123static inline uintptr_t _TLS_Get_size( void )
    … …  
    136136
    137137/**
    138  * @brief Returns the value aligned up to the stack alignment.
    139  *
    140  * @param val The value to align.
    141  *
    142  * @return The value aligned to the stack alignment.
    143  */
    144 static inline uintptr_t _TLS_Align_up( uintptr_t val )
    145 {
    146   uintptr_t alignment = CPU_STACK_ALIGNMENT;
    147 
    148   return RTEMS_ALIGN_UP( val, alignment );
    149 }
    150 
    151 /**
    152  * @brief Returns the size of the thread control block area size for this
    153  *      alignment, or the minimum size if alignment is too small.
    154  *
    155  * @param alignment The alignment for the operation.
    156  *
    157  * @return The size of the thread control block area.
    158  */
    159 static inline uintptr_t _TLS_Get_thread_control_block_area_size(
    160   uintptr_t alignment
    161 )
    162 {
    163   return alignment <= sizeof(TLS_Thread_control_block) ?
    164     sizeof(TLS_Thread_control_block) : alignment;
    165 }
    166 
    167 /**
    168  * @brief Return the TLS area allocation size.
    169  *
    170  * @return The TLS area allocation size.
     138 * @brief Gets the size of the thread control block area in bytes.
     139 *
     140 * @return Returns the size of the thread control block area in bytes.
     141 */
     142static inline uintptr_t _TLS_Get_thread_control_block_area_size( void )
     143{
     144#if CPU_THREAD_LOCAL_STORAGE_VARIANT == 11
     145  uintptr_t alignment;
     146
     147  alignment = (uintptr_t) _TLS_Alignment;
     148
     149  return RTEMS_ALIGN_UP( sizeof( TLS_Thread_control_block ), alignment );
     150#else
     151  return sizeof( TLS_Thread_control_block );
     152#endif
     153}
     154
     155/**
     156 * @brief Gets the allocation size of the thread-local storage area in bytes.
     157 *
     158 * @return Returns the allocation size of the thread-local storage area in
     159 *   bytes.
    171160 */
    172161uintptr_t _TLS_Get_allocation_size( void );
    173162
    174163/**
    175  * @brief Copies TLS size bytes from the address tls_area and returns a pointer
    176  *      to the start of the area after clearing it.
    177  *
    178  * @param tls_area The starting address of the area to clear.
    179  *
    180  * @return The pointer to the beginning of the cleared section.
    181  */
    182 static inline void *_TLS_Copy_and_clear( void *tls_area )
    183 {
    184   tls_area = memcpy(
    185     tls_area,
     164 * @brief Initializes the thread-local storage data.
     165 *
     166 * @param[out] tls_data is the thread-local storage data to initialize.
     167 */
     168static inline void _TLS_Copy_and_clear( void *tls_data )
     169{
     170  tls_data = memcpy(
     171    tls_data,
    186172    _TLS_Data_begin,
    187173    (size_t) ((uintptr_t)_TLS_Data_size)
    188174  );
    189175
    190 
    191176  memset(
    192     (char *) tls_area + (size_t)((intptr_t) _TLS_BSS_begin) -
     177    (char *) tls_data + (size_t)((intptr_t) _TLS_BSS_begin) -
    193178      (size_t)((intptr_t) _TLS_Data_begin),
    194179    0,
    195180    ((size_t) (intptr_t)_TLS_BSS_size)
    196181  );
    197 
    198   return tls_area;
    199 }
    200 
    201 /**
    202  * @brief Initializes the dynamic thread vector.
    203  *
    204  * @param tls_block The tls block for @a dtv.
    205  * @param tcb The thread control block for @a dtv.
    206  * @param[out] dtv The dynamic thread vector to initialize.
    207  *
    208  * @return Pointer to an area that was copied and cleared from tls_block
    209  *       onwards (@see _TLS_Copy_and_clear).
    210  */
    211 static inline void *_TLS_Initialize(
    212   void *tls_block,
    213   TLS_Thread_control_block *tcb,
     182}
     183
     184/**
     185 * @brief Initializes the thread control block and the dynamic thread vector.
     186 *
     187 * @param tls_data is the thread-local storage data address.
     188 *
     189 * @param[out] tcb is the thread control block to initialize.
     190 *
     191 * @param[out] dtv is the dynamic thread vector to initialize.
     192 */
     193static inline void _TLS_Initialize_TCB_and_DTV(
     194  void                      *tls_data,
     195  TLS_Thread_control_block  *tcb,
    214196  TLS_Dynamic_thread_vector *dtv
    215197)
    … …  
    221203  tcb->dtv = dtv;
    222204  dtv->generation_number = 1;
    223   dtv->tls_blocks[0] = tls_block;
    224 #endif
    225 
    226   return _TLS_Copy_and_clear( tls_block );
    227 }
    228 
    229 /**
    230  * @brief Initializes a dynamic thread vector beginning at the given starting
    231  *      address.
    232  *
    233  * Use Variant I, TLS offsets emitted by linker takes the TCB into account.
    234  *
    235  * @param tls_area The tls area for the initialization.
    236  *
    237  * @return Pointer to an area that was copied and cleared from tls_block
    238  *       onwards (@see _TLS_Copy_and_clear).
    239  */
    240 static inline void *_TLS_TCB_at_area_begin_initialize( void *tls_area )
    241 {
    242   void *tls_block = (char *) tls_area
    243     + _TLS_Get_thread_control_block_area_size( (uintptr_t) _TLS_Alignment );
    244   TLS_Thread_control_block *tcb = (TLS_Thread_control_block *) tls_area;
    245   uintptr_t aligned_size = _TLS_Align_up( (uintptr_t) _TLS_Size );
    246   TLS_Dynamic_thread_vector *dtv = (TLS_Dynamic_thread_vector *)
    247     ((char *) tls_block + aligned_size);
    248 
    249   return _TLS_Initialize( tls_block, tcb, dtv );
    250 }
    251 
    252 /**
    253  * @brief Initializes a dynamic thread vector with the area before a given
    254  * starting address as thread control block.
    255  *
    256  * Use Variant I, TLS offsets emitted by linker neglects the TCB.
    257  *
    258  * @param tls_area The tls area for the initialization.
    259  *
    260  * @return Pointer to an area that was copied and cleared from tls_block
    261  *       onwards (@see _TLS_Copy_and_clear).
    262  */
    263 static inline void *_TLS_TCB_before_TLS_block_initialize( void *tls_area )
    264 {
    265   void *tls_block = (char *) tls_area
    266     + _TLS_Get_thread_control_block_area_size( (uintptr_t) _TLS_Alignment );
    267   TLS_Thread_control_block *tcb = (TLS_Thread_control_block *)
    268     ((char *) tls_block - sizeof(*tcb));
    269   uintptr_t aligned_size = _TLS_Align_up( (uintptr_t) _TLS_Size );
    270   TLS_Dynamic_thread_vector *dtv = (TLS_Dynamic_thread_vector *)
    271     ((char *) tls_block + aligned_size);
    272 
    273   return _TLS_Initialize( tls_block, tcb, dtv );
    274 }
    275 
    276 /**
    277  * @brief Initializes a dynamic thread vector with the area after a given
    278  * starting address as thread control block.
    279  *
    280  * Use Variant II
    281  *
    282  * @param tls_area The tls area for the initialization.
    283  *
    284  * @return Pointer to an area that was copied and cleared from tls_block
    285  *       onwards (@see _TLS_Copy_and_clear).
    286  */
    287 static inline void *_TLS_TCB_after_TLS_block_initialize( void *tls_area )
    288 {
    289   uintptr_t size = (uintptr_t) _TLS_Size;
    290   uintptr_t tls_align = (uintptr_t) _TLS_Alignment;
    291   uintptr_t tls_mask = tls_align - 1;
    292   uintptr_t heap_align = _TLS_Align_up( tls_align );
    293   uintptr_t heap_mask = heap_align - 1;
    294   TLS_Thread_control_block *tcb = (TLS_Thread_control_block *)
    295     ((char *) tls_area + ((size + heap_mask) & ~heap_mask));
    296   void *tls_block = (char *) tcb - ((size + tls_mask) & ~tls_mask);
    297   TLS_Dynamic_thread_vector *dtv = (TLS_Dynamic_thread_vector *)
    298     ((char *) tcb + sizeof(*tcb));
    299 
    300   _TLS_Initialize( tls_block, tcb, dtv );
    301 
    302   return tcb;
     205  dtv->tls_blocks[0] = tls_data;
     206#endif
     207}
     208
     209/**
     210 * @brief Initializes the thread-local storage area.
     211 *
     212 * @param tls_area[out] is the thread-local storage area to initialize.
     213 *
     214 * @return Where the architectures uses Variant I and the TLS offsets emitted
     215 *   by the linker neglect the TCB, returns the address of the thread-local
     216 *   storage data.  Otherwise, returns the address of the thread control block.
     217 */
     218static inline void *_TLS_Initialize_area( void *tls_area )
     219{
     220  uintptr_t                  alignment;
     221  void                      *tls_data;
     222  TLS_Thread_control_block  *tcb;
     223  TLS_Dynamic_thread_vector *dtv;
     224  void                      *return_value;
     225#if CPU_THREAD_LOCAL_STORAGE_VARIANT == 11
     226  uintptr_t                  tcb_size;
     227#endif
     228#if CPU_THREAD_LOCAL_STORAGE_VARIANT == 20
     229  uintptr_t                  size;
     230  uintptr_t                  alignment_2;
     231#endif
     232
     233  alignment = (uintptr_t) _TLS_Alignment;
     234
     235#ifdef __i386__
     236  dtv = NULL;
     237#else
     238  dtv = (TLS_Dynamic_thread_vector *) tls_area;
     239  tls_area = (char *) tls_area + sizeof( *dtv );
     240#endif
     241
     242#if CPU_THREAD_LOCAL_STORAGE_VARIANT == 10
     243  tls_data = (void *)
     244    RTEMS_ALIGN_UP( (uintptr_t) tls_area + sizeof( *tcb ), alignment );
     245  tcb = (TLS_Thread_control_block *) ((char *) tls_data - sizeof( *tcb ));
     246  return_value = tls_data;
     247#elif CPU_THREAD_LOCAL_STORAGE_VARIANT == 11
     248  tcb_size = RTEMS_ALIGN_UP( sizeof( *tcb ), alignment );
     249  tls_data = (void *)
     250    RTEMS_ALIGN_UP( (uintptr_t) tls_area + tcb_size, alignment );
     251  tcb = (TLS_Thread_control_block *) ((char *) tls_data - tcb_size);
     252  return_value = tcb;
     253#elif CPU_THREAD_LOCAL_STORAGE_VARIANT == 20
     254  alignment_2 = RTEMS_ALIGN_UP( alignment, CPU_SIZEOF_POINTER );
     255  tls_area = (void *) RTEMS_ALIGN_UP( (uintptr_t) tls_area, alignment_2 );
     256  size = _TLS_Get_size();
     257  tcb = (TLS_Thread_control_block *)
     258    ((char *) tls_area + RTEMS_ALIGN_UP( size, alignment_2 ));
     259  tls_data = (char *) tcb - RTEMS_ALIGN_UP( size, alignment );
     260  return_value = tcb;
     261#else
     262#error "unexpected CPU_THREAD_LOCAL_STORAGE_VARIANT value"
     263#endif
     264
     265  _TLS_Initialize_TCB_and_DTV( tls_data, tcb, dtv );
     266  _TLS_Copy_and_clear( tls_data );
     267
     268  return return_value;
    303269}
    304270

  • cpukit/score/cpu/aarch64/cpu.c

    r15bba4ae r4c89fbcd  
    143143
    144144  if ( tls_area != NULL ) {
    145     _TLS_TCB_at_area_begin_initialize( tls_area );
     145    the_context->thread_id = (uintptr_t) _TLS_Initialize_area( tls_area );
    146146  }
    147147}

  • cpukit/score/cpu/aarch64/include/rtems/score/cpuimpl.h

    r15bba4ae r4c89fbcd  
    5151
    5252#define CPU_PER_CPU_CONTROL_SIZE 0
     53
    5354#define CPU_INTERRUPT_FRAME_SIZE 0x2E0
     55
     56#define CPU_THREAD_LOCAL_STORAGE_VARIANT 11
    5457
    5558#ifndef ASM

  • cpukit/score/cpu/arm/__aeabi_read_tp.c

    r15bba4ae r4c89fbcd  
    4343    "ldr r0, [r0, %[executingoff]]\n"
    4444#if defined(__thumb__) && !defined(__thumb2__)
    45     "add r0, %[tlsareaoff]\n"
     45    "add r0, %[threadidoff]\n"
    4646    "ldr r0, [r0]\n"
    4747#else
    48     "ldr r0, [r0, %[tlsareaoff]]\n"
     48    "ldr r0, [r0, %[threadidoff]]\n"
    4949#endif
    5050    "bx lr\n"
    5151    :
    5252    : [executingoff] "I" (offsetof(Per_CPU_Control, executing)),
    53       [tlsareaoff] "I" (offsetof(Thread_Control, Start.tls_area))
     53      [threadidoff] "I" (offsetof(Thread_Control, Registers.thread_id))
    5454  );
    5555}

  • cpukit/score/cpu/arm/__tls_get_addr.c

    r15bba4ae r4c89fbcd  
    4040{
    4141  const Thread_Control *executing = _Thread_Get_executing();
    42   void *tls_block = (char *) executing->Start.tls_area
    43     + _TLS_Get_thread_control_block_area_size( (uintptr_t) _TLS_Alignment );
     42  void *tls_data = (char *) executing->Registers.thread_id
     43    + _TLS_Get_thread_control_block_area_size();
    4444
    4545  assert(ti->module == 1);
    4646
    47   return (char *) tls_block + ti->offset;
     47  return (char *) tls_data + ti->offset;
    4848}

  • cpukit/score/cpu/arm/armv7m-context-initialize.c

    r15bba4ae r4c89fbcd  
    6262
    6363  if ( tls_area != NULL ) {
    64     _TLS_TCB_at_area_begin_initialize( tls_area );
     64    _TLS_Initialize_area( tls_area );
    6565  }
    6666}

  • cpukit/score/cpu/arm/cpu.c

    r15bba4ae r4c89fbcd  
    5757#endif
    5858
    59 #ifdef ARM_MULTILIB_HAS_THREAD_ID_REGISTER
    60   RTEMS_STATIC_ASSERT(
    61     offsetof( Context_Control, thread_id )
    62       == ARM_CONTEXT_CONTROL_THREAD_ID_OFFSET,
    63     ARM_CONTEXT_CONTROL_THREAD_ID_OFFSET
    64   );
    65 #endif
     59RTEMS_STATIC_ASSERT(
     60  offsetof( Context_Control, thread_id )
     61    == ARM_CONTEXT_CONTROL_THREAD_ID_OFFSET,
     62  ARM_CONTEXT_CONTROL_THREAD_ID_OFFSET
     63);
    6664
    6765#ifdef ARM_MULTILIB_ARCH_V4
    … …  
    119117  the_context->register_lr = (uint32_t) entry_point;
    120118  the_context->isr_dispatch_disable = 0;
    121 
    122 #ifdef ARM_MULTILIB_HAS_THREAD_ID_REGISTER
    123119  the_context->thread_id = (uint32_t) tls_area;
    124 #endif
    125120
    126121  if ( tls_area != NULL ) {
    127     _TLS_TCB_at_area_begin_initialize( tls_area );
     122    the_context->thread_id = (uint32_t) _TLS_Initialize_area( tls_area );
    128123  }
    129124}

  • cpukit/score/cpu/arm/include/rtems/score/cpu.h

    r15bba4ae r4c89fbcd  
    177177#define CPU_MAXIMUM_PROCESSORS 32
    178178
    179 #ifdef ARM_MULTILIB_HAS_THREAD_ID_REGISTER
    180   #define ARM_CONTEXT_CONTROL_THREAD_ID_OFFSET 44
    181 #endif
     179#define ARM_CONTEXT_CONTROL_THREAD_ID_OFFSET 44
    182180
    183181#ifdef ARM_MULTILIB_VFP
    … …  
    192190  #if defined(ARM_MULTILIB_VFP)
    193191    #define ARM_CONTEXT_CONTROL_IS_EXECUTING_OFFSET 112
    194   #elif defined(ARM_MULTILIB_HAS_THREAD_ID_REGISTER)
     192  #else
    195193    #define ARM_CONTEXT_CONTROL_IS_EXECUTING_OFFSET 48
    196   #else
    197     #define ARM_CONTEXT_CONTROL_IS_EXECUTING_OFFSET 44
    198194  #endif
    199195#endif
    … …  
    241237  void *register_sp;
    242238#endif
    243 #ifdef ARM_MULTILIB_HAS_THREAD_ID_REGISTER
    244239  uint32_t thread_id;
    245 #endif
    246240#ifdef ARM_MULTILIB_VFP
    247241  uint64_t register_d8;

  • cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h

    r15bba4ae r4c89fbcd  
    6060
    6161#endif /* ARM_MULTILIB_ARCH_V4 */
     62
     63#define CPU_THREAD_LOCAL_STORAGE_VARIANT 11
    6264
    6365#ifndef ASM

  • cpukit/score/cpu/bfin/include/rtems/score/cpuimpl.h

    r15bba4ae r4c89fbcd  
    2929
    3030#define CPU_PER_CPU_CONTROL_SIZE 0
     31
     32#define CPU_THREAD_LOCAL_STORAGE_VARIANT 10
    3133
    3234#ifndef ASM

  • cpukit/score/cpu/i386/cpu.c

    r15bba4ae r4c89fbcd  
    194194
    195195  if ( tls_area != NULL ) {
    196     tcb = (uint32_t) _TLS_TCB_after_TLS_block_initialize( tls_area );
     196    tcb = (uint32_t) _TLS_Initialize_area( tls_area );
    197197  } else {
    198198    tcb = 0;

  • cpukit/score/cpu/i386/include/rtems/score/cpuimpl.h

    r15bba4ae r4c89fbcd  
    5050
    5151#define CPU_INTERRUPT_FRAME_SIZE 52
     52
     53#define CPU_THREAD_LOCAL_STORAGE_VARIANT 20
    5254
    5355#ifndef ASM

  • cpukit/score/cpu/lm32/include/rtems/score/cpuimpl.h

    r15bba4ae r4c89fbcd  
    2828
    2929#define CPU_PER_CPU_CONTROL_SIZE 0
     30
     31#define CPU_THREAD_LOCAL_STORAGE_VARIANT 10
    3032
    3133#ifndef ASM

  • cpukit/score/cpu/m68k/__m68k_read_tp.c

    r15bba4ae r4c89fbcd  
    3838{
    3939  const Thread_Control *executing = _Thread_Get_executing();
    40   void *tp = (char *) executing->Start.tls_area +
    41     _TLS_Get_thread_control_block_area_size((uintptr_t) _TLS_Alignment)
    42     + 0x7000;
     40  void *tp = executing->Registers.thread_pointer;
    4341
    4442  __asm__ volatile (

  • cpukit/score/cpu/m68k/cpu.c

    r15bba4ae r4c89fbcd  
    280280
    281281  if ( tls_area != NULL ) {
    282     _TLS_TCB_before_TLS_block_initialize( tls_area );
     282    the_context->thread_pointer =
     283      (char *) _TLS_Initialize_area( tls_area ) + 0x7000;
     284  } else {
     285    the_context->thread_pointer = NULL;
    283286  }
    284287}

  • cpukit/score/cpu/m68k/include/rtems/score/cpu.h

    r15bba4ae r4c89fbcd  
    146146    uint8_t   fpu_dis;
    147147  #endif
     148  void       *thread_pointer;
    148149} Context_Control;
    149150

  • cpukit/score/cpu/m68k/include/rtems/score/cpuimpl.h

    r15bba4ae r4c89fbcd  
    4848
    4949#define CPU_PER_CPU_CONTROL_SIZE 0
     50
     51#define CPU_THREAD_LOCAL_STORAGE_VARIANT 10
    5052
    5153#ifndef ASM

  • cpukit/score/cpu/microblaze/__tls_get_addr.c

    r15bba4ae r4c89fbcd  
    4747void *__tls_get_addr( const TLS_Index *ti )
    4848{
    49   const Thread_Control *executing = _Thread_Get_executing();
    50   void *tls_block = (char *) executing->Start.tls_area
    51     + _TLS_Get_thread_control_block_area_size( (uintptr_t) _TLS_Alignment );
     49  const Thread_Control *executing;
    5250
    53   return (char *) tls_block + ti->offset;
     51  (void) ti;
     52
     53  executing = _Thread_Get_executing();
     54
     55  return executing->Registers.thread_pointer;
    5456}

  • cpukit/score/cpu/microblaze/cpu.c

    r15bba4ae r4c89fbcd  
    7474
    7575  if ( tls_area != NULL ) {
    76     _TLS_TCB_at_area_begin_initialize( tls_area );
     76    context->thread_pointer = _TLS_Initialize_area( tls_area );
    7777  }
    7878}

  • cpukit/score/cpu/microblaze/include/rtems/score/cpu.h

    r15bba4ae r4c89fbcd  
    138138  uint32_t r31;
    139139  uint32_t rmsr;
     140  void *thread_pointer;
    140141} Context_Control;
    141142

  • cpukit/score/cpu/microblaze/include/rtems/score/cpuimpl.h

    r15bba4ae r4c89fbcd  
    5050
    5151#define CPU_PER_CPU_CONTROL_SIZE 0
     52
    5253#define CPU_INTERRUPT_FRAME_SIZE 56
     54
     55#define CPU_THREAD_LOCAL_STORAGE_VARIANT 10
    5356
    5457#define MICROBLAZE_INTERRUPT_FRAME_R3   0

  • cpukit/score/cpu/mips/include/rtems/score/cpuimpl.h

    r15bba4ae r4c89fbcd  
    4949#define CPU_PER_CPU_CONTROL_SIZE 0
    5050
     51#define CPU_THREAD_LOCAL_STORAGE_VARIANT 10
     52
    5153#ifndef ASM
    5254

  • cpukit/score/cpu/moxie/include/rtems/score/cpuimpl.h

    r15bba4ae r4c89fbcd  
    4949#define CPU_PER_CPU_CONTROL_SIZE 0
    5050
     51#define CPU_THREAD_LOCAL_STORAGE_VARIANT 10
     52
    5153#ifndef ASM
    5254

  • cpukit/score/cpu/nios2/include/rtems/score/cpuimpl.h

    r15bba4ae r4c89fbcd  
    4949#define CPU_PER_CPU_CONTROL_SIZE 0
    5050
     51#define CPU_THREAD_LOCAL_STORAGE_VARIANT 10
     52
    5153#ifndef ASM
    5254

  • cpukit/score/cpu/nios2/nios2-context-initialize.c

    r15bba4ae r4c89fbcd  
    9191
    9292  if ( tls_area != NULL ) {
    93     context->r23 = (uintptr_t) tls_area +
    94       _TLS_Get_thread_control_block_area_size( (uintptr_t) _TLS_Alignment ) +
    95        0x7000;
    96     _TLS_TCB_before_TLS_block_initialize( tls_area );
     93    context->r23 = (uintptr_t) _TLS_Initialize_area( tls_area ) + 0x7000;
    9794  }
    9895}

  • cpukit/score/cpu/no_cpu/include/rtems/score/cpuimpl.h

    r15bba4ae r4c89fbcd  
    5555#define CPU_PER_CPU_CONTROL_SIZE 0
    5656
     57/**
     58 * @brief Defines the thread-local storage (TLS) variant.
     59 *
     60 * Use one of the following values:
     61 *
     62 * 10: The architecture uses Variant I and the TLS offsets emitted by the
     63 *     linker neglect the TCB (examples: nios2, m68k, microblaze, powerpc,
     64 *     riscv).  The thread pointer directly references the thread-local data
     65 *     area.
     66 *
     67 * 11: The architecture uses Variant I and the TLS offsets emitted by the
     68 *     linker take the TCB into account (examples: arm, aarch64).
     69 *     The thread pointer references the TCB.
     70 *
     71 * 20: The architecture uses Variant II (examples: i386, sparc).
     72 */
     73#define CPU_THREAD_LOCAL_STORAGE_VARIANT 10
     74
    5775#ifndef ASM
    5876

  • cpukit/score/cpu/or1k/include/rtems/score/cpuimpl.h

    r15bba4ae r4c89fbcd  
    4949#define CPU_PER_CPU_CONTROL_SIZE 0
    5050
     51#define CPU_THREAD_LOCAL_STORAGE_VARIANT 10
     52
    5153#ifndef ASM
    5254

  • cpukit/score/cpu/powerpc/include/rtems/score/cpuimpl.h

    r15bba4ae r4c89fbcd  
    152152#define CPU_PER_CPU_CONTROL_SIZE 0
    153153
     154#define CPU_THREAD_LOCAL_STORAGE_VARIANT 10
     155
    154156#ifdef RTEMS_SMP
    155157

  • cpukit/score/cpu/riscv/include/rtems/score/cpuimpl.h

    r15bba4ae r4c89fbcd  
    5454#define CPU_PER_CPU_CONTROL_SIZE 16
    5555#endif
     56
     57#define CPU_THREAD_LOCAL_STORAGE_VARIANT 10
    5658
    5759#ifdef RTEMS_SMP

  • cpukit/score/cpu/riscv/riscv-context-initialize.c

    r15bba4ae r4c89fbcd  
    6969    void *tls_block;
    7070
    71     tls_block = _TLS_TCB_before_TLS_block_initialize( tls_area );
     71    tls_block = _TLS_Initialize_area( tls_area );
    7272    context->tp = (uintptr_t) tls_block;
    7373  }

  • cpukit/score/cpu/sh/include/rtems/score/cpuimpl.h

    r15bba4ae r4c89fbcd  
    2929
    3030#define CPU_PER_CPU_CONTROL_SIZE 0
     31
     32#define CPU_THREAD_LOCAL_STORAGE_VARIANT 10
    3133
    3234#ifndef ASM

  • cpukit/score/cpu/sparc/cpu.c

    r15bba4ae r4c89fbcd  
    320320
    321321  if ( tls_area != NULL ) {
    322     void *tcb = _TLS_TCB_after_TLS_block_initialize( tls_area );
     322    void *tcb = _TLS_Initialize_area( tls_area );
    323323
    324324    the_context->g7 = (uintptr_t) tcb;

  • cpukit/score/cpu/sparc/include/rtems/score/cpuimpl.h

    r15bba4ae r4c89fbcd  
    120120  #define CPU_PER_CPU_CONTROL_SIZE 0
    121121#endif
     122
     123#define CPU_THREAD_LOCAL_STORAGE_VARIANT 20
    122124
    123125#if ( SPARC_HAS_FPU == 1 )

  • cpukit/score/cpu/sparc64/cpu.c

    r15bba4ae r4c89fbcd  
    133133
    134134  if ( tls_area != NULL ) {
    135     void *tcb = _TLS_TCB_after_TLS_block_initialize( tls_area );
     135    void *tcb = _TLS_Initialize_area( tls_area );
    136136
    137137    the_context->g7 = (uintptr_t) tcb;

  • cpukit/score/cpu/sparc64/include/rtems/score/cpuimpl.h

    r15bba4ae r4c89fbcd  
    4949#define CPU_PER_CPU_CONTROL_SIZE 0
    5050
     51#define CPU_THREAD_LOCAL_STORAGE_VARIANT 20
     52
    5153#ifndef ASM
    5254

  • cpukit/score/cpu/v850/include/rtems/score/cpuimpl.h

    r15bba4ae r4c89fbcd  
    4949#define CPU_PER_CPU_CONTROL_SIZE 0
    5050
     51#define CPU_THREAD_LOCAL_STORAGE_VARIANT 10
     52
    5153#ifndef ASM
    5254

  • cpukit/score/cpu/x86_64/include/rtems/score/cpuimpl.h

    r15bba4ae r4c89fbcd  
    3232
    3333#define CPU_PER_CPU_CONTROL_SIZE 0
     34
     35#define CPU_THREAD_LOCAL_STORAGE_VARIANT 20
    3436
    3537#ifndef ASM

  • cpukit/score/src/threadinitialize.c

    r15bba4ae r4c89fbcd  
    268268  /* Allocate thread-local storage (TLS) area in stack area */
    269269  if ( tls_size > 0 ) {
    270     uintptr_t tls_align;
    271 
    272270    stack_end -= tls_size;
    273     tls_align = (uintptr_t) _TLS_Alignment;
    274     the_thread->Start.tls_area = (void *)
    275       ( ( (uintptr_t) stack_end + tls_align - 1 ) & ~( tls_align - 1 ) );
     271    the_thread->Start.tls_area = stack_end;
    276272  }
    277273

  • cpukit/score/src/tlsallocsize.c

    r15bba4ae r4c89fbcd  
    1111
    1212/*
    13  * Copyright (C) 2014, 2020 embedded brains GmbH (http://www.embedded-brains.de)
     13 * Copyright (C) 2014, 2022 embedded brains GmbH
    1414 *
    1515 * Redistribution and use in source and binary forms, with or without
    … …  
    5959
    6060  if ( allocation_size == 0 ) {
    61     uintptr_t alignment;
    62 
    63     alignment = _TLS_Align_up( (uintptr_t) _TLS_Alignment );
    64 
    65     allocation_size = size;
    66     allocation_size += _TLS_Get_thread_control_block_area_size( alignment );
    67 #ifndef __i386__
    68     allocation_size += sizeof( TLS_Dynamic_thread_vector );
    69 #endif
     61    uintptr_t tls_align;
     62    uintptr_t stack_align;
    7063
    7164    /*
    … …  
    7366     * shall meet the stack alignment requirement.
    7467     */
    75     allocation_size = _TLS_Align_up( allocation_size );
     68    stack_align = CPU_STACK_ALIGNMENT;
     69    tls_align = RTEMS_ALIGN_UP( (uintptr_t) _TLS_Alignment, stack_align );
     70
     71#ifndef __i386__
     72    /* Reserve space for the dynamic thread vector */
     73    allocation_size +=
     74      RTEMS_ALIGN_UP( sizeof( TLS_Dynamic_thread_vector ), stack_align );
     75#endif
     76
     77    /* Reserve space for the thread control block */
     78    allocation_size +=
     79#if CPU_THREAD_LOCAL_STORAGE_VARIANT == 11
     80      RTEMS_ALIGN_UP( sizeof( TLS_Thread_control_block ), tls_align );
     81#else
     82      RTEMS_ALIGN_UP( sizeof( TLS_Thread_control_block ), stack_align );
     83#endif
     84
     85    /* Reserve space for the thread-local storage data */
     86    allocation_size +=
     87#if CPU_THREAD_LOCAL_STORAGE_VARIANT == 20
     88      RTEMS_ALIGN_UP( size, tls_align );
     89#else
     90      RTEMS_ALIGN_UP( size, stack_align );
     91#endif
    7692
    7793    /*
    … …  
    7995     * enough to do the alignment manually.
    8096     */
    81     if ( alignment > CPU_STACK_ALIGNMENT ) {
    82       _Assert( alignment % CPU_STACK_ALIGNMENT == 0 );
    83       allocation_size += alignment - CPU_STACK_ALIGNMENT;
     97    if ( tls_align > stack_align ) {
     98      _Assert( tls_align % stack_align == 0 );
     99      allocation_size += tls_align - stack_align;
    84100    }
    85101
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