Changeset 4a6cc2a in rtems


Ignore:
Timestamp:
11/08/11 10:39:46 (12 years ago)
Author:
Sebastian Huber <sebastian.huber@…>
Branches:
4.11, 5, master
Children:
3d1313e8
Parents:
4c622e5
Message:

2011-11-08 Sebastian Huber <sebastian.huber@…>

  • include/lpc17xx.h: New file.
  • Makefile.am, preinstall.am: Reflect change above. Update due to API changes.
  • configure.ac, console/console-config.c, include/bsp.h, include/io.h, include/irq.h, include/lcd.h, include/lpc-clock-config.h, include/lpc24xx.h, include/start-config.h, irq/irq-dispatch.c, irq/irq.c, misc/bspidle.c, misc/io.c, misc/lcd.c, misc/restart.c, misc/system-clocks.c, ssp/ssp.c, startup/bspreset.c, startup/bspstart.c, startup/bspstarthooks.c, startup/start-config-emc-dynamic.c, startup/start-config-emc-static.c, startup/start-config-pinsel.c: Basic support for LPC17XX. New memory configurations for W9825G2JB75I, IS42S32800B, and SST39VF3201.
Location:
c/src/lib/libbsp/arm/lpc24xx
Files:
1 added
26 edited

Legend:

Unmodified
Added
Removed

  • c/src/lib/libbsp/arm/lpc24xx/ChangeLog

    r4c622e5 r4a6cc2a  
     12011-11-08      Sebastian Huber <sebastian.huber@embedded-brains.de>
     2
     3        * include/lpc17xx.h: New file.
     4        * Makefile.am, preinstall.am: Reflect change above.  Update due to API
     5        changes.
     6        * configure.ac, console/console-config.c, include/bsp.h, include/io.h,
     7        include/irq.h, include/lcd.h, include/lpc-clock-config.h,
     8        include/lpc24xx.h, include/start-config.h, irq/irq-dispatch.c,
     9        irq/irq.c, misc/bspidle.c, misc/io.c, misc/lcd.c, misc/restart.c,
     10        misc/system-clocks.c, ssp/ssp.c, startup/bspreset.c,
     11        startup/bspstart.c, startup/bspstarthooks.c,
     12        startup/start-config-emc-dynamic.c, startup/start-config-emc-static.c,
     13        startup/start-config-pinsel.c: Basic support for LPC17XX.  New memory
     14        configurations for W9825G2JB75I, IS42S32800B, and SST39VF3201.
     15
    1162011-11-07      Sebastian Huber <sebastian.huber@embedded-brains.de>
    217

  • c/src/lib/libbsp/arm/lpc24xx/Makefile.am

    r4c622e5 r4a6cc2a  
    4545include_bsp_HEADERS += include/irq.h
    4646include_bsp_HEADERS += include/lcd.h
     47include_bsp_HEADERS += include/lpc17xx.h
    4748include_bsp_HEADERS += include/lpc24xx.h
    4849include_bsp_HEADERS += include/lpc-clock-config.h
    … …  
    9495        ../../shared/sbrk.c \
    9596        ../../shared/src/stackalloc.c \
    96         ../../shared/src/uart-output-char.c \
    97         ../shared/abort/simple_abort.c
     97        ../../shared/src/uart-output-char.c
    9898
    9999# Startup
    100 libbsp_a_SOURCES += startup/bspstart.c \
    101         startup/bspreset.c
     100libbsp_a_SOURCES += ../shared/startup/bsp-start-copy-sections.c
     101libbsp_a_SOURCES += ../shared/startup/bsp-start-memcpy.S
     102libbsp_a_SOURCES += startup/bspreset.c
     103libbsp_a_SOURCES += startup/bspstart.c
    102104
    103105# IRQ

  • c/src/lib/libbsp/arm/lpc24xx/configure.ac

    r4c622e5 r4a6cc2a  
    3333RTEMS_BSPOPTS_HELP([LPC24XX_OSCILLATOR_RTC],[RTC oscillator frequency in Hz])
    3434
     35RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[lpc17*],[120000000U])
     36#RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[lpc17*],[96000000U])
     37#RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[lpc17*],[48000000U])
    3538RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[lpc23*],[58982400U])
    3639RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[lpc24xx_plx800*],[51612800U])
    3740RTEMS_BSPOPTS_SET([LPC24XX_CCLK],[*],[72000000U])
    3841RTEMS_BSPOPTS_HELP([LPC24XX_CCLK],[CPU clock in Hz])
     42
     43RTEMS_BSPOPTS_SET([LPC24XX_PCLKDIV],[lpc17*],[2U])
     44RTEMS_BSPOPTS_SET([LPC24XX_PCLKDIV],[*],[1U])
     45RTEMS_BSPOPTS_HELP([LPC24XX_PCLKDIV],[peripheral clock divider for default PCLK (PCLK = CCLK / PCLKDIV)])
     46
     47RTEMS_BSPOPTS_SET([LPC24XX_EMCCLKDIV],[lpc17*],[2U])
     48RTEMS_BSPOPTS_SET([LPC24XX_EMCCLKDIV],[*],[1U])
     49RTEMS_BSPOPTS_HELP([LPC24XX_EMCCLKDIV],[peripheral clock divider for default EMCCLK (EMCCLK = CCLK / EMCCLKDIV)])
    3950
    4051RTEMS_BSPOPTS_SET([LPC24XX_UART_BAUD],[*],[115200U])
    … …  
    4556RTEMS_BSPOPTS_HELP([LPC24XX_ETHERNET_RMII],[enable RMII for Ethernet])
    4657
    47 RTEMS_BSPOPTS_SET([LPC24XX_EMC_MICRON],[lpc24xx_plx800_rom_*],[1])
    48 RTEMS_BSPOPTS_SET([LPC24XX_EMC_MICRON],[lpc24xx_ncs_rom_*],[1])
    49 RTEMS_BSPOPTS_HELP([LPC24XX_EMC_MICRON],[enable Micron configuration for EMC])
     58RTEMS_BSPOPTS_SET([LPC24XX_EMC_MT48LC4M16A2],[lpc24xx_ncs_rom_*],[1])
     59RTEMS_BSPOPTS_HELP([LPC24XX_EMC_MT48LC4M16A2],[enable Micron MT48LC4M16A2 configuration for EMC])
    5060
    51 RTEMS_BSPOPTS_SET([LPC24XX_EMC_NUMONYX],[lpc24xx_ncs_rom_*],[1])
    52 RTEMS_BSPOPTS_HELP([LPC24XX_EMC_NUMONYX],[enable Numonyx configuration for EMC])
     61RTEMS_BSPOPTS_SET([LPC24XX_EMC_W9825G2JB75I],[lpc24xx_plx800_rom_*],[1])
     62RTEMS_BSPOPTS_HELP([LPC24XX_EMC_W9825G2JB75I],[enable Winbond W9825G2JB75I configuration for EMC])
    5363
    54 RTEMS_BSPOPTS_SET([LPC24XX_EMC_W9825G2JB],[lpc24xx_plx800_rom_*],[1])
    55 RTEMS_BSPOPTS_HELP([LPC24XX_EMC_W9825G2JB],[enable Winbond W9825G2JB configuration for EMC])
     64RTEMS_BSPOPTS_SET([LPC24XX_EMC_IS42S32800B],[lpc17xx_ea_rom_*],[1])
     65RTEMS_BSPOPTS_HELP([LPC24XX_EMC_IS42S32800B],[enable ISSI IS42S32800B configuration for EMC])
     66
     67RTEMS_BSPOPTS_SET([LPC24XX_EMC_NUMONYX_M29W160E],[lpc24xx_ncs_rom_*],[1])
     68RTEMS_BSPOPTS_HELP([LPC24XX_EMC_NUMONYX_M29W160E],[enable Numonyx M29W160E configuration for EMC])
     69
     70RTEMS_BSPOPTS_SET([LPC24XX_EMC_SST39VF3201],[lpc24xx_plx800_rom_*],[1])
     71RTEMS_BSPOPTS_HELP([LPC24XX_EMC_SST39VF3201],[enable SST39VF3201 configuration for EMC])
    5672
    5773RTEMS_BSPOPTS_SET([LPC24XX_EMC_TEST],[*],[])

  • c/src/lib/libbsp/arm/lpc24xx/console/console-config.c

    r4c622e5 r4a6cc2a  
    5151    };
    5252
    53     lpc24xx_module_enable(LPC24XX_MODULE_UART_1, LPC24XX_MODULE_CCLK);
     53    lpc24xx_module_enable(LPC24XX_MODULE_UART_1, LPC24XX_MODULE_PCLK_DEFAULT);
    5454    lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION);
    5555
    … …  
    6767    };
    6868
    69     lpc24xx_module_enable(LPC24XX_MODULE_UART_2, LPC24XX_MODULE_CCLK);
     69    lpc24xx_module_enable(LPC24XX_MODULE_UART_2, LPC24XX_MODULE_PCLK_DEFAULT);
    7070    lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION);
    7171
    … …  
    8383    };
    8484
    85     lpc24xx_module_enable(LPC24XX_MODULE_UART_3, LPC24XX_MODULE_CCLK);
     85    lpc24xx_module_enable(LPC24XX_MODULE_UART_3, LPC24XX_MODULE_PCLK_DEFAULT);
    8686    lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION);
    8787
    … …  
    108108      .getData = NULL,
    109109      .setData = NULL,
    110       .ulClock = LPC24XX_CCLK,
     110      .ulClock = LPC24XX_PCLK,
    111111      .ulIntVector = LPC24XX_IRQ_UART_0
    112112    },
    … …  
    129129      .getData = NULL,
    130130      .setData = NULL,
    131       .ulClock = LPC24XX_CCLK,
     131      .ulClock = LPC24XX_PCLK,
    132132      .ulIntVector = LPC24XX_IRQ_UART_1
    133133    },
    … …  
    150150      .getData = NULL,
    151151      .setData = NULL,
    152       .ulClock = LPC24XX_CCLK,
     152      .ulClock = LPC24XX_PCLK,
    153153      .ulIntVector = LPC24XX_IRQ_UART_2
    154154    },
    … …  
    171171      .getData = NULL,
    172172      .setData = NULL,
    173       .ulClock = LPC24XX_CCLK,
     173      .ulClock = LPC24XX_PCLK,
    174174      .ulIntVector = LPC24XX_IRQ_UART_3
    175175    },

  • c/src/lib/libbsp/arm/lpc24xx/include/bsp.h

    r4c622e5 r4a6cc2a  
    88
    99/*
    10  * Copyright (c) 2008
    11  * Embedded Brains GmbH
    12  * Obere Lagerstr. 30
    13  * D-82178 Puchheim
    14  * Germany
    15  * rtems@embedded-brains.de
     10 * Copyright (c) 2008-2011 embedded brains GmbH.  All rights reserved.
    1611 *
    17  * The license and distribution terms for this file may be found in the file
    18  * LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
     12 *  embedded brains GmbH
     13 *  Obere Lagerstr. 30
     14 *  82178 Puchheim
     15 *  Germany
     16 *  <rtems@embedded-brains.de>
     17 *
     18 * The license and distribution terms for this file may be
     19 * found in the file LICENSE in this distribution or at
     20 * http://www.rtems.com/license/LICENSE.
     21 *
     22 * $Id$
    1923 */
    2024
    … …  
    3337
    3438#define BSP_FEATURE_IRQ_EXTENSION
     39
     40#define LPC24XX_PCLK (LPC24XX_CCLK / LPC24XX_PCLKDIV)
     41
     42#define LPC24XX_EMCCLK (LPC24XX_CCLK / LPC24XX_EMCCLKDIV)
    3543
    3644#ifndef ASM
    … …  
    8896void *bsp_idle_thread(uintptr_t ignored);
    8997
    90 #define BSP_CONSOLE_UART_BASE 0xe000c000
     98#ifdef ARM_MULTILIB_ARCH_V4
     99  #define BSP_CONSOLE_UART_BASE 0xe000c000
     100#else
     101  #define BSP_CONSOLE_UART_BASE 0x4000c000
     102#endif
    91103
    92104void bsp_restart(void *addr);

  • c/src/lib/libbsp/arm/lpc24xx/include/io.h

    r4c622e5 r4a6cc2a  
    4848#define LPC24XX_IO_INDEX_BY_PORT(port, bit) (((port) << 5U) + (bit))
    4949
    50 #define LPC24XX_IO_PORT(index) (index >> 5U)
    51 
    52 #define LPC24XX_IO_PORT_BIT(index) (index & 0x1fU)
     50#define LPC24XX_IO_PORT(index) ((index) >> 5U)
     51
     52#define LPC24XX_IO_PORT_BIT(index) ((index) & 0x1fU)
    5353
    5454typedef enum {
    55   LPC24XX_MODULE_ACF = 0,
    56   LPC24XX_MODULE_ADC,
    57   LPC24XX_MODULE_BAT_RAM,
     55  #ifdef ARM_MULTILIB_ARCH_V4
     56    LPC24XX_MODULE_ACF,
     57  #endif
     58    LPC24XX_MODULE_ADC,
     59  #ifdef ARM_MULTILIB_ARCH_V4
     60    LPC24XX_MODULE_BAT_RAM,
     61  #endif
    5862  LPC24XX_MODULE_CAN_0,
    5963  LPC24XX_MODULE_CAN_1,
    … …  
    7377  LPC24XX_MODULE_PWM_1,
    7478  LPC24XX_MODULE_RTC,
    75   LPC24XX_MODULE_SPI,
     79  #ifdef ARM_MULTILIB_ARCH_V4
     80    LPC24XX_MODULE_SPI,
     81  #endif
    7682  LPC24XX_MODULE_SSP_0,
    7783  LPC24XX_MODULE_SSP_1,
    … …  
    8591  LPC24XX_MODULE_UART_2,
    8692  LPC24XX_MODULE_UART_3,
    87   LPC24XX_MODULE_USB,
    88   LPC24XX_MODULE_WDT
     93  #ifdef ARM_MULTILIB_ARCH_V4
     94    LPC24XX_MODULE_WDT,
     95  #endif
     96  LPC24XX_MODULE_USB
    8997} lpc24xx_module;
    9098
    91 #define LPC24XX_MODULE_FIRST LPC24XX_MODULE_ACF
    92 
    93 #define LPC24XX_MODULE_COUNT (LPC24XX_MODULE_WDT + 1)
     99#define LPC24XX_MODULE_COUNT (LPC24XX_MODULE_USB + 1)
    94100
    95101typedef enum {
    96   LPC24XX_MODULE_PCLK_DEFAULT = 0x0U,
     102  LPC24XX_MODULE_PCLK_DEFAULT = 0x4U,
    97103  LPC24XX_MODULE_CCLK = 0x1U,
    98104  LPC24XX_MODULE_CCLK_2 = 0x2U,
    … …  
    106112typedef enum {
    107113  LPC24XX_GPIO_DEFAULT = 0x0U,
    108   LPC24XX_GPIO_RESISTOR_DEFAULT = 0x0U,
     114  LPC24XX_GPIO_RESISTOR_PULL_UP = 0x0U,
    109115  LPC24XX_GPIO_RESISTOR_NONE = 0x1U,
    110   LPC24XX_GPIO_RESISTOR_PULL_UP = 0x2U,
    111   LPC24XX_GPIO_RESISTOR_PULL_DOWN = 0x3U,
     116  LPC24XX_GPIO_RESISTOR_PULL_DOWN = 0x2U,
    112117  LPC24XX_GPIO_INPUT = 0x0U,
    113   LPC24XX_GPIO_OUTPUT = 0x8U
     118  LPC24XX_GPIO_OUTPUT = 0x8000U
    114119} lpc24xx_gpio_settings;
    115 
    116 #define LPC24XX_GPIO_RESISTOR_MASK 0x3U
    117120
    118121rtems_status_code lpc24xx_module_enable(
    … …  
    175178   * @brief Sets the pin function.
    176179   */
    177   LPC24XX_PIN_SET_FUNCTION = 0,
     180  LPC24XX_PIN_SET_FUNCTION,
    178181
    179182  /**
    … …  
    196199  struct {
    197200    uint16_t port : 3;
    198     uint16_t index_begin : 5;
    199     uint16_t index_last : 5;
     201    uint16_t port_bit : 5;
    200202    uint16_t function : 3;
     203    uint16_t type : 4;
     204    uint16_t range : 1;
    201205  } fields;
    202206  uint16_t value;
    203207} lpc24xx_pin_range;
    204208
    205 #define LPC24XX_PIN_FUNCTION_00 0x0
    206 #define LPC24XX_PIN_FUNCTION_01 0x1
    207 #define LPC24XX_PIN_FUNCTION_10 0x2
    208 #define LPC24XX_PIN_FUNCTION_11 0x3
    209 
    210 #define LPC24XX_PIN(p, i, f) { { p, i, i, f } }
    211 
    212 #define LPC24XX_PIN_RANGE(p, i, j, f) { { p, i, j, f } }
    213 
    214 #define LPC24XX_PIN_TERMINAL { { 0x3, 0x1f, 0x1f, 0x3 } }
     209typedef enum {
     210  LPC24XX_PIN_FUNCTION_00,
     211  LPC24XX_PIN_FUNCTION_01,
     212  LPC24XX_PIN_FUNCTION_10,
     213  LPC24XX_PIN_FUNCTION_11
     214} lpc24xx_pin_function;
     215
     216typedef enum {
     217  LPC17XX_PIN_TYPE_DEFAULT,
     218  LPC17XX_PIN_TYPE_ADC,
     219  LPC17XX_PIN_TYPE_DAC,
     220  LPC17XX_PIN_TYPE_I2C,
     221  LPC17XX_PIN_TYPE_I2C_FAST_PLUS
     222} lpc17xx_pin_type;
     223
     224#ifdef ARM_MULTILIB_ARCH_V4
     225  #define LPC24XX_PIN(p, i, f0, f1) { { p, i, f0, 0, 0 } }
     226  #define LPC24XX_PIN_WITH_TYPE(p, i, f0, f1, t) { { p, i, f0, t, 0 } }
     227  #define LPC24XX_PIN_RANGE(p, i, j, f0, f1) \
     228    { { p, i, f0, 0, 0 } }, { { p, j, f0, 0, 1 } }
     229#endif
     230
     231#define LPC24XX_PIN_TERMINAL { { 0x7, 0x1f, 0x7, 0xf, 0x1 } }
    215232
    216233/**
    … …  
    257274
    258275#define LPC24XX_PIN_ADC_CHANNEL_0 \
    259   LPC24XX_PIN(0, 23, LPC24XX_PIN_FUNCTION_01)
     276  LPC24XX_PIN_WITH_TYPE(0, 23, LPC24XX_PIN_FUNCTION_01, 1, LPC17XX_PIN_TYPE_ADC)
    260277#define LPC24XX_PIN_ADC_CHANNEL_1 \
    261   LPC24XX_PIN(0, 24, LPC24XX_PIN_FUNCTION_01)
     278  LPC24XX_PIN_WITH_TYPE(0, 24, LPC24XX_PIN_FUNCTION_01, 1, LPC17XX_PIN_TYPE_ADC)
    262279#define LPC24XX_PIN_ADC_CHANNEL_2 \
    263   LPC24XX_PIN(0, 25, LPC24XX_PIN_FUNCTION_01)
     280  LPC24XX_PIN_WITH_TYPE(0, 25, LPC24XX_PIN_FUNCTION_01, 1, LPC17XX_PIN_TYPE_ADC)
    264281#define LPC24XX_PIN_ADC_CHANNEL_3 \
    265   LPC24XX_PIN(0, 26, LPC24XX_PIN_FUNCTION_01)
     282  LPC24XX_PIN_WITH_TYPE(0, 26, LPC24XX_PIN_FUNCTION_01, 1, LPC17XX_PIN_TYPE_ADC)
    266283#define LPC24XX_PIN_ADC_CHANNEL_4 \
    267   LPC24XX_PIN(1, 30, LPC24XX_PIN_FUNCTION_11)
     284  LPC24XX_PIN_WITH_TYPE(1, 30, LPC24XX_PIN_FUNCTION_11, 3, LPC17XX_PIN_TYPE_ADC)
    268285#define LPC24XX_PIN_ADC_CHANNEL_5 \
    269   LPC24XX_PIN(1, 31, LPC24XX_PIN_FUNCTION_11)
     286  LPC24XX_PIN_WITH_TYPE(1, 31, LPC24XX_PIN_FUNCTION_11, 3, LPC17XX_PIN_TYPE_ADC)
    270287#define LPC24XX_PIN_ADC_CHANNEL_6 \
    271   LPC24XX_PIN(0, 12, LPC24XX_PIN_FUNCTION_11)
     288  LPC24XX_PIN_WITH_TYPE(0, 12, LPC24XX_PIN_FUNCTION_11, 3, LPC17XX_PIN_TYPE_ADC)
    272289#define LPC24XX_PIN_ADC_CHANNEL_7 \
    273   LPC24XX_PIN(0, 13, LPC24XX_PIN_FUNCTION_11)
     290  LPC24XX_PIN_WITH_TYPE(0, 13, LPC24XX_PIN_FUNCTION_11, 3, LPC17XX_PIN_TYPE_ADC)
     291
     292/** @} */
     293
     294/**
     295 * @name CAN 0 Pins
     296 *
     297 * @{
     298 */
     299
     300#define LPC24XX_PIN_CAN_0_RD \
     301  LPC24XX_PIN(0, 0, LPC24XX_PIN_FUNCTION_01, 1)
     302
     303#define LPC24XX_PIN_CAN_0_TD \
     304  LPC24XX_PIN(0, 1, LPC24XX_PIN_FUNCTION_01, 1)
     305
     306/** @} */
     307
     308/**
     309 * @name CAN 1 Pins
     310 *
     311 * @{
     312 */
     313
     314#define LPC24XX_PIN_CAN_1_RD \
     315  LPC24XX_PIN(0, 4, LPC24XX_PIN_FUNCTION_10, 2)
     316
     317#define LPC24XX_PIN_CAN_1_TD \
     318  LPC24XX_PIN(0, 5, LPC24XX_PIN_FUNCTION_10, 2)
    274319
    275320/** @} */
    … …  
    282327
    283328#define LPC24XX_PIN_DAC \
    284   LPC24XX_PIN(0, 26, LPC24XX_PIN_FUNCTION_10)
     329  LPC24XX_PIN_WITH_TYPE(0, 26, LPC24XX_PIN_FUNCTION_10, 2, LPC17XX_PIN_TYPE_DAC)
    285330
    286331/** @} */
    … …  
    293338
    294339#define LPC24XX_PIN_ETHERNET_MII \
    295   LPC24XX_PIN_RANGE(1, 0, 17, LPC24XX_PIN_FUNCTION_01)
     340  LPC24XX_PIN_RANGE(1, 0, 17, LPC24XX_PIN_FUNCTION_01, 1)
    296341
    297342#define LPC24XX_PIN_ETHERNET_RMII_0 \
    298   LPC24XX_PIN_RANGE(1, 0, 1, LPC24XX_PIN_FUNCTION_01)
     343  LPC24XX_PIN_RANGE(1, 0, 1, LPC24XX_PIN_FUNCTION_01, 1)
    299344#define LPC24XX_PIN_ETHERNET_RMII_1 \
    300   LPC24XX_PIN(1, 4, LPC24XX_PIN_FUNCTION_01)
     345  LPC24XX_PIN(1, 4, LPC24XX_PIN_FUNCTION_01, 1)
    301346#define LPC24XX_PIN_ETHERNET_RMII_2 \
    302   LPC24XX_PIN_RANGE(1, 8, 10, LPC24XX_PIN_FUNCTION_01)
     347  LPC24XX_PIN_RANGE(1, 8, 10, LPC24XX_PIN_FUNCTION_01, 1)
    303348#define LPC24XX_PIN_ETHERNET_RMII_3 \
    304   LPC24XX_PIN_RANGE(1, 14, 17, LPC24XX_PIN_FUNCTION_01)
     349  LPC24XX_PIN_RANGE(1, 14, 17, LPC24XX_PIN_FUNCTION_01, 1)
     350
     351/** @} */
     352
     353/**
     354 * @name External Interrupt Pins
     355 *
     356 * @{
     357 */
     358
     359#define LPC24XX_PIN_EINT_0 \
     360  LPC24XX_PIN(2, 10, LPC24XX_PIN_FUNCTION_01, 1)
     361#define LPC24XX_PIN_EINT_1 \
     362  LPC24XX_PIN(2, 11, LPC24XX_PIN_FUNCTION_01, 1)
     363#define LPC24XX_PIN_EINT_2 \
     364  LPC24XX_PIN(2, 12, LPC24XX_PIN_FUNCTION_01, 1)
     365#define LPC24XX_PIN_EINT_3 \
     366  LPC24XX_PIN(2, 13, LPC24XX_PIN_FUNCTION_01, 1)
     367
     368/** @} */
     369
     370/**
     371 * @name External Memory Controller (EMC) Pins
     372 *
     373 * @{
     374 */
     375
     376#define LPC24XX_PIN_EMC_CS_0 \
     377  LPC24XX_PIN(4, 30, LPC24XX_PIN_FUNCTION_01, 1)
     378#define LPC24XX_PIN_EMC_CS_1 \
     379  LPC24XX_PIN(4, 31, LPC24XX_PIN_FUNCTION_01, 1)
     380#define LPC24XX_PIN_EMC_CS_2 \
     381  LPC24XX_PIN(2, 14, LPC24XX_PIN_FUNCTION_01, 1)
     382#define LPC24XX_PIN_EMC_CS_3 \
     383  LPC24XX_PIN(2, 15, LPC24XX_PIN_FUNCTION_01, 1)
     384
     385#define LPC24XX_PIN_EMC_DYCS_0 \
     386  LPC24XX_PIN(2, 20, LPC24XX_PIN_FUNCTION_01, 1)
     387#define LPC24XX_PIN_EMC_DYCS_1 \
     388  LPC24XX_PIN(2, 21, LPC24XX_PIN_FUNCTION_01, 1)
     389#define LPC24XX_PIN_EMC_DYCS_2 \
     390  LPC24XX_PIN(2, 22, LPC24XX_PIN_FUNCTION_01, 1)
     391#define LPC24XX_PIN_EMC_DYCS_3 \
     392  LPC24XX_PIN(2, 23, LPC24XX_PIN_FUNCTION_01, 1)
     393
     394#define LPC24XX_PIN_EMC_OE \
     395  LPC24XX_PIN(4, 24, LPC24XX_PIN_FUNCTION_01, 1)
     396#define LPC24XX_PIN_EMC_WE \
     397  LPC24XX_PIN(4, 25, LPC24XX_PIN_FUNCTION_01, 1)
     398#define LPC24XX_PIN_EMC_CAS \
     399  LPC24XX_PIN(2, 16, LPC24XX_PIN_FUNCTION_01, 1)
     400#define LPC24XX_PIN_EMC_RAS \
     401  LPC24XX_PIN(2, 17, LPC24XX_PIN_FUNCTION_01, 1)
     402
     403#define LPC24XX_PIN_EMC_CLK_0 \
     404  LPC24XX_PIN(2, 18, LPC24XX_PIN_FUNCTION_01, 1)
     405#define LPC24XX_PIN_EMC_CLK_1 \
     406  LPC24XX_PIN(2, 19, LPC24XX_PIN_FUNCTION_01, 1)
     407
     408#define LPC24XX_PIN_EMC_CKE_0 \
     409  LPC24XX_PIN(2, 24, LPC24XX_PIN_FUNCTION_01, 1)
     410#define LPC24XX_PIN_EMC_CKE_1 \
     411  LPC24XX_PIN(2, 25, LPC24XX_PIN_FUNCTION_01, 1)
     412#define LPC24XX_PIN_EMC_CKE_2 \
     413  LPC24XX_PIN(2, 26, LPC24XX_PIN_FUNCTION_01, 1)
     414#define LPC24XX_PIN_EMC_CKE_3 \
     415  LPC24XX_PIN(2, 27, LPC24XX_PIN_FUNCTION_01, 1)
     416
     417#define LPC24XX_PIN_EMC_DQM_0 \
     418  LPC24XX_PIN(2, 28, LPC24XX_PIN_FUNCTION_01, 1)
     419#define LPC24XX_PIN_EMC_DQM_1 \
     420  LPC24XX_PIN(2, 29, LPC24XX_PIN_FUNCTION_01, 1)
     421#define LPC24XX_PIN_EMC_DQM_2 \
     422  LPC24XX_PIN(2, 30, LPC24XX_PIN_FUNCTION_01, 1)
     423#define LPC24XX_PIN_EMC_DQM_3 \
     424  LPC24XX_PIN(2, 31, LPC24XX_PIN_FUNCTION_01, 1)
     425
     426#define LPC24XX_PIN_EMC_BLS0 \
     427  LPC24XX_PIN(4, 26, LPC24XX_PIN_FUNCTION_01, 1)
     428#define LPC24XX_PIN_EMC_BLS1 \
     429  LPC24XX_PIN(4, 27, LPC24XX_PIN_FUNCTION_01, 1)
     430#define LPC24XX_PIN_EMC_BLS2 \
     431  LPC24XX_PIN(4, 28, LPC24XX_PIN_FUNCTION_01, 1)
     432#define LPC24XX_PIN_EMC_BLS3 \
     433  LPC24XX_PIN(4, 29, LPC24XX_PIN_FUNCTION_01, 1)
     434
     435#define LPC24XX_PIN_EMC_D_0_15 \
     436  LPC24XX_PIN_RANGE(3, 0, 15, LPC24XX_PIN_FUNCTION_01, 1)
     437#define LPC24XX_PIN_EMC_D_15_31 \
     438  LPC24XX_PIN_RANGE(3, 15, 31, LPC24XX_PIN_FUNCTION_01, 1)
     439#define LPC24XX_PIN_EMC_D_0_31 \
     440  LPC24XX_PIN_RANGE(3, 0, 31, LPC24XX_PIN_FUNCTION_01, 1)
     441
     442#define LPC24XX_PIN_EMC_A_0_12 \
     443  LPC24XX_PIN_RANGE(4, 0, 12, LPC24XX_PIN_FUNCTION_01, 1)
     444#define LPC24XX_PIN_EMC_A_0_13 \
     445  LPC24XX_PIN_RANGE(4, 0, 13, LPC24XX_PIN_FUNCTION_01, 1)
     446#define LPC24XX_PIN_EMC_A_0_14 \
     447  LPC24XX_PIN_RANGE(4, 0, 14, LPC24XX_PIN_FUNCTION_01, 1)
     448#define LPC24XX_PIN_EMC_A_0_15 \
     449  LPC24XX_PIN_RANGE(4, 0, 15, LPC24XX_PIN_FUNCTION_01, 1)
     450#define LPC24XX_PIN_EMC_A_0_16 \
     451  LPC24XX_PIN_EMC_A_0_15, \
     452  LPC24XX_PIN(4, 16, LPC24XX_PIN_FUNCTION_01, 1)
     453#define LPC24XX_PIN_EMC_A_0_17 \
     454  LPC24XX_PIN_EMC_A_0_15, \
     455  LPC24XX_PIN_RANGE(4, 16, 17, LPC24XX_PIN_FUNCTION_01, 1)
     456#define LPC24XX_PIN_EMC_A_0_18 \
     457  LPC24XX_PIN_EMC_A_0_15, \
     458  LPC24XX_PIN_RANGE(4, 16, 18, LPC24XX_PIN_FUNCTION_01, 1)
     459#define LPC24XX_PIN_EMC_A_0_19 \
     460  LPC24XX_PIN_EMC_A_0_15, \
     461  LPC24XX_PIN_RANGE(4, 16, 19, LPC24XX_PIN_FUNCTION_01, 1)
     462#define LPC24XX_PIN_EMC_A_0_20 \
     463  LPC24XX_PIN_EMC_A_0_15, \
     464  LPC24XX_PIN_RANGE(4, 16, 20, LPC24XX_PIN_FUNCTION_01, 1)
     465#define LPC24XX_PIN_EMC_A_0_21 \
     466  LPC24XX_PIN_EMC_A_0_15, \
     467  LPC24XX_PIN_RANGE(4, 16, 21, LPC24XX_PIN_FUNCTION_01, 1)
     468#define LPC24XX_PIN_EMC_A_0_22 \
     469  LPC24XX_PIN_EMC_A_0_15, \
     470  LPC24XX_PIN_RANGE(4, 16, 22, LPC24XX_PIN_FUNCTION_01, 1)
     471#define LPC24XX_PIN_EMC_A_0_23 \
     472  LPC24XX_PIN_EMC_A_0_15, \
     473  LPC24XX_PIN_RANGE(4, 16, 23, LPC24XX_PIN_FUNCTION_01, 1)
     474#define LPC24XX_PIN_EMC_A_0_24 \
     475  LPC24XX_PIN_EMC_A_0_23, \
     476  LPC24XX_PIN(5, 24, LPC24XX_PIN_FUNCTION_01, 1)
     477#define LPC24XX_PIN_EMC_A_0_25 \
     478  LPC24XX_PIN_EMC_A_0_23, \
     479  LPC24XX_PIN_RANGE(5, 24, 25, LPC24XX_PIN_FUNCTION_01, 1)
    305480
    306481/** @} */
    … …  
    313488
    314489#define LPC24XX_PIN_I2C_0_SDA \
    315   LPC24XX_PIN(0, 27, LPC24XX_PIN_FUNCTION_01)
     490  LPC24XX_PIN_WITH_TYPE(0, 27, LPC24XX_PIN_FUNCTION_01, 1, LPC17XX_PIN_TYPE_I2C)
    316491#define LPC24XX_PIN_I2C_0_SCL \
    317   LPC24XX_PIN(0, 28, LPC24XX_PIN_FUNCTION_01)
     492  LPC24XX_PIN_WITH_TYPE(0, 28, LPC24XX_PIN_FUNCTION_01, 1, LPC17XX_PIN_TYPE_I2C)
    318493
    319494/** @} */
    … …  
    326501
    327502#define LPC24XX_PIN_I2C_1_SDA_P0_0 \
    328   LPC24XX_PIN(0, 0, LPC24XX_PIN_FUNCTION_11)
     503  LPC24XX_PIN_WITH_TYPE(0, 0, LPC24XX_PIN_FUNCTION_11, 3, LPC17XX_PIN_TYPE_I2C)
    329504#define LPC24XX_PIN_I2C_1_SDA_P0_19 \
    330   LPC24XX_PIN(0, 19, LPC24XX_PIN_FUNCTION_11)
     505  LPC24XX_PIN_WITH_TYPE(0, 19, LPC24XX_PIN_FUNCTION_11, 3, LPC17XX_PIN_TYPE_I2C)
    331506#define LPC24XX_PIN_I2C_1_SDA_P2_14 \
    332   LPC24XX_PIN(2, 14, LPC24XX_PIN_FUNCTION_11)
    333 
     507  LPC24XX_PIN_WITH_TYPE(2, 14, LPC24XX_PIN_FUNCTION_11, 2, LPC17XX_PIN_TYPE_I2C)
     508
     509#define LPC24XX_PIN_I2C_1_SCL_P0_1 \
     510  LPC24XX_PIN_WITH_TYPE(0, 1, LPC24XX_PIN_FUNCTION_11, 3, LPC17XX_PIN_TYPE_I2C)
    334511#define LPC24XX_PIN_I2C_1_SCL_P0_20 \
    335   LPC24XX_PIN(0, 20, LPC24XX_PIN_FUNCTION_11)
    336 #define LPC24XX_PIN_I2C_1_SCL_P0_1 \
    337   LPC24XX_PIN(0, 1, LPC24XX_PIN_FUNCTION_11)
     512  LPC24XX_PIN_WITH_TYPE(0, 20, LPC24XX_PIN_FUNCTION_11, 3, LPC17XX_PIN_TYPE_I2C)
    338513#define LPC24XX_PIN_I2C_1_SCL_P2_15 \
    339   LPC24XX_PIN(2, 15, LPC24XX_PIN_FUNCTION_11)
     514  LPC24XX_PIN_WITH_TYPE(2, 15, LPC24XX_PIN_FUNCTION_11, 2, LPC17XX_PIN_TYPE_I2C)
    340515
    341516/** @} */
    … …  
    348523
    349524#define LPC24XX_PIN_I2C_2_SDA_P0_10 \
    350   LPC24XX_PIN(0, 10, LPC24XX_PIN_FUNCTION_10)
     525  LPC24XX_PIN_WITH_TYPE(0, 10, LPC24XX_PIN_FUNCTION_10, 2, LPC17XX_PIN_TYPE_I2C)
    351526#define LPC24XX_PIN_I2C_2_SDA_P2_30 \
    352   LPC24XX_PIN(2, 30, LPC24XX_PIN_FUNCTION_11)
     527  LPC24XX_PIN_WITH_TYPE(2, 30, LPC24XX_PIN_FUNCTION_11, 2, LPC17XX_PIN_TYPE_I2C)
    353528#define LPC24XX_PIN_I2C_2_SDA_P4_20 \
    354   LPC24XX_PIN(4, 20, LPC24XX_PIN_FUNCTION_10)
    355 
     529  LPC24XX_PIN_WITH_TYPE(4, 20, LPC24XX_PIN_FUNCTION_10, 2, LPC17XX_PIN_TYPE_I2C)
     530
     531#define LPC24XX_PIN_I2C_2_SCL_P0_11 \
     532  LPC24XX_PIN_WITH_TYPE(0, 11, LPC24XX_PIN_FUNCTION_10, 2, LPC17XX_PIN_TYPE_I2C)
    356533#define LPC24XX_PIN_I2C_2_SCL_P2_31 \
    357   LPC24XX_PIN(2, 31, LPC24XX_PIN_FUNCTION_11)
    358 #define LPC24XX_PIN_I2C_2_SCL_P0_11 \
    359   LPC24XX_PIN(0, 11, LPC24XX_PIN_FUNCTION_10)
     534  LPC24XX_PIN_WITH_TYPE(2, 31, LPC24XX_PIN_FUNCTION_11, 2, LPC17XX_PIN_TYPE_I2C)
    360535#define LPC24XX_PIN_I2C_2_SCL_P4_21 \
    361   LPC24XX_PIN(4, 21, LPC24XX_PIN_FUNCTION_10)
     536  LPC24XX_PIN_WITH_TYPE(4, 21, LPC24XX_PIN_FUNCTION_10, 2, LPC17XX_PIN_TYPE_I2C)
    362537
    363538/** @} */
    … …  
    370545
    371546#define LPC24XX_PIN_I2S_RX_CLK_P0_4 \
    372   LPC24XX_PIN(0, 4, LPC24XX_PIN_FUNCTION_01)
     547  LPC24XX_PIN(0, 4, LPC24XX_PIN_FUNCTION_01, 1)
    373548#define LPC24XX_PIN_I2S_RX_CLK_P0_23 \
    374   LPC24XX_PIN(0, 23, LPC24XX_PIN_FUNCTION_10)
     549  LPC24XX_PIN(0, 23, LPC24XX_PIN_FUNCTION_10, 2)
    375550
    376551#define LPC24XX_PIN_I2S_RX_WS_P0_5 \
    377   LPC24XX_PIN(0, 5, LPC24XX_PIN_FUNCTION_01)
     552  LPC24XX_PIN(0, 5, LPC24XX_PIN_FUNCTION_01, 1)
    378553#define LPC24XX_PIN_I2S_RX_WS_P0_24 \
    379   LPC24XX_PIN(0, 24, LPC24XX_PIN_FUNCTION_10)
     554  LPC24XX_PIN(0, 24, LPC24XX_PIN_FUNCTION_10, 2)
    380555
    381556#define LPC24XX_PIN_I2S_RX_SDA_P0_6 \
    382   LPC24XX_PIN(0, 6, LPC24XX_PIN_FUNCTION_01)
     557  LPC24XX_PIN(0, 6, LPC24XX_PIN_FUNCTION_01, 1)
    383558#define LPC24XX_PIN_I2S_RX_SDA_P0_25 \
    384   LPC24XX_PIN(0, 25, LPC24XX_PIN_FUNCTION_10)
     559  LPC24XX_PIN(0, 25, LPC24XX_PIN_FUNCTION_10, 2)
    385560
    386561#define LPC24XX_PIN_I2S_TX_CLK_P0_7 \
    387   LPC24XX_PIN(0, 7, LPC24XX_PIN_FUNCTION_01)
     562  LPC24XX_PIN(0, 7, LPC24XX_PIN_FUNCTION_01, 1)
    388563#define LPC24XX_PIN_I2S_TX_CLK_P2_11 \
    389   LPC24XX_PIN(2, 11, LPC24XX_PIN_FUNCTION_11)
     564  LPC24XX_PIN(2, 11, LPC24XX_PIN_FUNCTION_11, 3)
    390565
    391566#define LPC24XX_PIN_I2S_TX_WS_P0_8 \
    392   LPC24XX_PIN(0, 8, LPC24XX_PIN_FUNCTION_01)
     567  LPC24XX_PIN(0, 8, LPC24XX_PIN_FUNCTION_01, 1)
    393568#define LPC24XX_PIN_I2S_TX_WS_P2_12 \
    394   LPC24XX_PIN(2, 12, LPC24XX_PIN_FUNCTION_11)
     569  LPC24XX_PIN(2, 12, LPC24XX_PIN_FUNCTION_11, 3)
    395570
    396571#define LPC24XX_PIN_I2S_TX_SDA_P0_9 \
    397   LPC24XX_PIN(0, 9, LPC24XX_PIN_FUNCTION_01)
     572  LPC24XX_PIN(0, 9, LPC24XX_PIN_FUNCTION_01, 1)
    398573#define LPC24XX_PIN_I2S_TX_SDA_P2_13 \
    399   LPC24XX_PIN(2, 13, LPC24XX_PIN_FUNCTION_11)
     574  LPC24XX_PIN(2, 13, LPC24XX_PIN_FUNCTION_11, 3)
    400575
    401576/** @} */
    … …  
    408583
    409584#define LPC24XX_PIN_LCD_PWR \
    410   LPC24XX_PIN(2, 0, LPC24XX_PIN_FUNCTION_11)
     585  LPC24XX_PIN(2, 0, LPC24XX_PIN_FUNCTION_11, 7)
    411586#define LPC24XX_PIN_LCD_LE \
    412   LPC24XX_PIN(2, 1, LPC24XX_PIN_FUNCTION_11)
     587  LPC24XX_PIN(2, 1, LPC24XX_PIN_FUNCTION_11, 7)
    413588#define LPC24XX_PIN_LCD_DCLK \
    414   LPC24XX_PIN(2, 2, LPC24XX_PIN_FUNCTION_11)
     589  LPC24XX_PIN(2, 2, LPC24XX_PIN_FUNCTION_11, 7)
    415590#define LPC24XX_PIN_LCD_FP \
    416   LPC24XX_PIN(2, 3, LPC24XX_PIN_FUNCTION_11)
     591  LPC24XX_PIN(2, 3, LPC24XX_PIN_FUNCTION_11, 7)
    417592#define LPC24XX_PIN_LCD_ENAB_M \
    418   LPC24XX_PIN(2, 4, LPC24XX_PIN_FUNCTION_11)
     593  LPC24XX_PIN(2, 4, LPC24XX_PIN_FUNCTION_11, 7)
    419594#define LPC24XX_PIN_LCD_LP \
    420   LPC24XX_PIN(2, 5, LPC24XX_PIN_FUNCTION_11)
     595  LPC24XX_PIN(2, 5, LPC24XX_PIN_FUNCTION_11, 7)
    421596#define LPC24XX_PIN_LCD_CLKIN \
    422   LPC24XX_PIN(2, 11, LPC24XX_PIN_FUNCTION_01)
    423 
    424 #define LPC24XX_PIN_LCD_VD_P0_4 \
    425   LPC24XX_PIN(0, 4, LPC24XX_PIN_FUNCTION_01)
    426 #define LPC24XX_PIN_LCD_VD_P0_5 \
    427   LPC24XX_PIN(0, 5, LPC24XX_PIN_FUNCTION_01)
    428 #define LPC24XX_PIN_LCD_VD_P0_6 \
    429   LPC24XX_PIN(0, 6, LPC24XX_PIN_FUNCTION_01)
    430 #define LPC24XX_PIN_LCD_VD_P0_7 \
    431   LPC24XX_PIN(0, 7, LPC24XX_PIN_FUNCTION_01)
    432 #define LPC24XX_PIN_LCD_VD_P0_8 \
    433   LPC24XX_PIN(0, 8, LPC24XX_PIN_FUNCTION_01)
    434 #define LPC24XX_PIN_LCD_VD_P0_9 \
    435   LPC24XX_PIN(0, 9, LPC24XX_PIN_FUNCTION_01)
    436 #define LPC24XX_PIN_LCD_VD_P1_20 \
    437   LPC24XX_PIN(1, 20, LPC24XX_PIN_FUNCTION_01)
    438 #define LPC24XX_PIN_LCD_VD_P1_21 \
    439   LPC24XX_PIN(1, 21, LPC24XX_PIN_FUNCTION_01)
    440 #define LPC24XX_PIN_LCD_VD_P1_22 \
    441   LPC24XX_PIN(1, 22, LPC24XX_PIN_FUNCTION_01)
    442 #define LPC24XX_PIN_LCD_VD_P1_23 \
    443   LPC24XX_PIN(1, 23, LPC24XX_PIN_FUNCTION_01)
    444 #define LPC24XX_PIN_LCD_VD_P1_24 \
    445   LPC24XX_PIN(1, 24, LPC24XX_PIN_FUNCTION_01)
    446 #define LPC24XX_PIN_LCD_VD_P1_25 \
    447   LPC24XX_PIN(1, 25, LPC24XX_PIN_FUNCTION_01)
    448 #define LPC24XX_PIN_LCD_VD_P1_26 \
    449   LPC24XX_PIN(1, 26, LPC24XX_PIN_FUNCTION_01)
    450 #define LPC24XX_PIN_LCD_VD_P1_27 \
    451   LPC24XX_PIN(1, 27, LPC24XX_PIN_FUNCTION_01)
    452 #define LPC24XX_PIN_LCD_VD_P1_28 \
    453   LPC24XX_PIN(1, 28, LPC24XX_PIN_FUNCTION_01)
    454 #define LPC24XX_PIN_LCD_VD_P1_29 \
    455   LPC24XX_PIN(1, 29, LPC24XX_PIN_FUNCTION_01)
    456 #define LPC24XX_PIN_LCD_VD_P2_6 \
    457   LPC24XX_PIN(2, 6, LPC24XX_PIN_FUNCTION_11)
    458 #define LPC24XX_PIN_LCD_VD_P2_7 \
    459   LPC24XX_PIN(2, 7, LPC24XX_PIN_FUNCTION_11)
    460 #define LPC24XX_PIN_LCD_VD_P2_8 \
    461   LPC24XX_PIN(2, 8, LPC24XX_PIN_FUNCTION_11)
    462 #define LPC24XX_PIN_LCD_VD_P2_9 \
    463   LPC24XX_PIN(2, 9, LPC24XX_PIN_FUNCTION_11)
    464 #define LPC24XX_PIN_LCD_VD_P2_12 \
    465   LPC24XX_PIN(2, 12, LPC24XX_PIN_FUNCTION_01)
    466 #define LPC24XX_PIN_LCD_VD_P2_13 \
    467   LPC24XX_PIN(2, 13, LPC24XX_PIN_FUNCTION_01)
    468 #define LPC24XX_PIN_LCD_VD_P4_28 \
    469   LPC24XX_PIN(4, 28, LPC24XX_PIN_FUNCTION_10)
    470 #define LPC24XX_PIN_LCD_VD_P4_29 \
    471   LPC24XX_PIN(4, 29, LPC24XX_PIN_FUNCTION_10)
     597  LPC24XX_PIN(2, 11, LPC24XX_PIN_FUNCTION_01, 7)
     598
     599#define LPC24XX_PIN_LCD_VD_0_P0_4 \
     600  LPC24XX_PIN(0, 4, LPC24XX_PIN_FUNCTION_01, 7)
     601#define LPC24XX_PIN_LCD_VD_0_P2_6 \
     602  LPC24XX_PIN(2, 6, LPC24XX_PIN_FUNCTION_11, 6)
     603#define LPC24XX_PIN_LCD_VD_1_P0_5 \
     604  LPC24XX_PIN(0, 5, LPC24XX_PIN_FUNCTION_01, 7)
     605#define LPC24XX_PIN_LCD_VD_1_P2_7 \
     606  LPC24XX_PIN(2, 7, LPC24XX_PIN_FUNCTION_11, 6)
     607#define LPC24XX_PIN_LCD_VD_2_P2_8 \
     608  LPC24XX_PIN(2, 8, LPC24XX_PIN_FUNCTION_11, 6)
     609#define LPC24XX_PIN_LCD_VD_2_P4_28 \
     610  LPC24XX_PIN(4, 28, LPC24XX_PIN_FUNCTION_10, 7)
     611#define LPC24XX_PIN_LCD_VD_3_P2_9 \
     612  LPC24XX_PIN(2, 9, LPC24XX_PIN_FUNCTION_11, 6)
     613#define LPC24XX_PIN_LCD_VD_3_P2_12 \
     614  LPC24XX_PIN(2, 12, LPC24XX_PIN_FUNCTION_01, 5)
     615#define LPC24XX_PIN_LCD_VD_3_P4_29 \
     616  LPC24XX_PIN(4, 29, LPC24XX_PIN_FUNCTION_10, 7)
     617#define LPC24XX_PIN_LCD_VD_4_P2_6 \
     618  LPC24XX_PIN(2, 6, LPC24XX_PIN_FUNCTION_11, 7)
     619#define LPC24XX_PIN_LCD_VD_4_P2_12 \
     620  LPC24XX_PIN(2, 12, LPC24XX_PIN_FUNCTION_01, 4)
     621#define LPC24XX_PIN_LCD_VD_5_P2_7 \
     622  LPC24XX_PIN(2, 7, LPC24XX_PIN_FUNCTION_11, 7)
     623#define LPC24XX_PIN_LCD_VD_5_P2_13 \
     624  LPC24XX_PIN(2, 13, LPC24XX_PIN_FUNCTION_01, 5)
     625#define LPC24XX_PIN_LCD_VD_6_P1_20 \
     626  LPC24XX_PIN(1, 20, LPC24XX_PIN_FUNCTION_01, 6)
     627#define LPC24XX_PIN_LCD_VD_6_P2_8 \
     628  LPC24XX_PIN(2, 8, LPC24XX_PIN_FUNCTION_11, 7)
     629#define LPC24XX_PIN_LCD_VD_6_P4_28 \
     630  LPC24XX_PIN(4, 28, LPC24XX_PIN_FUNCTION_10, 5)
     631#define LPC24XX_PIN_LCD_VD_7_P1_21 \
     632  LPC24XX_PIN(1, 21, LPC24XX_PIN_FUNCTION_01, 6)
     633#define LPC24XX_PIN_LCD_VD_7_P2_9 \
     634  LPC24XX_PIN(2, 9, LPC24XX_PIN_FUNCTION_11, 7)
     635#define LPC24XX_PIN_LCD_VD_7_P4_29 \
     636  LPC24XX_PIN(4, 29, LPC24XX_PIN_FUNCTION_10, 5)
     637#define LPC24XX_PIN_LCD_VD_8_P0_6 \
     638  LPC24XX_PIN(0, 6, LPC24XX_PIN_FUNCTION_01, 7)
     639#define LPC24XX_PIN_LCD_VD_8_P1_22 \
     640  LPC24XX_PIN(1, 22, LPC24XX_PIN_FUNCTION_01, 6)
     641#define LPC24XX_PIN_LCD_VD_8_P2_12 \
     642  LPC24XX_PIN(2, 12, LPC24XX_PIN_FUNCTION_01, 6)
     643#define LPC24XX_PIN_LCD_VD_9_P0_7 \
     644  LPC24XX_PIN(0, 7, LPC24XX_PIN_FUNCTION_01, 7)
     645#define LPC24XX_PIN_LCD_VD_9_P1_23 \
     646  LPC24XX_PIN(1, 23, LPC24XX_PIN_FUNCTION_01, 6)
     647#define LPC24XX_PIN_LCD_VD_9_P2_13 \
     648  LPC24XX_PIN(2, 13, LPC24XX_PIN_FUNCTION_01, 6)
     649#define LPC24XX_PIN_LCD_VD_10_P1_20 \
     650  LPC24XX_PIN(1, 20, LPC24XX_PIN_FUNCTION_01, 7)
     651#define LPC24XX_PIN_LCD_VD_10_P1_24 \
     652  LPC24XX_PIN(1, 24, LPC24XX_PIN_FUNCTION_01, 6)
     653#define LPC24XX_PIN_LCD_VD_10_P4_28 \
     654  LPC24XX_PIN(4, 28, LPC24XX_PIN_FUNCTION_10, 6)
     655#define LPC24XX_PIN_LCD_VD_11_P1_21 \
     656  LPC24XX_PIN(1, 21, LPC24XX_PIN_FUNCTION_01, 7)
     657#define LPC24XX_PIN_LCD_VD_11_P1_25 \
     658  LPC24XX_PIN(1, 25, LPC24XX_PIN_FUNCTION_01, 6)
     659#define LPC24XX_PIN_LCD_VD_11_P4_29 \
     660  LPC24XX_PIN(4, 29, LPC24XX_PIN_FUNCTION_10, 6)
     661#define LPC24XX_PIN_LCD_VD_12_P1_22 \
     662  LPC24XX_PIN(1, 22, LPC24XX_PIN_FUNCTION_01, 7)
     663#define LPC24XX_PIN_LCD_VD_12_P1_26 \
     664  LPC24XX_PIN(1, 26, LPC24XX_PIN_FUNCTION_01, 6)
     665#define LPC24XX_PIN_LCD_VD_13_P1_23 \
     666  LPC24XX_PIN(1, 23, LPC24XX_PIN_FUNCTION_01, 7)
     667#define LPC24XX_PIN_LCD_VD_13_P1_27 \
     668  LPC24XX_PIN(1, 27, LPC24XX_PIN_FUNCTION_01, 6)
     669#define LPC24XX_PIN_LCD_VD_14_P1_24 \
     670  LPC24XX_PIN(1, 24, LPC24XX_PIN_FUNCTION_01, 7)
     671#define LPC24XX_PIN_LCD_VD_14_P1_28 \
     672  LPC24XX_PIN(1, 28, LPC24XX_PIN_FUNCTION_01, 6)
     673#define LPC24XX_PIN_LCD_VD_15_P1_25 \
     674  LPC24XX_PIN(1, 25, LPC24XX_PIN_FUNCTION_01, 7)
     675#define LPC24XX_PIN_LCD_VD_15_P1_29 \
     676  LPC24XX_PIN(1, 29, LPC24XX_PIN_FUNCTION_01, 6)
     677#define LPC24XX_PIN_LCD_VD_16_P0_8 \
     678  LPC24XX_PIN(0, 8, LPC24XX_PIN_FUNCTION_01, 7)
     679#define LPC24XX_PIN_LCD_VD_17_P0_9 \
     680  LPC24XX_PIN(0, 9, LPC24XX_PIN_FUNCTION_01, 7)
     681#define LPC24XX_PIN_LCD_VD_18_P2_12 \
     682  LPC24XX_PIN(2, 12, LPC24XX_PIN_FUNCTION_01, 7)
     683#define LPC24XX_PIN_LCD_VD_19_P2_13 \
     684  LPC24XX_PIN(2, 13, LPC24XX_PIN_FUNCTION_01, 7)
     685#define LPC24XX_PIN_LCD_VD_20_P1_26 \
     686  LPC24XX_PIN(1, 26, LPC24XX_PIN_FUNCTION_01, 7)
     687#define LPC24XX_PIN_LCD_VD_21_P1_27 \
     688  LPC24XX_PIN(1, 27, LPC24XX_PIN_FUNCTION_01, 7)
     689#define LPC24XX_PIN_LCD_VD_22_P1_28 \
     690  LPC24XX_PIN(1, 28, LPC24XX_PIN_FUNCTION_01, 7)
     691#define LPC24XX_PIN_LCD_VD_23_P1_29 \
     692  LPC24XX_PIN(1, 29, LPC24XX_PIN_FUNCTION_01, 7)
    472693
    473694/** @} */
    … …  
    480701
    481702#define LPC24XX_PIN_PWM_0_CHANNEL_1_P1_2 \
    482   LPC24XX_PIN(1, 2, LPC24XX_PIN_FUNCTION_11)
     703  LPC24XX_PIN(1, 2, LPC24XX_PIN_FUNCTION_11, 3)
    483704#define LPC24XX_PIN_PWM_0_CHANNEL_1_P3_16 \
    484   LPC24XX_PIN(3, 16, LPC24XX_PIN_FUNCTION_10)
     705  LPC24XX_PIN(3, 16, LPC24XX_PIN_FUNCTION_10, 2)
    485706
    486707#define LPC24XX_PIN_PWM_0_CHANNEL_2_P1_3 \
    487   LPC24XX_PIN(1, 3, LPC24XX_PIN_FUNCTION_11)
     708  LPC24XX_PIN(1, 3, LPC24XX_PIN_FUNCTION_11, 3)
    488709#define LPC24XX_PIN_PWM_0_CHANNEL_2_P3_17 \
    489   LPC24XX_PIN(3, 17, LPC24XX_PIN_FUNCTION_10)
     710  LPC24XX_PIN(3, 17, LPC24XX_PIN_FUNCTION_10, 2)
    490711
    491712#define LPC24XX_PIN_PWM_0_CHANNEL_3_P1_5 \
    492   LPC24XX_PIN(1, 5, LPC24XX_PIN_FUNCTION_11)
     713  LPC24XX_PIN(1, 5, LPC24XX_PIN_FUNCTION_11, 3)
    493714#define LPC24XX_PIN_PWM_0_CHANNEL_3_P3_18 \
    494   LPC24XX_PIN(3, 18, LPC24XX_PIN_FUNCTION_10)
     715  LPC24XX_PIN(3, 18, LPC24XX_PIN_FUNCTION_10, 2)
    495716
    496717#define LPC24XX_PIN_PWM_0_CHANNEL_4_P1_6 \
    497   LPC24XX_PIN(1, 6, LPC24XX_PIN_FUNCTION_11)
     718  LPC24XX_PIN(1, 6, LPC24XX_PIN_FUNCTION_11, 3)
    498719#define LPC24XX_PIN_PWM_0_CHANNEL_4_P3_19 \
    499   LPC24XX_PIN(3, 19, LPC24XX_PIN_FUNCTION_10)
     720  LPC24XX_PIN(3, 19, LPC24XX_PIN_FUNCTION_10, 2)
    500721
    501722#define LPC24XX_PIN_PWM_0_CHANNEL_5_P1_7 \
    502   LPC24XX_PIN(1, 7, LPC24XX_PIN_FUNCTION_11)
     723  LPC24XX_PIN(1, 7, LPC24XX_PIN_FUNCTION_11, 3)
    503724#define LPC24XX_PIN_PWM_0_CHANNEL_5_P3_20 \
    504   LPC24XX_PIN(3, 20, LPC24XX_PIN_FUNCTION_10)
     725  LPC24XX_PIN(3, 20, LPC24XX_PIN_FUNCTION_10, 2)
    505726
    506727#define LPC24XX_PIN_PWM_0_CHANNEL_6_P1_11 \
    507   LPC24XX_PIN(1, 11, LPC24XX_PIN_FUNCTION_11)
     728  LPC24XX_PIN(1, 11, LPC24XX_PIN_FUNCTION_11, 3)
    508729#define LPC24XX_PIN_PWM_0_CHANNEL_6_P3_21 \
    509   LPC24XX_PIN(3, 21, LPC24XX_PIN_FUNCTION_10)
     730  LPC24XX_PIN(3, 21, LPC24XX_PIN_FUNCTION_10, 2)
    510731
    511732#define LPC24XX_PIN_PWM_0_CAPTURE_0_P1_12 \
    512   LPC24XX_PIN(1, 12, LPC24XX_PIN_FUNCTION_11)
     733  LPC24XX_PIN(1, 12, LPC24XX_PIN_FUNCTION_11, 3)
    513734#define LPC24XX_PIN_PWM_0_CAPTURE_0_P3_22 \
    514   LPC24XX_PIN(3, 22, LPC24XX_PIN_FUNCTION_10)
     735  LPC24XX_PIN(3, 22, LPC24XX_PIN_FUNCTION_10, 2)
    515736
    516737/** @} */
    … …  
    523744
    524745#define LPC24XX_PIN_PWM_1_CHANNEL_1_P1_18 \
    525   LPC24XX_PIN(1, 18, LPC24XX_PIN_FUNCTION_10)
     746  LPC24XX_PIN(1, 18, LPC24XX_PIN_FUNCTION_10, 2)
    526747#define LPC24XX_PIN_PWM_1_CHANNEL_1_P2_0 \
    527   LPC24XX_PIN(2, 0, LPC24XX_PIN_FUNCTION_01)
     748  LPC24XX_PIN(2, 0, LPC24XX_PIN_FUNCTION_01, 1)
    528749#define LPC24XX_PIN_PWM_1_CHANNEL_1_P3_24 \
    529   LPC24XX_PIN(3, 24, LPC24XX_PIN_FUNCTION_11)
     750  LPC24XX_PIN(3, 24, LPC24XX_PIN_FUNCTION_11, 2)
    530751
    531752#define LPC24XX_PIN_PWM_1_CHANNEL_2_P1_20 \
    532   LPC24XX_PIN(1, 20, LPC24XX_PIN_FUNCTION_10)
     753  LPC24XX_PIN(1, 20, LPC24XX_PIN_FUNCTION_10, 2)
    533754#define LPC24XX_PIN_PWM_1_CHANNEL_2_P2_1 \
    534   LPC24XX_PIN(2, 1, LPC24XX_PIN_FUNCTION_01)
     755  LPC24XX_PIN(2, 1, LPC24XX_PIN_FUNCTION_01, 1)
    535756#define LPC24XX_PIN_PWM_1_CHANNEL_2_P3_25 \
    536   LPC24XX_PIN(3, 25, LPC24XX_PIN_FUNCTION_11)
     757  LPC24XX_PIN(3, 25, LPC24XX_PIN_FUNCTION_11, 2)
    537758
    538759#define LPC24XX_PIN_PWM_1_CHANNEL_3_P1_21 \
    539   LPC24XX_PIN(1, 21, LPC24XX_PIN_FUNCTION_10)
     760  LPC24XX_PIN(1, 21, LPC24XX_PIN_FUNCTION_10, 2)
    540761#define LPC24XX_PIN_PWM_1_CHANNEL_3_P2_2 \
    541   LPC24XX_PIN(2, 2, LPC24XX_PIN_FUNCTION_01)
     762  LPC24XX_PIN(2, 2, LPC24XX_PIN_FUNCTION_01, 1)
    542763#define LPC24XX_PIN_PWM_1_CHANNEL_3_P3_26 \
    543   LPC24XX_PIN(3, 26, LPC24XX_PIN_FUNCTION_11)
     764  LPC24XX_PIN(3, 26, LPC24XX_PIN_FUNCTION_11, 2)
    544765
    545766#define LPC24XX_PIN_PWM_1_CHANNEL_4_P1_23 \
    546   LPC24XX_PIN(1, 23, LPC24XX_PIN_FUNCTION_10)
     767  LPC24XX_PIN(1, 23, LPC24XX_PIN_FUNCTION_10, 2)
    547768#define LPC24XX_PIN_PWM_1_CHANNEL_4_P2_3 \
    548   LPC24XX_PIN(2, 3, LPC24XX_PIN_FUNCTION_01)
     769  LPC24XX_PIN(2, 3, LPC24XX_PIN_FUNCTION_01, 1)
    549770#define LPC24XX_PIN_PWM_1_CHANNEL_4_P3_27 \
    550   LPC24XX_PIN(3, 27, LPC24XX_PIN_FUNCTION_11)
     771  LPC24XX_PIN(3, 27, LPC24XX_PIN_FUNCTION_11, 2)
    551772
    552773#define LPC24XX_PIN_PWM_1_CHANNEL_5_P1_24 \
    553   LPC24XX_PIN(1, 24, LPC24XX_PIN_FUNCTION_10)
     774  LPC24XX_PIN(1, 24, LPC24XX_PIN_FUNCTION_10, 2)
    554775#define LPC24XX_PIN_PWM_1_CHANNEL_5_P2_4 \
    555   LPC24XX_PIN(2, 4, LPC24XX_PIN_FUNCTION_01)
     776  LPC24XX_PIN(2, 4, LPC24XX_PIN_FUNCTION_01, 1)
    556777#define LPC24XX_PIN_PWM_1_CHANNEL_5_P3_28 \
    557   LPC24XX_PIN(3, 28, LPC24XX_PIN_FUNCTION_11)
     778  LPC24XX_PIN(3, 28, LPC24XX_PIN_FUNCTION_11, 2)
    558779
    559780#define LPC24XX_PIN_PWM_1_CHANNEL_6_P1_26 \
    560   LPC24XX_PIN(1, 26, LPC24XX_PIN_FUNCTION_10)
     781  LPC24XX_PIN(1, 26, LPC24XX_PIN_FUNCTION_10, 2)
    561782#define LPC24XX_PIN_PWM_1_CHANNEL_6_P2_5 \
    562   LPC24XX_PIN(2, 5, LPC24XX_PIN_FUNCTION_01)
     783  LPC24XX_PIN(2, 5, LPC24XX_PIN_FUNCTION_01, 1)
    563784#define LPC24XX_PIN_PWM_1_CHANNEL_6_P3_29 \
    564   LPC24XX_PIN(3, 29, LPC24XX_PIN_FUNCTIO9_11)
     785  LPC24XX_PIN(3, 29, LPC24XX_PIN_FUNCTIO9_11, 2)
    565786
    566787#define LPC24XX_PIN_PWM_1_CAPTURE_0_P1_28 \
    567   LPC24XX_PIN(1, 28, LPC24XX_PIN_FUNCTION_10)
     788  LPC24XX_PIN(1, 28, LPC24XX_PIN_FUNCTION_10, 2)
    568789#define LPC24XX_PIN_PWM_1_CAPTURE_0_P2_7 \
    569   LPC24XX_PIN(2, 6, LPC24XX_PIN_FUNCTION_01)
     790  LPC24XX_PIN(2, 6, LPC24XX_PIN_FUNCTION_01, 1)
    570791#define LPC24XX_PIN_PWM_1_CAPTURE_0_P3_23 \
    571   LPC24XX_PIN(3, 23, LPC24XX_PIN_FUNCTION_11)
     792  LPC24XX_PIN(3, 23, LPC24XX_PIN_FUNCTION_11, 2)
    572793
    573794#define LPC24XX_PIN_PWM_1_CAPTURE_1_P1_29 \
    574   LPC24XX_PIN(1, 29, LPC24XX_PIN_FUNCTION_10)
    575 
    576 /** @} */
    577 
    578 /**
    579  * @name SPI Pins
    580  *
    581  * @{
    582  */
    583 
    584 #define LPC24XX_PIN_SPI_SCK \
    585   LPC24XX_PIN(0, 15, LPC24XX_PIN_FUNCTION_11)
    586 #define LPC24XX_PIN_SPI_SSEL \
    587   LPC24XX_PIN(0, 16, LPC24XX_PIN_FUNCTION_11)
    588 #define LPC24XX_PIN_SPI_MISO \
    589   LPC24XX_PIN(0, 17, LPC24XX_PIN_FUNCTION_11)
    590 #define LPC24XX_PIN_SPI_MOSI \
    591   LPC24XX_PIN(0, 18, LPC24XX_PIN_FUNCTION_11)
     795  LPC24XX_PIN(1, 29, LPC24XX_PIN_FUNCTION_10, 2)
    592796
    593797/** @} */
    … …  
    600804
    601805#define LPC24XX_PIN_SSP_0_SCK_P0_15 \
    602   LPC24XX_PIN(0, 15, LPC24XX_PIN_FUNCTION_10)
     806  LPC24XX_PIN(0, 15, LPC24XX_PIN_FUNCTION_10, 2)
    603807#define LPC24XX_PIN_SSP_0_SCK_P1_20 \
    604   LPC24XX_PIN(1, 20, LPC24XX_PIN_FUNCTION_11)
     808  LPC24XX_PIN(1, 20, LPC24XX_PIN_FUNCTION_11, 5)
    605809#define LPC24XX_PIN_SSP_0_SCK_P2_22 \
    606   LPC24XX_PIN(2, 22, LPC24XX_PIN_FUNCTION_11)
     810  LPC24XX_PIN(2, 22, LPC24XX_PIN_FUNCTION_11, 2)
    607811
    608812#define LPC24XX_PIN_SSP_0_SSEL_P0_16 \
    609   LPC24XX_PIN(0, 16, LPC24XX_PIN_FUNCTION_10)
     813  LPC24XX_PIN(0, 16, LPC24XX_PIN_FUNCTION_10, 2)
    610814#define LPC24XX_PIN_SSP_0_SSEL_P1_21 \
    611   LPC24XX_PIN(1, 21, LPC24XX_PIN_FUNCTION_11)
     815  LPC24XX_PIN(1, 21, LPC24XX_PIN_FUNCTION_11, 3)
    612816#define LPC24XX_PIN_SSP_0_SSEL_P2_23 \
    613   LPC24XX_PIN(2, 23, LPC24XX_PIN_FUNCTION_11)
     817  LPC24XX_PIN(2, 23, LPC24XX_PIN_FUNCTION_11, 2)
    614818
    615819#define LPC24XX_PIN_SSP_0_MISO_P0_17 \
    616   LPC24XX_PIN(0, 17, LPC24XX_PIN_FUNCTION_10)
     820  LPC24XX_PIN(0, 17, LPC24XX_PIN_FUNCTION_10, 2)
    617821#define LPC24XX_PIN_SSP_0_MISO_P1_23 \
    618   LPC24XX_PIN(1, 23, LPC24XX_PIN_FUNCTION_11)
     822  LPC24XX_PIN(1, 23, LPC24XX_PIN_FUNCTION_11, 5)
    619823#define LPC24XX_PIN_SSP_0_MISO_P2_26 \
    620   LPC24XX_PIN(2, 26, LPC24XX_PIN_FUNCTION_11)
     824  LPC24XX_PIN(2, 26, LPC24XX_PIN_FUNCTION_11, 2)
    621825
    622826#define LPC24XX_PIN_SSP_0_MOSI_P0_18 \
    623   LPC24XX_PIN(0, 18, LPC24XX_PIN_FUNCTION_10)
     827  LPC24XX_PIN(0, 18, LPC24XX_PIN_FUNCTION_10, 2)
    624828#define LPC24XX_PIN_SSP_0_MOSI_P1_24 \
    625   LPC24XX_PIN(1, 24, LPC24XX_PIN_FUNCTION_11)
     829  LPC24XX_PIN(1, 24, LPC24XX_PIN_FUNCTION_11, 5)
    626830#define LPC24XX_PIN_SSP_0_MOSI_P2_27 \
    627   LPC24XX_PIN(2, 27, LPC24XX_PIN_FUNCTION_11)
     831  LPC24XX_PIN(2, 27, LPC24XX_PIN_FUNCTION_11, 2)
    628832
    629833/** @} */
    … …  
    636840
    637841#define LPC24XX_PIN_SSP_1_SCK_P0_6 \
    638   LPC24XX_PIN(0, 6, LPC24XX_PIN_FUNCTION_10)
     842  LPC24XX_PIN(0, 7, LPC24XX_PIN_FUNCTION_10, 2)
    639843#define LPC24XX_PIN_SSP_1_SCK_P0_12 \
    640   LPC24XX_PIN(0, 12, LPC24XX_PIN_FUNCTION_10)
     844  LPC24XX_PIN(1, 31, LPC24XX_PIN_FUNCTION_10, 2)
    641845#define LPC24XX_PIN_SSP_1_SCK_P4_20 \
    642   LPC24XX_PIN(4, 20, LPC24XX_PIN_FUNCTION_11)
     846  LPC24XX_PIN(4, 20, LPC24XX_PIN_FUNCTION_11, 3)
    643847
    644848#define LPC24XX_PIN_SSP_1_SSEL_P0_7 \
    645   LPC24XX_PIN(0, 7, LPC24XX_PIN_FUNCTION_10)
     849  LPC24XX_PIN(0, 6, LPC24XX_PIN_FUNCTION_10, 2)
    646850#define LPC24XX_PIN_SSP_1_SSEL_P0_13 \
    647   LPC24XX_PIN(0, 13, LPC24XX_PIN_FUNCTION_10)
     851  LPC24XX_PIN(0, 14, LPC24XX_PIN_FUNCTION_11, 2)
    648852#define LPC24XX_PIN_SSP_1_SSEL_P4_21 \
    649   LPC24XX_PIN(4, 21, LPC24XX_PIN_FUNCTION_11)
     853  LPC24XX_PIN(4, 21, LPC24XX_PIN_FUNCTION_11, 3)
    650854
    651855#define LPC24XX_PIN_SSP_1_MISO_P0_8 \
    652   LPC24XX_PIN(0, 8, LPC24XX_PIN_FUNCTION_10)
     856  LPC24XX_PIN(0, 8, LPC24XX_PIN_FUNCTION_10, 2)
    653857#define LPC24XX_PIN_SSP_1_MISO_P0_14 \
    654   LPC24XX_PIN(0, 14, LPC24XX_PIN_FUNCTION_11)
     858  LPC24XX_PIN(0, 12, LPC24XX_PIN_FUNCTION_10, 2)
    655859#define LPC24XX_PIN_SSP_1_MISO_P4_22 \
    656   LPC24XX_PIN(4, 22, LPC24XX_PIN_FUNCTION_11)
     860  LPC24XX_PIN(4, 22, LPC24XX_PIN_FUNCTION_11, 3)
    657861
    658862#define LPC24XX_PIN_SSP_1_MOSI_P0_9 \
    659   LPC24XX_PIN(0, 9, LPC24XX_PIN_FUNCTION_10)
     863  LPC24XX_PIN(0, 9, LPC24XX_PIN_FUNCTION_10, 2)
    660864#define LPC24XX_PIN_SSP_1_MOSI_P1_31 \
    661   LPC24XX_PIN(1, 31, LPC24XX_PIN_FUNCTION_10)
     865  LPC24XX_PIN(0, 13, LPC24XX_PIN_FUNCTION_10, 2)
    662866#define LPC24XX_PIN_SSP_1_MOSI_P4_23 \
    663   LPC24XX_PIN(4, 23, LPC24XX_PIN_FUNCTION_11)
     867  LPC24XX_PIN(4, 23, LPC24XX_PIN_FUNCTION_11, 3)
    664868
    665869/** @} */
    … …  
    672876
    673877#define LPC24XX_PIN_UART_0_TXD \
    674   LPC24XX_PIN(0, 2, LPC24XX_PIN_FUNCTION_01)
     878  LPC24XX_PIN(0, 2, LPC24XX_PIN_FUNCTION_01, 1)
    675879
    676880#define LPC24XX_PIN_UART_0_RXD \
    677   LPC24XX_PIN(0, 3, LPC24XX_PIN_FUNCTION_01)
     881  LPC24XX_PIN(0, 3, LPC24XX_PIN_FUNCTION_01, 1)
    678882
    679883/** @} */
    … …  
    686890
    687891#define LPC24XX_PIN_UART_1_TXD_P0_15 \
    688   LPC24XX_PIN(0, 15, LPC24XX_PIN_FUNCTION_01)
     892  LPC24XX_PIN(0, 15, LPC24XX_PIN_FUNCTION_01, 1)
    689893#define LPC24XX_PIN_UART_1_TXD_P2_0 \
    690   LPC24XX_PIN(2, 0, LPC24XX_PIN_FUNCTION_10)
     894  LPC24XX_PIN(2, 0, LPC24XX_PIN_FUNCTION_10, 2)
    691895#define LPC24XX_PIN_UART_1_TXD_P3_16 \
    692   LPC24XX_PIN(3, 16, LPC24XX_PIN_FUNCTION_11)
     896  LPC24XX_PIN(3, 16, LPC24XX_PIN_FUNCTION_11, 3)
    693897
    694898#define LPC24XX_PIN_UART_1_RXD_P0_16 \
    695   LPC24XX_PIN(0, 16, LPC24XX_PIN_FUNCTION_01)
     899  LPC24XX_PIN(0, 16, LPC24XX_PIN_FUNCTION_01, 1)
    696900#define LPC24XX_PIN_UART_1_RXD_P2_1 \
    697   LPC24XX_PIN(2, 1, LPC24XX_PIN_FUNCTION_10)
     901  LPC24XX_PIN(2, 1, LPC24XX_PIN_FUNCTION_10, 2)
    698902#define LPC24XX_PIN_UART_1_RXD_P3_17 \
    699   LPC24XX_PIN(3, 17, LPC24XX_PIN_FUNCTION_11)
     903  LPC24XX_PIN(3, 17, LPC24XX_PIN_FUNCTION_11, 3)
    700904
    701905/** @} */
    … …  
    708912
    709913#define LPC24XX_PIN_UART_2_TXD_P0_10 \
    710   LPC24XX_PIN(0, 10, LPC24XX_PIN_FUNCTION_01)
     914  LPC24XX_PIN(0, 10, LPC24XX_PIN_FUNCTION_01, 1)
    711915#define LPC24XX_PIN_UART_2_TXD_P2_8 \
    712   LPC24XX_PIN(2, 8, LPC24XX_PIN_FUNCTION_10)
     916  LPC24XX_PIN(2, 8, LPC24XX_PIN_FUNCTION_10, 2)
    713917#define LPC24XX_PIN_UART_2_TXD_P4_22 \
    714   LPC24XX_PIN(4, 22, LPC24XX_PIN_FUNCTION_10)
     918  LPC24XX_PIN(4, 22, LPC24XX_PIN_FUNCTION_10, 2)
    715919
    716920#define LPC24XX_PIN_UART_2_RXD_P0_11 \
    717   LPC24XX_PIN(0, 11, LPC24XX_PIN_FUNCTION_01)
     921  LPC24XX_PIN(0, 11, LPC24XX_PIN_FUNCTION_01, 1)
    718922#define LPC24XX_PIN_UART_2_RXD_P2_9 \
    719   LPC24XX_PIN(2, 9, LPC24XX_PIN_FUNCTION_10)
     923  LPC24XX_PIN(2, 9, LPC24XX_PIN_FUNCTION_10, 2)
    720924#define LPC24XX_PIN_UART_2_RXD_P4_23 \
    721   LPC24XX_PIN(4, 23, LPC24XX_PIN_FUNCTION_10)
     925  LPC24XX_PIN(4, 23, LPC24XX_PIN_FUNCTION_10, 2)
    722926
    723927/** @} */
    … …  
    730934
    731935#define LPC24XX_PIN_UART_3_TXD_P0_0 \
    732   LPC24XX_PIN(0, 0, LPC24XX_PIN_FUNCTION_10)
     936  LPC24XX_PIN(0, 0, LPC24XX_PIN_FUNCTION_10, 2)
    733937#define LPC24XX_PIN_UART_3_TXD_P0_25 \
    734   LPC24XX_PIN(0, 25, LPC24XX_PIN_FUNCTION_11)
     938  LPC24XX_PIN(0, 25, LPC24XX_PIN_FUNCTION_11, 3)
    735939#define LPC24XX_PIN_UART_3_TXD_P4_28 \
    736   LPC24XX_PIN(4, 28, LPC24XX_PIN_FUNCTION_11)
     940  LPC24XX_PIN(4, 28, LPC24XX_PIN_FUNCTION_11, 2)
    737941
    738942#define LPC24XX_PIN_UART_3_RXD_P0_1 \
    739   LPC24XX_PIN(0, 1, LPC24XX_PIN_FUNCTION_10)
     943  LPC24XX_PIN(0, 1, LPC24XX_PIN_FUNCTION_10, 2)
    740944#define LPC24XX_PIN_UART_3_RXD_P0_25 \
    741   LPC24XX_PIN(0, 26, LPC24XX_PIN_FUNCTION_11)
     945  LPC24XX_PIN(0, 26, LPC24XX_PIN_FUNCTION_11, 3)
    742946#define LPC24XX_PIN_UART_3_RXD_P4_29 \
    743   LPC24XX_PIN(4, 29, LPC24XX_PIN_FUNCTION_11)
     947  LPC24XX_PIN(4, 29, LPC24XX_PIN_FUNCTION_11, 2)
    744948
    745949/** @} */
    … …  
    752956
    753957#define LPC24XX_PIN_USB_D_PLUS_1\
    754   LPC24XX_PIN(0, 29, LPC24XX_PIN_FUNCTION_01)
     958  LPC24XX_PIN(0, 29, LPC24XX_PIN_FUNCTION_01, 1)
    755959#define LPC24XX_PIN_USB_D_MINUS_1\
    756   LPC24XX_PIN(0, 30, LPC24XX_PIN_FUNCTION_01)
     960  LPC24XX_PIN(0, 30, LPC24XX_PIN_FUNCTION_01, 1)
    757961#define LPC24XX_PIN_USB_UP_LED_1\
    758   LPC24XX_PIN(1, 18, LPC24XX_PIN_FUNCTION_01)
     962  LPC24XX_PIN(1, 18, LPC24XX_PIN_FUNCTION_01, 1)
    759963#define LPC24XX_PIN_USB_TX_E_1\
    760   LPC24XX_PIN(1, 19, LPC24XX_PIN_FUNCTION_01)
     964  LPC24XX_PIN(1, 19, LPC24XX_PIN_FUNCTION_01, 1)
    761965#define LPC24XX_PIN_USB_PPWR_1\
    762   LPC24XX_PIN(1, 19, LPC24XX_PIN_FUNCTION_10)
     966  LPC24XX_PIN(1, 19, LPC24XX_PIN_FUNCTION_10, 2)
    763967#define LPC24XX_PIN_USB_TX_DP_1\
    764   LPC24XX_PIN(1, 20, LPC24XX_PIN_FUNCTION_01)
     968  LPC24XX_PIN(1, 20, LPC24XX_PIN_FUNCTION_01, 1)
    765969#define LPC24XX_PIN_USB_TX_DM_1\
    766   LPC24XX_PIN(1, 21, LPC24XX_PIN_FUNCTION_01)
     970  LPC24XX_PIN(1, 21, LPC24XX_PIN_FUNCTION_01, 1)
    767971#define LPC24XX_PIN_USB_RCV_1\
    768   LPC24XX_PIN(1, 22, LPC24XX_PIN_FUNCTION_01)
     972  LPC24XX_PIN(1, 22, LPC24XX_PIN_FUNCTION_01, 1)
    769973#define LPC24XX_PIN_USB_PWRD_1\
    770   LPC24XX_PIN(1, 22, LPC24XX_PIN_FUNCTION_10)
     974  LPC24XX_PIN(1, 22, LPC24XX_PIN_FUNCTION_10, 2)
    771975#define LPC24XX_PIN_USB_RX_DP_1\
    772   LPC24XX_PIN(1, 23, LPC24XX_PIN_FUNCTION_01)
     976  LPC24XX_PIN(1, 23, LPC24XX_PIN_FUNCTION_01, 1)
    773977#define LPC24XX_PIN_USB_RX_DM_1\
    774   LPC24XX_PIN(1, 24, LPC24XX_PIN_FUNCTION_01)
     978  LPC24XX_PIN(1, 24, LPC24XX_PIN_FUNCTION_01, 1)
    775979#define LPC24XX_PIN_USB_LS_1\
    776   LPC24XX_PIN(1, 25, LPC24XX_PIN_FUNCTION_01)
     980  LPC24XX_PIN(1, 25, LPC24XX_PIN_FUNCTION_01, 1)
    777981#define LPC24XX_PIN_USB_HSTEN_1\
    778   LPC24XX_PIN(1, 25, LPC24XX_PIN_FUNCTION_10)
     982  LPC24XX_PIN(1, 25, LPC24XX_PIN_FUNCTION_10, 2)
    779983#define LPC24XX_PIN_USB_SSPND_1\
    780   LPC24XX_PIN(1, 26, LPC24XX_PIN_FUNCTION_01)
     984  LPC24XX_PIN(1, 26, LPC24XX_PIN_FUNCTION_01, 1)
    781985#define LPC24XX_PIN_USB_INT_1\
    782   LPC24XX_PIN(1, 27, LPC24XX_PIN_FUNCTION_01)
     986  LPC24XX_PIN(1, 27, LPC24XX_PIN_FUNCTION_01, 1)
    783987#define LPC24XX_PIN_USB_OVRCR_1\
    784   LPC24XX_PIN(1, 27, LPC24XX_PIN_FUNCTION_10)
     988  LPC24XX_PIN(1, 27, LPC24XX_PIN_FUNCTION_10, 2)
    785989#define LPC24XX_PIN_USB_SCL_1\
    786   LPC24XX_PIN(1, 28, LPC24XX_PIN_FUNCTION_01)
     990  LPC24XX_PIN(1, 28, LPC24XX_PIN_FUNCTION_01, 1)
    787991#define LPC24XX_PIN_USB_SDA_1\
    788   LPC24XX_PIN(1, 29, LPC24XX_PIN_FUNCTION_01)
     992  LPC24XX_PIN(1, 29, LPC24XX_PIN_FUNCTION_01, 1)
    789993#define LPC24XX_PIN_USB_CONNECT_1\
    790   LPC24XX_PIN(2, 9, LPC24XX_PIN_FUNCTION_01)
     994  LPC24XX_PIN(2, 9, LPC24XX_PIN_FUNCTION_01, 1)
    791995
    792996/** @} */
    … …  
    7991003
    8001004#define LPC24XX_PIN_USB_PPWR_2\
    801   LPC24XX_PIN(0, 12, LPC24XX_PIN_FUNCTION_01)
     1005  LPC24XX_PIN(0, 12, LPC24XX_PIN_FUNCTION_01, 1)
    8021006#define LPC24XX_PIN_USB_UP_LED_2\
    803   LPC24XX_PIN(0, 13, LPC24XX_PIN_FUNCTION_01)
     1007  LPC24XX_PIN(0, 13, LPC24XX_PIN_FUNCTION_01, 1)
    8041008#define LPC24XX_PIN_USB_HSTEN_2\
    805   LPC24XX_PIN(0, 14, LPC24XX_PIN_FUNCTION_01)
     1009  LPC24XX_PIN(0, 14, LPC24XX_PIN_FUNCTION_01, 1)
    8061010#define LPC24XX_PIN_USB_CONNECT_2\
    807   LPC24XX_PIN(0, 14, LPC24XX_PIN_FUNCTION_01)
     1011  LPC24XX_PIN(0, 14, LPC24XX_PIN_FUNCTION_01, 3)
    8081012#define LPC24XX_PIN_USB_D_PLUS_2\
    809   LPC24XX_PIN(0, 31, LPC24XX_PIN_FUNCTION_10)
     1013  LPC24XX_PIN(0, 31, LPC24XX_PIN_FUNCTION_01, 1)
    8101014#define LPC24XX_PIN_USB_PWRD_2\
    811   LPC24XX_PIN(1, 30, LPC24XX_PIN_FUNCTION_01)
     1015  LPC24XX_PIN(1, 30, LPC24XX_PIN_FUNCTION_01, 1)
    8121016#define LPC24XX_PIN_USB_OVRCR_2\
    813   LPC24XX_PIN(1, 31, LPC24XX_PIN_FUNCTION_01)
     1017  LPC24XX_PIN(1, 31, LPC24XX_PIN_FUNCTION_01, 1)
    8141018
    8151019/** @} */

  • c/src/lib/libbsp/arm/lpc24xx/include/irq.h

    r4c622e5 r4a6cc2a  
    88
    99/*
    10  * Copyright (c) 2008
    11  * Embedded Brains GmbH
    12  * Obere Lagerstr. 30
    13  * D-82178 Puchheim
    14  * Germany
    15  * rtems@embedded-brains.de
     10 * Copyright (c) 2008-2011 embedded brains GmbH.  All rights reserved.
    1611 *
    17  * The license and distribution terms for this file may be found in the file
    18  * LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
     12 *  embedded brains GmbH
     13 *  Obere Lagerstr. 30
     14 *  82178 Puchheim
     15 *  Germany
     16 *  <rtems@embedded-brains.de>
     17 *
     18 * The license and distribution terms for this file may be
     19 * found in the file LICENSE in this distribution or at
     20 * http://www.rtems.com/license/LICENSE.
    1921 */
    2022
    … …  
    2325
    2426#ifndef ASM
    25 
    26 #include <rtems.h>
    27 #include <rtems/irq.h>
    28 #include <rtems/irq-extension.h>
     27  #include <rtems.h>
     28  #include <rtems/irq.h>
     29  #include <rtems/irq-extension.h>
     30#endif
    2931
    3032/**
    … …  
    3436 */
    3537
    36 #define LPC24XX_IRQ_WDT 0
    37 #define LPC24XX_IRQ_SOFTWARE 1
    38 #define LPC24XX_IRQ_ARM_CORE_0 2
    39 #define LPC24XX_IRQ_ARM_CORE_1 3
    40 #define LPC24XX_IRQ_TIMER_0 4
    41 #define LPC24XX_IRQ_TIMER_1 5
    42 #define LPC24XX_IRQ_UART_0 6
    43 #define LPC24XX_IRQ_UART_1 7
    44 #define LPC24XX_IRQ_PWM 8
    45 #define LPC24XX_IRQ_I2C_0 9
    46 #define LPC24XX_IRQ_SPI_SSP_0 10
    47 #define LPC24XX_IRQ_SSP_1 11
    48 #define LPC24XX_IRQ_PLL 12
    49 #define LPC24XX_IRQ_RTC 13
    50 #define LPC24XX_IRQ_EINT_0 14
    51 #define LPC24XX_IRQ_EINT_1 15
    52 #define LPC24XX_IRQ_EINT_2 16
    53 #define LPC24XX_IRQ_EINT_3 17
    54 #define LPC24XX_IRQ_ADC_0 18
    55 #define LPC24XX_IRQ_I2C_1 19
    56 #define LPC24XX_IRQ_BOD 20
    57 #define LPC24XX_IRQ_ETHERNET 21
    58 #define LPC24XX_IRQ_USB 22
    59 #define LPC24XX_IRQ_CAN 23
    60 #define LPC24XX_IRQ_SD_MMC 24
    61 #define LPC24XX_IRQ_DMA 25
    62 #define LPC24XX_IRQ_TIMER_2 26
    63 #define LPC24XX_IRQ_TIMER_3 27
    64 #define LPC24XX_IRQ_UART_2 28
    65 #define LPC24XX_IRQ_UART_3 29
    66 #define LPC24XX_IRQ_I2C_2 30
    67 #define LPC24XX_IRQ_I2S 31
     38#define BSP_INTERRUPT_VECTOR_MIN 0
    6839
    69 #define LPC24XX_IRQ_PRIORITY_VALUE_MIN 0U
    70 #define LPC24XX_IRQ_PRIORITY_VALUE_MAX 15U
    71 #define LPC24XX_IRQ_PRIORITY_COUNT (LPC24XX_IRQ_PRIORITY_VALUE_MAX + 1U)
     40#ifdef ARM_MULTILIB_ARCH_V4
     41  #define LPC24XX_IRQ_WDT 0
     42  #define LPC24XX_IRQ_SOFTWARE 1
     43  #define LPC24XX_IRQ_ARM_CORE_0 2
     44  #define LPC24XX_IRQ_ARM_CORE_1 3
     45  #define LPC24XX_IRQ_TIMER_0 4
     46  #define LPC24XX_IRQ_TIMER_1 5
     47  #define LPC24XX_IRQ_UART_0 6
     48  #define LPC24XX_IRQ_UART_1 7
     49  #define LPC24XX_IRQ_PWM 8
     50  #define LPC24XX_IRQ_I2C_0 9
     51  #define LPC24XX_IRQ_SPI_SSP_0 10
     52  #define LPC24XX_IRQ_SSP_1 11
     53  #define LPC24XX_IRQ_PLL 12
     54  #define LPC24XX_IRQ_RTC 13
     55  #define LPC24XX_IRQ_EINT_0 14
     56  #define LPC24XX_IRQ_EINT_1 15
     57  #define LPC24XX_IRQ_EINT_2 16
     58  #define LPC24XX_IRQ_EINT_3 17
     59  #define LPC24XX_IRQ_ADC_0 18
     60  #define LPC24XX_IRQ_I2C_1 19
     61  #define LPC24XX_IRQ_BOD 20
     62  #define LPC24XX_IRQ_ETHERNET 21
     63  #define LPC24XX_IRQ_USB 22
     64  #define LPC24XX_IRQ_CAN 23
     65  #define LPC24XX_IRQ_SD_MMC 24
     66  #define LPC24XX_IRQ_DMA 25
     67  #define LPC24XX_IRQ_TIMER_2 26
     68  #define LPC24XX_IRQ_TIMER_3 27
     69  #define LPC24XX_IRQ_UART_2 28
     70  #define LPC24XX_IRQ_UART_3 29
     71  #define LPC24XX_IRQ_I2C_2 30
     72  #define LPC24XX_IRQ_I2S 31
     73
     74  #define BSP_INTERRUPT_VECTOR_MAX 31
     75#endif
     76
     77#define LPC24XX_IRQ_PRIORITY_VALUE_MIN 0
     78#ifdef ARM_MULTILIB_ARCH_V4
     79  #define LPC24XX_IRQ_PRIORITY_VALUE_MAX 15
     80#endif
     81#define LPC24XX_IRQ_PRIORITY_COUNT (LPC24XX_IRQ_PRIORITY_VALUE_MAX + 1)
    7282#define LPC24XX_IRQ_PRIORITY_HIGHEST LPC24XX_IRQ_PRIORITY_VALUE_MIN
    7383#define LPC24XX_IRQ_PRIORITY_LOWEST LPC24XX_IRQ_PRIORITY_VALUE_MAX
    7484
    75 /**
    76  * @brief Minimum vector number.
    77  */
    78 #define BSP_INTERRUPT_VECTOR_MIN LPC24XX_IRQ_WDT
    79 
    80 /**
    81  * @brief Maximum vector number.
    82  */
    83 #define BSP_INTERRUPT_VECTOR_MAX LPC24XX_IRQ_I2S
     85#ifndef ASM
    8486
    8587void lpc24xx_irq_set_priority(rtems_vector_number vector, unsigned priority);
    … …  
    8789unsigned lpc24xx_irq_get_priority(rtems_vector_number vector);
    8890
    89 /** @} */
     91void bsp_interrupt_dispatch(void);
    9092
    9193#endif /* ASM */
    9294
     95/** @} */
     96
    9397#endif /* LIBBSP_ARM_LPC24XX_IRQ_H */

  • c/src/lib/libbsp/arm/lpc24xx/include/lcd.h

    r4c622e5 r4a6cc2a  
    88
    99/*
    10  * Copyright (c) 2010 embedded brains GmbH.  All rights reserved.
     10 * Copyright (c) 2010-2011 embedded brains GmbH.  All rights reserved.
    1111 *
    1212 *  embedded brains GmbH
    … …  
    4343
    4444typedef enum {
    45   LCD_MODE_STN_4_BIT = 0,
    46   LCD_MODE_STN_8_BIT,
    47   LCD_MODE_STN_DUAL_PANEL_4_BIT,
    48   LCD_MODE_STN_DUAL_PANEL_8_BIT,
    49   LCD_MODE_TFT_12_BIT_4_4_4,
    50   LCD_MODE_TFT_16_BIT_5_6_5,
    51   LCD_MODE_TFT_16_BIT_1_5_5_5,
    52   LCD_MODE_TFT_24_BIT,
    53   LCD_MODE_DISABLED
     45  #ifdef ARM_MULTILIB_ARCH_V4
     46    LCD_MODE_STN_4_BIT = 0,
     47    LCD_MODE_STN_8_BIT,
     48    LCD_MODE_STN_DUAL_PANEL_4_BIT,
     49    LCD_MODE_STN_DUAL_PANEL_8_BIT,
     50    LCD_MODE_TFT_12_BIT_4_4_4,
     51    LCD_MODE_TFT_16_BIT_5_6_5,
     52    LCD_MODE_TFT_16_BIT_1_5_5_5,
     53    LCD_MODE_TFT_24_BIT,
     54    LCD_MODE_DISABLED
     55  #endif
    5456} lpc24xx_lcd_mode;
    5557

  • c/src/lib/libbsp/arm/lpc24xx/include/lpc-clock-config.h

    r4c622e5 r4a6cc2a  
    3636#define LPC_CLOCK_TIMER_BASE TMR0_BASE_ADDR
    3737
    38 #define LPC_CLOCK_REFERENCE LPC24XX_CCLK
     38#define LPC_CLOCK_REFERENCE LPC24XX_PCLK
    3939
    4040#define LPC_CLOCK_MODULE_ENABLE() \
    41   lpc24xx_module_enable(LPC24XX_MODULE_TIMER_0, LPC24XX_MODULE_CCLK)
     41  lpc24xx_module_enable(LPC24XX_MODULE_TIMER_0, LPC24XX_MODULE_PCLK_DEFAULT)
    4242
    4343#ifdef __cplusplus

  • c/src/lib/libbsp/arm/lpc24xx/include/lpc24xx.h

    r4c622e5 r4a6cc2a  
    88
    99/*
    10  * Copyright (c) 2008
    11  * Embedded Brains GmbH
    12  * Obere Lagerstr. 30
    13  * D-82178 Puchheim
    14  * Germany
    15  * rtems@embedded-brains.de
     10 * Copyright (c) 2008-2011 embedded brains GmbH.  All rights reserved.
    1611 *
    17  * The license and distribution terms for this file may be found in the file
    18  * LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
     12 *  embedded brains GmbH
     13 *  Obere Lagerstr. 30
     14 *  82178 Puchheim
     15 *  Germany
     16 *  <rtems@embedded-brains.de>
     17 *
     18 * The license and distribution terms for this file may be
     19 * found in the file LICENSE in this distribution or at
     20 * http://www.rtems.com/license/LICENSE.
     21 *
     22 * $Id$
    1923 */
    2024
    … …  
    2226#define LIBBSP_ARM_LPC24XX_LPC24XX_H
    2327
    24 #include <stdint.h>
     28#include <rtems/score/cpu.h>
    2529#include <bsp/utility.h>
    2630#include <bsp/lpc-i2s.h>
     31
     32#ifdef ARM_MULTILIB_ARCH_V7M
     33  #include <bsp/lpc17xx.h>
     34#endif
    2735
    2836/**
    … …  
    3543 * @{
    3644 */
     45
     46#ifdef ARM_MULTILIB_ARCH_V4
    3747
    3848/* Vectored Interrupt Controller (VIC) */
    … …  
    119129#define VICVectAddr    (*(volatile uint32_t *) (VIC_BASE_ADDR + 0xF00))
    120130
     131#endif /* ARM_MULTILIB_ARCH_V4 */
    121132
    122133/* Pin Connect Block */
    123 #define PINSEL_BASE_ADDR        0xE002C000
     134#ifdef ARM_MULTILIB_ARCH_V4
     135  #define PINSEL_BASE_ADDR      0xE002C000
     136#else
     137  #define PINSEL_BASE_ADDR      0x4002C000
     138#endif
     139
     140#ifdef ARM_MULTILIB_ARCH_V4
     141
    124142#define PINSEL0        (*(volatile uint32_t *) (PINSEL_BASE_ADDR + 0x00))
    125143#define PINSEL1        (*(volatile uint32_t *) (PINSEL_BASE_ADDR + 0x04))
    … …  
    146164#define PINMODE9        (*(volatile uint32_t *) (PINSEL_BASE_ADDR + 0x64))
    147165
     166#endif /* ARM_MULTILIB_ARCH_V4 */
     167
    148168/* General Purpose Input/Output (GPIO) */
    149 #define GPIO_BASE_ADDR          0xE0028000
     169#ifdef ARM_MULTILIB_ARCH_V4
     170  #define GPIO_BASE_ADDR                0xE0028000
     171#else
     172  #define GPIO_BASE_ADDR                0x40028000
     173#endif
    150174#define IOPIN0         (*(volatile uint32_t *) (GPIO_BASE_ADDR + 0x00))
    151175#define IOSET0         (*(volatile uint32_t *) (GPIO_BASE_ADDR + 0x04))
    … …  
    172196#define IO_INT_STAT     (*(volatile uint32_t *) (GPIO_BASE_ADDR + 0x80))
    173197
     198#ifdef ARM_MULTILIB_ARCH_V4
     199
    174200#define PARTCFG_BASE_ADDR               0x3FFF8000
    175201#define PARTCFG        (*(volatile uint32_t *) (PARTCFG_BASE_ADDR + 0x00))
    176202
     203#endif /* ARM_MULTILIB_ARCH_V4 */
     204
    177205/* Fast I/O setup */
    178 #define FIO_BASE_ADDR           0x3FFFC000
     206#ifdef ARM_MULTILIB_ARCH_V4
     207  #define FIO_BASE_ADDR         0x3FFFC000
     208#else
     209  #define FIO_BASE_ADDR         0x20098000
     210#endif
    179211#define FIO0DIR        (*(volatile uint32_t *) (FIO_BASE_ADDR + 0x00))
    180212#define FIO0MASK       (*(volatile uint32_t *) (FIO_BASE_ADDR + 0x10))
    … …  
    206238#define FIO4SET        (*(volatile uint32_t *) (FIO_BASE_ADDR + 0x98))
    207239#define FIO4CLR        (*(volatile uint32_t *) (FIO_BASE_ADDR + 0x9C))
     240
     241#ifdef ARM_MULTILIB_ARCH_V7M
     242
     243#define FIO5DIR        (*(volatile uint32_t *) (FIO_BASE_ADDR + 0xa0))
     244#define FIO5MASK       (*(volatile uint32_t *) (FIO_BASE_ADDR + 0xb0))
     245#define FIO5PIN        (*(volatile uint32_t *) (FIO_BASE_ADDR + 0xb4))
     246#define FIO5SET        (*(volatile uint32_t *) (FIO_BASE_ADDR + 0xb8))
     247#define FIO5CLR        (*(volatile uint32_t *) (FIO_BASE_ADDR + 0xbC))
     248
     249#endif /* ARM_MULTILIB_ARCH_V7M */
    208250
    209251/* FIOs can be accessed through WORD, HALF-WORD or BYTE. */
    … …  
    388430#define FIO4CLRU       (*(volatile uint16_t *) (FIO_BASE_ADDR + 0x9E))
    389431
     432#ifdef ARM_MULTILIB_ARCH_V4
    390433
    391434/* System Control Block(SCB) modules include Memory Accelerator Module,
    … …  
    436479#define SCS            (*(volatile uint32_t *) (SCB_BASE_ADDR + 0x1A0))
    437480
     481#endif /* ARM_MULTILIB_ARCH_V4 */
    438482
    439483/* External Memory Controller (EMC) */
    440 #define EMC_BASE_ADDR           0xFFE08000
     484#ifdef ARM_MULTILIB_ARCH_V4
     485  #define EMC_BASE_ADDR         0xFFE08000
     486#else
     487  #define EMC_BASE_ADDR         0x2009c000
     488#endif
    441489#define EMC_CTRL       (*(volatile uint32_t *) (EMC_BASE_ADDR + 0x000))
    442490#define EMC_STAT       (*(volatile uint32_t *) (EMC_BASE_ADDR + 0x004))
    … …  
    509557
    510558/* Timer 0 */
    511 #define TMR0_BASE_ADDR          0xE0004000
     559#ifdef ARM_MULTILIB_ARCH_V4
     560  #define TMR0_BASE_ADDR                0xE0004000
     561#else
     562  #define TMR0_BASE_ADDR                0x40004000
     563#endif
    512564#define T0IR           (*(volatile uint32_t *) (TMR0_BASE_ADDR + 0x00))
    513565#define T0TCR          (*(volatile uint32_t *) (TMR0_BASE_ADDR + 0x04))
    … …  
    529581
    530582/* Timer 1 */
    531 #define TMR1_BASE_ADDR          0xE0008000
     583#ifdef ARM_MULTILIB_ARCH_V4
     584  #define TMR1_BASE_ADDR                0xE0008000
     585#else
     586  #define TMR1_BASE_ADDR                0x40008000
     587#endif
    532588#define T1IR           (*(volatile uint32_t *) (TMR1_BASE_ADDR + 0x00))
    533589#define T1TCR          (*(volatile uint32_t *) (TMR1_BASE_ADDR + 0x04))
    … …  
    549605
    550606/* Timer 2 */
    551 #define TMR2_BASE_ADDR          0xE0070000
     607#ifdef ARM_MULTILIB_ARCH_V4
     608  #define TMR2_BASE_ADDR                0xE0070000
     609#else
     610  #define TMR2_BASE_ADDR                0x40090000
     611#endif
    552612#define T2IR           (*(volatile uint32_t *) (TMR2_BASE_ADDR + 0x00))
    553613#define T2TCR          (*(volatile uint32_t *) (TMR2_BASE_ADDR + 0x04))
    … …  
    569629
    570630/* Timer 3 */
    571 #define TMR3_BASE_ADDR          0xE0074000
     631#ifdef ARM_MULTILIB_ARCH_V4
     632  #define TMR3_BASE_ADDR                0xE0074000
     633#else
     634  #define TMR3_BASE_ADDR                0x40094000
     635#endif
    572636#define T3IR           (*(volatile uint32_t *) (TMR3_BASE_ADDR + 0x00))
    573637#define T3TCR          (*(volatile uint32_t *) (TMR3_BASE_ADDR + 0x04))
    … …  
    590654
    591655/* Pulse Width Modulator (PWM) */
    592 #define PWM0_BASE_ADDR          0xE0014000
     656#ifdef ARM_MULTILIB_ARCH_V4
     657  #define PWM0_BASE_ADDR                0xE0014000
     658#else
     659  #define PWM0_BASE_ADDR                0x40014000
     660#endif
    593661#define PWM0IR          (*(volatile uint32_t *) (PWM0_BASE_ADDR + 0x00))
    594662#define PWM0TCR         (*(volatile uint32_t *) (PWM0_BASE_ADDR + 0x04))
    … …  
    614682#define PWM0CTCR        (*(volatile uint32_t *) (PWM0_BASE_ADDR + 0x70))
    615683
    616 #define PWM1_BASE_ADDR          0xE0018000
     684#ifdef ARM_MULTILIB_ARCH_V4
     685  #define PWM1_BASE_ADDR                0xE0018000
     686#else
     687  #define PWM1_BASE_ADDR                0x40018000
     688#endif
    617689#define PWM1IR          (*(volatile uint32_t *) (PWM1_BASE_ADDR + 0x00))
    618690#define PWM1TCR         (*(volatile uint32_t *) (PWM1_BASE_ADDR + 0x04))
    … …  
    640712
    641713/* Universal Asynchronous Receiver Transmitter 0 (UART0) */
    642 #define UART0_BASE_ADDR         0xE000C000
     714#ifdef ARM_MULTILIB_ARCH_V4
     715  #define UART0_BASE_ADDR               0xE000C000
     716#else
     717  #define UART0_BASE_ADDR               0x4000C000
     718#endif
    643719#define U0RBR          (*(volatile uint32_t *) (UART0_BASE_ADDR + 0x00))
    644720#define U0THR          (*(volatile uint32_t *) (UART0_BASE_ADDR + 0x00))
    … …  
    657733
    658734/* Universal Asynchronous Receiver Transmitter 1 (UART1) */
    659 #define UART1_BASE_ADDR         0xE0010000
     735#ifdef ARM_MULTILIB_ARCH_V4
     736  #define UART1_BASE_ADDR               0xE0010000
     737#else
     738  #define UART1_BASE_ADDR               0x40010000
     739#endif
    660740#define U1RBR          (*(volatile uint32_t *) (UART1_BASE_ADDR + 0x00))
    661741#define U1THR          (*(volatile uint32_t *) (UART1_BASE_ADDR + 0x00))
    … …  
    675755
    676756/* Universal Asynchronous Receiver Transmitter 2 (UART2) */
    677 #define UART2_BASE_ADDR         0xE0078000
     757#ifdef ARM_MULTILIB_ARCH_V4
     758  #define UART2_BASE_ADDR               0xE0078000
     759#else
     760  #define UART2_BASE_ADDR               0x40098000
     761#endif
    678762#define U2RBR          (*(volatile uint32_t *) (UART2_BASE_ADDR + 0x00))
    679763#define U2THR          (*(volatile uint32_t *) (UART2_BASE_ADDR + 0x00))
    … …  
    692776
    693777/* Universal Asynchronous Receiver Transmitter 3 (UART3) */
    694 #define UART3_BASE_ADDR         0xE007C000
     778#ifdef ARM_MULTILIB_ARCH_V4
     779  #define UART3_BASE_ADDR               0xE007C000
     780#else
     781  #define UART3_BASE_ADDR               0x4009C000
     782#endif
    695783#define U3RBR          (*(volatile uint32_t *) (UART3_BASE_ADDR + 0x00))
    696784#define U3THR          (*(volatile uint32_t *) (UART3_BASE_ADDR + 0x00))
    … …  
    709797
    710798/* I2C Interface 0 */
    711 #define I2C0_BASE_ADDR          0xE001C000
     799#ifdef ARM_MULTILIB_ARCH_V4
     800  #define I2C0_BASE_ADDR                0xE001C000
     801#else
     802  #define I2C0_BASE_ADDR                0x4001C000
     803#endif
    712804#define I20CONSET      (*(volatile uint32_t *) (I2C0_BASE_ADDR + 0x00))
    713805#define I20STAT        (*(volatile uint32_t *) (I2C0_BASE_ADDR + 0x04))
    … …  
    719811
    720812/* I2C Interface 1 */
    721 #define I2C1_BASE_ADDR          0xE005C000
     813#ifdef ARM_MULTILIB_ARCH_V4
     814  #define I2C1_BASE_ADDR                0xE005C000
     815#else
     816  #define I2C1_BASE_ADDR                0x4005C000
     817#endif
    722818#define I21CONSET      (*(volatile uint32_t *) (I2C1_BASE_ADDR + 0x00))
    723819#define I21STAT        (*(volatile uint32_t *) (I2C1_BASE_ADDR + 0x04))
    … …  
    729825
    730826/* I2C Interface 2 */
    731 #define I2C2_BASE_ADDR          0xE0080000
     827#ifdef ARM_MULTILIB_ARCH_V4
     828  #define I2C2_BASE_ADDR                0xE0080000
     829#else
     830  #define I2C2_BASE_ADDR                0x400a0000
     831#endif
    732832#define I22CONSET      (*(volatile uint32_t *) (I2C2_BASE_ADDR + 0x00))
    733833#define I22STAT        (*(volatile uint32_t *) (I2C2_BASE_ADDR + 0x04))
    … …  
    747847
    748848/* SSP0 Controller */
    749 #define SSP0_BASE_ADDR          0xE0068000
     849#ifdef ARM_MULTILIB_ARCH_V4
     850  #define SSP0_BASE_ADDR                0xE0068000
     851#else
     852  #define SSP0_BASE_ADDR                0x40088000
     853#endif
    750854#define SSP0CR0        (*(volatile uint32_t *) (SSP0_BASE_ADDR + 0x00))
    751855#define SSP0CR1        (*(volatile uint32_t *) (SSP0_BASE_ADDR + 0x04))
    … …  
    760864
    761865/* SSP1 Controller */
    762 #define SSP1_BASE_ADDR          0xE0030000
     866#ifdef ARM_MULTILIB_ARCH_V4
     867  #define SSP1_BASE_ADDR                0xE0030000
     868#else
     869  #define SSP1_BASE_ADDR                0x40030000
     870#endif
    763871#define SSP1CR0        (*(volatile uint32_t *) (SSP1_BASE_ADDR + 0x00))
    764872#define SSP1CR1        (*(volatile uint32_t *) (SSP1_BASE_ADDR + 0x04))
    … …  
    772880#define SSP1DMACR      (*(volatile uint32_t *) (SSP1_BASE_ADDR + 0x24))
    773881
     882#ifdef ARM_MULTILIB_ARCH_V7M
     883
     884/* SSP2 Controller */
     885#define SSP2_BASE_ADDR          0x400ac000
     886#define SSP2CR0        (*(volatile uint32_t *) (SSP2_BASE_ADDR + 0x00))
     887#define SSP2CR1        (*(volatile uint32_t *) (SSP2_BASE_ADDR + 0x04))
     888#define SSP2DR         (*(volatile uint32_t *) (SSP2_BASE_ADDR + 0x08))
     889#define SSP2SR         (*(volatile uint32_t *) (SSP2_BASE_ADDR + 0x0C))
     890#define SSP2CPSR       (*(volatile uint32_t *) (SSP2_BASE_ADDR + 0x10))
     891#define SSP2IMSC       (*(volatile uint32_t *) (SSP2_BASE_ADDR + 0x14))
     892#define SSP2RIS        (*(volatile uint32_t *) (SSP2_BASE_ADDR + 0x18))
     893#define SSP2MIS        (*(volatile uint32_t *) (SSP2_BASE_ADDR + 0x1C))
     894#define SSP2ICR        (*(volatile uint32_t *) (SSP2_BASE_ADDR + 0x20))
     895#define SSP2DMACR      (*(volatile uint32_t *) (SSP2_BASE_ADDR + 0x24))
     896
     897#endif /* ARM_MULTILIB_ARCH_V4 */
    774898
    775899/* Real Time Clock */
    776 #define RTC_BASE_ADDR           0xE0024000
     900#ifdef ARM_MULTILIB_ARCH_V4
     901  #define RTC_BASE_ADDR         0xE0024000
     902#else
     903  #define RTC_BASE_ADDR         0x40024000
     904#endif
    777905#define RTC_ILR         (*(volatile uint32_t *) (RTC_BASE_ADDR + 0x00))
    778906#define RTC_CTC         (*(volatile uint32_t *) (RTC_BASE_ADDR + 0x04))
    … …  
    805933
    806934/* A/D Converter 0 (AD0) */
    807 #define AD0_BASE_ADDR           0xE0034000
     935#ifdef ARM_MULTILIB_ARCH_V4
     936  #define AD0_BASE_ADDR         0xE0034000
     937#else
     938  #define AD0_BASE_ADDR         0x40034000
     939#endif
    808940#define AD0CR          (*(volatile uint32_t *) (AD0_BASE_ADDR + 0x00))
    809941#define AD0GDR         (*(volatile uint32_t *) (AD0_BASE_ADDR + 0x04))
    … …  
    822954
    823955/* D/A Converter */
    824 #define DAC_BASE_ADDR           0xE006C000
     956#ifdef ARM_MULTILIB_ARCH_V4
     957  #define DAC_BASE_ADDR         0xE006C000
     958#else
     959  #define DAC_BASE_ADDR         0x4008C000
     960#endif
    825961#define DACR           (*(volatile uint32_t *) (DAC_BASE_ADDR + 0x00))
    826962
    827963
    828964/* Watchdog */
    829 #define WDG_BASE_ADDR           0xE0000000
     965#ifdef ARM_MULTILIB_ARCH_V4
     966  #define WDG_BASE_ADDR         0xE0000000
     967#else
     968  #define WDG_BASE_ADDR         0x40000000
     969#endif
    830970#define WDMOD          (*(volatile uint32_t *) (WDG_BASE_ADDR + 0x00))
    831971#define WDTC           (*(volatile uint32_t *) (WDG_BASE_ADDR + 0x04))
    … …  
    835975
    836976/* CAN CONTROLLERS AND ACCEPTANCE FILTER */
    837 #define CAN_ACCEPT_BASE_ADDR            0xE003C000
     977#ifdef ARM_MULTILIB_ARCH_V4
     978  #define CAN_ACCEPT_BASE_ADDR          0xE003C000
     979#else
     980  #define CAN_ACCEPT_BASE_ADDR          0x4003C000
     981#endif
    838982#define CAN_AFMR                (*(volatile uint32_t *) (CAN_ACCEPT_BASE_ADDR + 0x00))
    839983#define CAN_SFF_SA              (*(volatile uint32_t *) (CAN_ACCEPT_BASE_ADDR + 0x04))
    … …  
    845989#define CAN_LUT_ERR     (*(volatile uint32_t *) (CAN_ACCEPT_BASE_ADDR + 0x1C))
    846990
    847 #define CAN_CENTRAL_BASE_ADDR           0xE0040000
     991#ifdef ARM_MULTILIB_ARCH_V4
     992  #define CAN_CENTRAL_BASE_ADDR         0xE0040000
     993#else
     994  #define CAN_CENTRAL_BASE_ADDR         0x40040000
     995#endif
    848996#define CAN_TX_SR       (*(volatile uint32_t *) (CAN_CENTRAL_BASE_ADDR + 0x00))
    849997#define CAN_RX_SR       (*(volatile uint32_t *) (CAN_CENTRAL_BASE_ADDR + 0x04))
    850998#define CAN_MSR         (*(volatile uint32_t *) (CAN_CENTRAL_BASE_ADDR + 0x08))
    851999
    852 #define CAN1_BASE_ADDR          0xE0044000
     1000#ifdef ARM_MULTILIB_ARCH_V4
     1001  #define CAN1_BASE_ADDR                0xE0044000
     1002#else
     1003  #define CAN1_BASE_ADDR                0x40044000
     1004#endif
    8531005#define CAN1MOD         (*(volatile uint32_t *) (CAN1_BASE_ADDR + 0x00))
    8541006#define CAN1CMR         (*(volatile uint32_t *) (CAN1_BASE_ADDR + 0x04))
    … …  
    8771029#define CAN1TDB3        (*(volatile uint32_t *) (CAN1_BASE_ADDR + 0x5C))
    8781030
    879 #define CAN2_BASE_ADDR          0xE0048000
     1031#ifdef ARM_MULTILIB_ARCH_V4
     1032  #define CAN2_BASE_ADDR                0xE0048000
     1033#else
     1034  #define CAN2_BASE_ADDR                0x40048000
     1035#endif
    8801036#define CAN2MOD         (*(volatile uint32_t *) (CAN2_BASE_ADDR + 0x00))
    8811037#define CAN2CMR         (*(volatile uint32_t *) (CAN2_BASE_ADDR + 0x04))
    … …  
    9061062
    9071063/* MultiMedia Card Interface(MCI) Controller */
    908 #define MCI_BASE_ADDR           0xE008C000
     1064#ifdef ARM_MULTILIB_ARCH_V4
     1065  #define MCI_BASE_ADDR         0xE008C000
     1066#else
     1067  #define MCI_BASE_ADDR         0x400c0000
     1068#endif
    9091069#define MCI_POWER      (*(volatile uint32_t *) (MCI_BASE_ADDR + 0x00))
    9101070#define MCI_CLOCK      (*(volatile uint32_t *) (MCI_BASE_ADDR + 0x04))
    … …  
    9291089
    9301090/* I2S Interface Controller (I2S) */
    931 #define I2S_BASE_ADDR           0xE0088000
     1091#ifdef ARM_MULTILIB_ARCH_V4
     1092  #define I2S_BASE_ADDR         0xE0088000
     1093#else
     1094  #define I2S_BASE_ADDR         0x400a8000
     1095#endif
    9321096#define I2S_DAO        (*(volatile uint32_t *) (I2S_BASE_ADDR + 0x00))
    9331097#define I2S_DAI        (*(volatile uint32_t *) (I2S_BASE_ADDR + 0x04))
    … …  
    9431107
    9441108/* General-purpose DMA Controller */
    945 #define DMA_BASE_ADDR           0xFFE04000
     1109#ifdef ARM_MULTILIB_ARCH_V4
     1110  #define DMA_BASE_ADDR         0xFFE04000
     1111#else
     1112  #define DMA_BASE_ADDR         0x20080000
     1113#endif
    9461114#define GPDMA_INT_STAT         (*(volatile uint32_t *) (DMA_BASE_ADDR + 0x000))
    9471115#define GPDMA_INT_TCSTAT       (*(volatile uint32_t *) (DMA_BASE_ADDR + 0x004))
    … …  
    9751143#define GPDMA_CH1_CFG      (*(volatile uint32_t *) (DMA_BASE_ADDR + 0x130))
    9761144
    977 
    9781145/* USB Controller */
    979 #define USB_INT_BASE_ADDR       0xE01FC1C0
    980 #define USB_BASE_ADDR           0xFFE0C200              /* USB Base Address */
     1146#ifdef ARM_MULTILIB_ARCH_V4
     1147  #define USB_INT_BASE_ADDR     0xE01FC1C0
     1148  #define USB_BASE_ADDR         0xFFE0C200              /* USB Base Address */
     1149#else
     1150  #define USB_INT_BASE_ADDR     0x400fc1c0
     1151  #define USB_BASE_ADDR         0x2008c200
     1152#endif
    9811153
    9821154#define USB_INT_STAT    (*(volatile uint32_t *) (USB_INT_BASE_ADDR + 0x00))
    … …  
    10321204#define SYS_ERR_INT_SET     (*(volatile uint32_t *) (USB_BASE_ADDR + 0xC0))
    10331205
    1034 
    10351206/* USB Host Controller */
    1036 #define USBHC_BASE_ADDR         0xFFE0C000
     1207#ifdef ARM_MULTILIB_ARCH_V4
     1208  #define USBHC_BASE_ADDR               0xFFE0C000
     1209#else
     1210  #define USBHC_BASE_ADDR               0x2008c000
     1211#endif
    10371212#define HC_REVISION         (*(volatile uint32_t *) (USBHC_BASE_ADDR + 0x00))
    10381213#define HC_CONTROL          (*(volatile uint32_t *) (USBHC_BASE_ADDR + 0x04))
    … …  
    10601235
    10611236/* USB OTG Controller */
    1062 #define USBOTG_BASE_ADDR        0xFFE0C100
     1237#ifdef ARM_MULTILIB_ARCH_V4
     1238  #define USBOTG_BASE_ADDR      0xFFE0C100
     1239#else
     1240  #define USBOTG_BASE_ADDR      0x2008c100
     1241#endif
    10631242#define OTG_INT_STAT        (*(volatile uint32_t *) (USBOTG_BASE_ADDR + 0x00))
    10641243#define OTG_INT_EN          (*(volatile uint32_t *) (USBOTG_BASE_ADDR + 0x04))
    … …  
    10681247#define OTG_TIMER           (*(volatile uint32_t *) (USBOTG_BASE_ADDR + 0x14))
    10691248
    1070 #define USBOTG_I2C_BASE_ADDR    0xFFE0C300
     1249#ifdef ARM_MULTILIB_ARCH_V4
     1250  #define USBOTG_I2C_BASE_ADDR  0xFFE0C300
     1251#else
     1252  #define USBOTG_I2C_BASE_ADDR  0x2008c300
     1253#endif
    10711254#define OTG_I2C_RX          (*(volatile uint32_t *) (USBOTG_I2C_BASE_ADDR + 0x00))
    10721255#define OTG_I2C_TX          (*(volatile uint32_t *) (USBOTG_I2C_BASE_ADDR + 0x00))
    … …  
    10761259#define OTG_I2C_CLKLO       (*(volatile uint32_t *) (USBOTG_I2C_BASE_ADDR + 0x10))
    10771260
    1078 #define USBOTG_CLK_BASE_ADDR    0xFFE0CFF0
     1261#ifdef ARM_MULTILIB_ARCH_V4
     1262  #define USBOTG_CLK_BASE_ADDR  0xFFE0CFF0
     1263#else
     1264  #define USBOTG_CLK_BASE_ADDR  0x2008cff0
     1265#endif
    10791266#define OTG_CLK_CTRL        (*(volatile uint32_t *) (USBOTG_CLK_BASE_ADDR + 0x04))
    10801267#define OTG_CLK_STAT        (*(volatile uint32_t *) (USBOTG_CLK_BASE_ADDR + 0x08))
    10811268
    1082 
    10831269/* Ethernet MAC (32 bit data bus) -- all registers are RW unless indicated in parentheses */
    1084 #define MAC_BASE_ADDR           0xFFE00000 /* AHB Peripheral # 0 */
     1270#ifdef ARM_MULTILIB_ARCH_V4
     1271  #define MAC_BASE_ADDR         0xFFE00000 /* AHB Peripheral # 0 */
     1272#else
     1273  #define MAC_BASE_ADDR         0x20084000
     1274#endif
    10851275#define MAC_MAC1            (*(volatile uint32_t *) (MAC_BASE_ADDR + 0x000)) /* MAC config reg 1 */
    10861276#define MAC_MAC2            (*(volatile uint32_t *) (MAC_BASE_ADDR + 0x004)) /* MAC config reg 2 */
    … …  
    11391329/* LCD Controller */
    11401330
    1141 #define LCD_BASE_ADDR 0xFFE10000
     1331#ifdef ARM_MULTILIB_ARCH_V4
     1332  #define LCD_BASE_ADDR 0xFFE10000
     1333#else
     1334  #define LCD_BASE_ADDR 0x20088000
     1335#endif
    11421336#define LCD_CFG       (*(volatile uint32_t *) 0xE01FC1B8)
    11431337#define LCD_TIMH      (*(volatile uint32_t *) (LCD_BASE_ADDR + 0x000))
    … …  
    19382132/* IO */
    19392133
     2134#ifdef ARM_MULTILIB_ARCH_V4
     2135  #define LPC24XX_PINSEL ((volatile uint32_t *) &PINSEL0)
     2136  #define LPC24XX_PINMODE ((volatile uint32_t *) &PINMODE0)
     2137#else
     2138  #define IOCON_FUNC(val) BSP_FLD32(val, 0, 2)
     2139  #define IOCON_FUNC_GET(reg) BSP_FLD32GET(reg, 0, 2)
     2140  #define IOCON_FUNC_SET(reg, val) BSP_FLD32SET(reg, val, 0, 2)
     2141  #define IOCON_MODE(val) BSP_FLD32(val, 3, 4)
     2142  #define IOCON_MODE_GET(reg) BSP_FLD32GET(reg, 3, 4)
     2143  #define IOCON_MODE_SET(reg, val) BSP_FLD32SET(reg, val, 3, 4)
     2144  #define IOCON_HYS BSP_BIT32(5)
     2145  #define IOCON_INV BSP_BIT32(6)
     2146  #define IOCON_ADMODE BSP_BIT32(7)
     2147  #define IOCON_FILTER BSP_BIT32(8)
     2148  #define IOCON_HS BSP_BIT32(8)
     2149  #define IOCON_SLEW BSP_BIT32(9)
     2150  #define IOCON_HIDRIVE BSP_BIT32(9)
     2151  #define IOCON_OD BSP_BIT32(10)
     2152  #define IOCON_DACEN BSP_BIT32(16)
     2153  #define LPC17XX_IOCON ((volatile uint32_t *) PINSEL_BASE_ADDR)
     2154#endif
     2155
    19402156typedef struct {
    19412157  uint32_t dir;
    … …  
    19472163} lpc24xx_fio;
    19482164
    1949 #define LPC24XX_PINSEL ((volatile uint32_t *) &PINSEL0)
    1950 
    1951 #define LPC24XX_PINMODE ((volatile uint32_t *) &PINMODE0)
    1952 
    19532165#define LPC24XX_FIO ((volatile lpc24xx_fio *) FIO_BASE_ADDR)
     2166
     2167#ifdef ARM_MULTILIB_ARCH_V4
    19542168
    19552169/* PCONP */
    … …  
    19582172#define PCONP_ETHERNET (1U << 30)
    19592173#define PCONP_USB (1U << 31)
     2174
     2175#endif /* ARM_MULTILIB_ARCH_V4 */
    19602176
    19612177/* I2S */

  • c/src/lib/libbsp/arm/lpc24xx/include/start-config.h

    r4c622e5 r4a6cc2a  
    2727
    2828#include <bsp.h>
     29#include <bsp/io.h>
    2930#include <bsp/start.h>
    3031#include <bsp/lpc-emc.h>
    … …  
    4849  uint32_t trrd;
    4950  uint32_t tmrd;
     51  uint32_t emcdlyctl;
    5052} lpc24xx_emc_dynamic_config;
    5153
    … …  
    7173} lpc24xx_emc_static_chip_config;
    7274
    73 extern const BSP_START_DATA_SECTION uint32_t
    74   lpc24xx_start_config_pinsel_5_9 [];
     75extern BSP_START_DATA_SECTION const lpc24xx_pin_range
     76  lpc24xx_start_config_pinsel [];
    7577
    76 extern const BSP_START_DATA_SECTION size_t
    77   lpc24xx_start_config_pinsel_5_9_size;
    78 
    79 extern const BSP_START_DATA_SECTION lpc24xx_emc_dynamic_config
     78extern BSP_START_DATA_SECTION const lpc24xx_emc_dynamic_config
    8079  lpc24xx_start_config_emc_dynamic [];
    8180
    82 extern const BSP_START_DATA_SECTION lpc24xx_emc_dynamic_chip_config
     81extern BSP_START_DATA_SECTION const lpc24xx_emc_dynamic_chip_config
    8382  lpc24xx_start_config_emc_dynamic_chip [];
    8483
    85 extern const BSP_START_DATA_SECTION size_t
     84extern BSP_START_DATA_SECTION const size_t
    8685  lpc24xx_start_config_emc_dynamic_chip_count;
    8786
    88 extern const BSP_START_DATA_SECTION lpc24xx_emc_static_chip_config
     87extern BSP_START_DATA_SECTION const lpc24xx_emc_static_chip_config
    8988  lpc24xx_start_config_emc_static_chip [];
    9089
    91 extern const BSP_START_DATA_SECTION size_t
     90extern BSP_START_DATA_SECTION const size_t
    9291  lpc24xx_start_config_emc_static_chip_count;
    9392

  • c/src/lib/libbsp/arm/lpc24xx/irq/irq-dispatch.c

    r4c622e5 r4a6cc2a  
    2121 */
    2222
     23#include <rtems/score/armv7m.h>
     24
    2325#include <bsp.h>
     26#include <bsp/irq.h>
    2427#include <bsp/irq-generic.h>
    2528#include <bsp/lpc24xx.h>
    … …  
    2730void bsp_interrupt_dispatch(void)
    2831{
    29   /* Read current vector number */
    30   rtems_vector_number vector = VICVectAddr;
     32  #ifdef ARM_MULTILIB_ARCH_V4
     33    /* Read current vector number */
     34    rtems_vector_number vector = VICVectAddr;
    3135
    32   /* Enable interrupts in program status register */
    33   uint32_t psr = arm_status_irq_enable();
     36    /* Enable interrupts in program status register */
     37    uint32_t psr = arm_status_irq_enable();
    3438
    35   /* Dispatch interrupt handlers */
    36   bsp_interrupt_handler_dispatch(vector);
     39    /* Dispatch interrupt handlers */
     40    bsp_interrupt_handler_dispatch(vector);
    3741
    38   /* Restore program status register */
    39   arm_status_restore(psr);
     42    /* Restore program status register */
     43    arm_status_restore(psr);
    4044
    41   /* Acknowledge interrupt */
    42   VICVectAddr = 0;
     45    /* Acknowledge interrupt */
     46    VICVectAddr = 0;
     47  #endif
    4348}

  • c/src/lib/libbsp/arm/lpc24xx/irq/irq.c

    r4c622e5 r4a6cc2a  
    2121 */
    2222
     23#include <rtems/score/armv7m.h>
     24
    2325#include <bsp.h>
    2426#include <bsp/irq.h>
    2527#include <bsp/irq-generic.h>
    2628#include <bsp/lpc24xx.h>
     29#include <bsp/linker-symbols.h>
    2730
    2831static inline bool lpc24xx_irq_is_valid(rtems_vector_number vector)
    … …  
    3841    }
    3942
    40     VICVectPriorityBase [vector] = priority;
     43    #ifdef ARM_MULTILIB_ARCH_V4
     44      VICVectPriorityBase [vector] = priority;
     45    #endif
    4146  }
    4247}
    … …  
    4550{
    4651  if (lpc24xx_irq_is_valid(vector)) {
    47     return VICVectPriorityBase [vector];
     52    #ifdef ARM_MULTILIB_ARCH_V4
     53      return VICVectPriorityBase [vector];
     54    #endif
    4855  } else {
    4956    return LPC24XX_IRQ_PRIORITY_VALUE_MIN - 1U;
    … …  
    5360rtems_status_code bsp_interrupt_vector_enable(rtems_vector_number vector)
    5461{
    55   VICIntEnable = 1U << vector;
     62  #ifdef ARM_MULTILIB_ARCH_V4
     63    VICIntEnable = 1U << vector;
     64  #endif
    5665
    5766  return RTEMS_SUCCESSFUL;
    … …  
    6069rtems_status_code bsp_interrupt_vector_disable(rtems_vector_number vector)
    6170{
    62   VICIntEnClear = 1U << vector;
     71  #ifdef ARM_MULTILIB_ARCH_V4
     72    VICIntEnClear = 1U << vector;
     73  #endif
    6374
    6475  return RTEMS_SUCCESSFUL;
    … …  
    6778rtems_status_code bsp_interrupt_facility_initialize(void)
    6879{
    69   volatile uint32_t *addr = VICVectAddrBase;
    70   volatile uint32_t *prio = VICVectPriorityBase;
    71   rtems_vector_number i = 0;
     80  #ifdef ARM_MULTILIB_ARCH_V4
     81    volatile uint32_t *addr = VICVectAddrBase;
     82    volatile uint32_t *prio = VICVectPriorityBase;
     83    rtems_vector_number i = 0;
    7284
    73   /* Disable all interrupts */
    74   VICIntEnClear = 0xffffffff;
     85    /* Disable all interrupts */
     86    VICIntEnClear = 0xffffffff;
    7587
    76   /* Clear all software interrupts */
    77   VICSoftIntClear = 0xffffffff;
     88    /* Clear all software interrupts */
     89    VICSoftIntClear = 0xffffffff;
    7890
    79   /* Use IRQ category */
    80   VICIntSelect = 0;
     91    /* Use IRQ category */
     92    VICIntSelect = 0;
    8193
    82   for (i = BSP_INTERRUPT_VECTOR_MIN; i <= BSP_INTERRUPT_VECTOR_MAX; ++i) {
    83     /* Use the vector address register to store the vector number */
    84     addr [i] = i;
     94    for (i = BSP_INTERRUPT_VECTOR_MIN; i <= BSP_INTERRUPT_VECTOR_MAX; ++i) {
     95      /* Use the vector address register to store the vector number */
     96      addr [i] = i;
    8597
    86     /* Give vector lowest priority */
    87     prio [i] = 15;
    88   }
     98      /* Give vector lowest priority */
     99      prio [i] = 15;
     100    }
    89101
    90   /* Reset priority mask register */
    91   VICSWPrioMask = 0xffff;
     102    /* Reset priority mask register */
     103    VICSWPrioMask = 0xffff;
    92104
    93   /* Acknowledge interrupts for all priorities */
    94   for (i = LPC24XX_IRQ_PRIORITY_VALUE_MIN; i <= LPC24XX_IRQ_PRIORITY_VALUE_MAX; ++i) {
    95     VICVectAddr = 0;
    96   }
     105    /* Acknowledge interrupts for all priorities */
     106    for (
     107      i = LPC24XX_IRQ_PRIORITY_VALUE_MIN;
     108      i <= LPC24XX_IRQ_PRIORITY_VALUE_MAX;
     109      ++i
     110    ) {
     111      VICVectAddr = 0;
     112    }
    97113
    98   /* Install the IRQ exception handler */
    99   _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, arm_exc_interrupt, NULL);
     114    /* Install the IRQ exception handler */
     115    _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, arm_exc_interrupt, NULL);
     116  #endif
    100117
    101118  return RTEMS_SUCCESSFUL;

  • c/src/lib/libbsp/arm/lpc24xx/misc/bspidle.c

    r4c622e5 r4a6cc2a  
    11/**
    22 * @file
    3  *
    4  * @author Sebastian Huber <sebastian.huber@embedded-brains.de>
    53 *
    64 * @ingroup lpc24xx
    … …  
    108
    119/*
    12  * Copyright (c) 2008
    13  * Embedded Brains GmbH
    14  * Obere Lagerstr. 30
    15  * D-82178 Puchheim
    16  * Germany
    17  * rtems@embedded-brains.de
     10 * Copyright (c) 2008-2011 embedded brains GmbH.  All rights reserved.
     11 *
     12 *  embedded brains GmbH
     13 *  Obere Lagerstr. 30
     14 *  82178 Puchheim
     15 *  Germany
     16 *  <rtems@embedded-brains.de>
    1817 *
    1918 * The license and distribution terms for this file may be
    … …  
    2827{
    2928  while (true) {
    30     /*
    31      * Set power mode to idle.  Causes the processor clock to be stopped, while
    32      * on-chip peripherals remain active.  Any enabled interrupt from a
    33      * peripheral or an external interrupt source will cause the processor to
    34      * resume execution.
    35      */
    36     PCON = 0x1;
     29    #ifdef ARM_MULTILIB_ARCH_V4
     30      /*
     31       * Set power mode to idle.  Causes the processor clock to be stopped,
     32       * while on-chip peripherals remain active.  Any enabled interrupt from a
     33       * peripheral or an external interrupt source will cause the processor to
     34       * resume execution.
     35       */
     36      PCON = 0x1;
     37    #endif
    3738  }
    3839}

  • c/src/lib/libbsp/arm/lpc24xx/misc/io.c

    r4c622e5 r4a6cc2a  
    2121 */
    2222
     23#include <bsp.h>
    2324#include <bsp/io.h>
     25#include <bsp/start.h>
    2426#include <bsp/system-clocks.h>
    2527
    26 #define LPC24XX_PIN_SELECT(pin) (pin >> 4U)
    27 
    28 #define LPC24XX_PIN_SELECT_SHIFT(pin) ((pin & 0xfU) << 1U)
     28#define LPC24XX_PIN_SELECT(index) ((index) >> 4U)
     29
     30#define LPC24XX_PIN_SELECT_SHIFT(index) (((index) & 0xfU) << 1U)
    2931
    3032#define LPC24XX_PIN_SELECT_MASK 0x3U
    3133
    3234rtems_status_code lpc24xx_gpio_config(
    33   unsigned pin,
     35  unsigned index,
    3436  lpc24xx_gpio_settings settings
    3537)
    3638{
    37   if (pin <= LPC24XX_IO_INDEX_MAX) {
     39  if (index <= LPC24XX_IO_INDEX_MAX) {
    3840    rtems_interrupt_level level;
    39     unsigned port = LPC24XX_IO_PORT(pin);
    40     unsigned bit = LPC24XX_IO_PORT_BIT(pin);
    41     unsigned select = LPC24XX_PIN_SELECT(pin);
    42     unsigned shift = LPC24XX_PIN_SELECT_SHIFT(pin);
    43     unsigned resistor = settings & LPC24XX_GPIO_RESISTOR_MASK;
    44     unsigned output = (settings & LPC24XX_GPIO_OUTPUT) != 0 ? 1U : 0U;
    45 
    46     /* Get resistor flags */
    47     switch (resistor) {
    48       case LPC24XX_GPIO_RESISTOR_PULL_UP:
    49       case LPC24XX_GPIO_RESISTOR_DEFAULT:
    50         resistor = 0x0U;
    51         break;
    52       case LPC24XX_GPIO_RESISTOR_NONE:
    53         resistor = 0x2U;
    54         break;
    55       case LPC24XX_GPIO_RESISTOR_PULL_DOWN:
    56         resistor = 0x3U;
    57         break;
    58       default:
    59         return RTEMS_INVALID_NUMBER;
    60     }
     41    uint32_t port = LPC24XX_IO_PORT(index);
     42    uint32_t port_bit = LPC24XX_IO_PORT_BIT(index);
     43    uint32_t output = (settings & LPC24XX_GPIO_OUTPUT) != 0 ? 1U : 0U;
     44    uint32_t resistor = settings & 0x3U;
     45    #ifdef ARM_MULTILIB_ARCH_V4
     46      uint32_t select = LPC24XX_PIN_SELECT(index);
     47      uint32_t shift = LPC24XX_PIN_SELECT_SHIFT(index);
     48
     49      /* Get resistor flags */
     50      switch (resistor) {
     51        case LPC24XX_GPIO_RESISTOR_PULL_UP:
     52          resistor = 0x0U;
     53          break;
     54        case LPC24XX_GPIO_RESISTOR_NONE:
     55          resistor = 0x2U;
     56          break;
     57        case LPC24XX_GPIO_RESISTOR_PULL_DOWN:
     58          resistor = 0x3U;
     59          break;
     60        default:
     61          return RTEMS_INVALID_NUMBER;
     62      }
     63    #endif
    6164
    6265    rtems_interrupt_disable(level);
    6366
    64     /* Resistor */
    65     LPC24XX_PINMODE [select] =
    66       (LPC24XX_PINMODE [select] & ~(LPC24XX_PIN_SELECT_MASK << shift))
    67         | ((resistor & LPC24XX_PIN_SELECT_MASK) << shift);
     67    #ifdef ARM_MULTILIB_ARCH_V4
     68      /* Resistor */
     69      LPC24XX_PINMODE [select] =
     70        (LPC24XX_PINMODE [select] & ~(LPC24XX_PIN_SELECT_MASK << shift))
     71          | ((resistor & LPC24XX_PIN_SELECT_MASK) << shift);
     72    #endif
    6873
    6974    rtems_interrupt_flash(level);
    … …  
    7176    /* Input or output */
    7277    LPC24XX_FIO [port].dir =
    73       (LPC24XX_FIO [port].dir & ~(1U << bit)) | (output << bit);
     78      (LPC24XX_FIO [port].dir & ~(1U << port_bit)) | (output << port_bit);
    7479
    7580    rtems_interrupt_enable(level);
    … …  
    95100
    96101static const lpc24xx_module_entry lpc24xx_module_table [] = {
    97   LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_ACF, 0, 1, 15),
     102  #ifdef ARM_MULTILIB_ARCH_V4
     103    LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_ACF, 0, 1, 15),
     104  #endif
    98105  LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_ADC, 1, 1, 12),
    99   LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_BAT_RAM, 0, 1, 16),
     106  #ifdef ARM_MULTILIB_ARCH_V4
     107    LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_BAT_RAM, 0, 1, 16),
     108  #endif
    100109  LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_CAN_0, 1, 1, 13),
    101110  LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_CAN_1, 1, 1, 14),
    … …  
    104113  LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_ETHERNET, 1, 0, 30),
    105114  LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_GPDMA, 1, 1, 29),
    106   LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_GPIO, 0, 1, 17),
     115  #ifdef ARM_MULTILIB_ARCH_V4
     116    LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_GPIO, 0, 1, 17),
     117  #else
     118    LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_GPIO, 0, 1, 15),
     119  #endif
    107120  LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_I2C_0, 1, 1, 7),
    108121  LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_I2C_1, 1, 1, 19),
    109122  LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_I2C_2, 1, 1, 26),
    110123  LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_I2S, 1, 1, 27),
    111   LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_LCD, 1, 0, 20),
     124  #ifdef ARM_MULTILIB_ARCH_V4
     125    LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_LCD, 1, 0, 20),
     126  #else
     127    LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_LCD, 1, 0, 0),
     128  #endif
    112129  LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_MCI, 1, 1, 28),
    113130  LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_PCB, 0, 1, 18),
    … …  
    115132  LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_PWM_1, 1, 1, 6),
    116133  LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_RTC, 1, 1, 9),
    117   LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_SPI, 1, 1, 8),
     134  #ifdef ARM_MULTILIB_ARCH_V4
     135    LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_SPI, 1, 1, 8),
     136  #endif
    118137  LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_SSP_0, 1, 1, 21),
    119138  LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_SSP_1, 1, 1, 10),
    … …  
    127146  LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_UART_2, 1, 1, 24),
    128147  LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_UART_3, 1, 1, 25),
    129   LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_USB, 1, 0, 31),
    130   LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_WDT, 0, 1, 0)
     148  #ifdef ARM_MULTILIB_ARCH_V4
     149    LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_WDT, 0, 1, 0),
     150  #endif
     151  LPC24XX_MODULE_ENTRY(LPC24XX_MODULE_USB, 1, 0, 31)
    131152};
    132153
    … …  
    146167  }
    147168
    148   if ((clock & ~LPC24XX_MODULE_CLOCK_MASK) != 0U) {
    149     return RTEMS_INVALID_NUMBER;
    150   }
     169  #ifdef ARM_MULTILIB_ARCH_V4
     170    if (clock == LPC24XX_MODULE_PCLK_DEFAULT) {
     171      #if LPC24XX_PCLKDIV == 1U
     172        clock = LPC24XX_MODULE_CCLK;
     173      #elif LPC24XX_PCLKDIV == 2U
     174        clock = LPC24XX_MODULE_CCLK_2;
     175      #elif LPC24XX_PCLKDIV == 4U
     176        clock = LPC24XX_MODULE_CCLK_4;
     177      #elif LPC24XX_PCLKDIV == 8U
     178        clock = LPC24XX_MODULE_CCLK_8;
     179      #endif
     180    }
     181
     182    if ((clock & ~LPC24XX_MODULE_CLOCK_MASK) != 0U) {
     183      return RTEMS_INVALID_CLOCK;
     184    }
     185  #endif
    151186
    152187  has_power = lpc24xx_module_table [module].power;
    … …  
    158193    if (has_power) {
    159194      rtems_interrupt_disable(level);
    160       PCONP |= 1U << index;
     195      #ifdef ARM_MULTILIB_ARCH_V4
     196        PCONP |= 1U << index;
     197      #endif
    161198      rtems_interrupt_enable(level);
    162199    }
    … …  
    164201    if (module != LPC24XX_MODULE_USB) {
    165202      if (has_clock) {
    166         unsigned clock_shift = 2U * index;
    167 
    168         rtems_interrupt_disable(level);
    169         if (clock_shift < 32U) {
    170           PCLKSEL0 = (PCLKSEL0 & ~(LPC24XX_MODULE_CLOCK_MASK << clock_shift))
    171               | (clock << clock_shift);
    172         } else {
    173           clock_shift -= 32U;
    174           PCLKSEL1 = (PCLKSEL1 & ~(LPC24XX_MODULE_CLOCK_MASK << clock_shift))
    175               | (clock << clock_shift);
    176         }
    177         rtems_interrupt_enable(level);
     203        #ifdef ARM_MULTILIB_ARCH_V4
     204          unsigned clock_shift = 2U * index;
     205
     206          rtems_interrupt_disable(level);
     207          if (clock_shift < 32U) {
     208            PCLKSEL0 = (PCLKSEL0 & ~(LPC24XX_MODULE_CLOCK_MASK << clock_shift))
     209                | (clock << clock_shift);
     210          } else {
     211            clock_shift -= 32U;
     212            PCLKSEL1 = (PCLKSEL1 & ~(LPC24XX_MODULE_CLOCK_MASK << clock_shift))
     213                | (clock << clock_shift);
     214          }
     215          rtems_interrupt_enable(level);
     216        #endif
    178217      }
    179218    } else {
    180       unsigned pllclk = lpc24xx_pllclk();
    181       unsigned usbsel = pllclk / 48000000U - 1U;
    182 
    183       if (usbsel > 15U || (usbsel % 2U != 1U) || (pllclk % 48000000U) != 0U) {
    184         return RTEMS_INCORRECT_STATE;
    185       }
    186 
    187       USBCLKCFG = usbsel;
     219      #ifdef ARM_MULTILIB_ARCH_V4
     220        unsigned pllclk = lpc24xx_pllclk();
     221        unsigned usbsel = pllclk / 48000000U - 1U;
     222
     223        if (
     224          usbsel > 15U
     225            || (usbsel % 2U != 1U)
     226            || (pllclk % 48000000U) != 0U
     227        ) {
     228          return RTEMS_INCORRECT_STATE;
     229        }
     230
     231        USBCLKCFG = usbsel;
     232      #endif
    188233    }
    189234  } else {
    190235    if (has_power) {
    191236      rtems_interrupt_disable(level);
    192       PCONP &= ~(1U << index);
     237      #ifdef ARM_MULTILIB_ARCH_V4
     238        PCONP &= ~(1U << index);
     239      #endif
    193240      rtems_interrupt_enable(level);
    194241    }
    … …  
    214261
    215262typedef rtems_status_code (*lpc24xx_pin_visitor)(
    216   volatile uint32_t *pinsel,
    217   uint32_t pinsel_mask,
    218   uint32_t pinsel_value,
     263  #ifdef ARM_MULTILIB_ARCH_V4
     264    volatile uint32_t *pinsel,
     265    uint32_t pinsel_mask,
     266    uint32_t pinsel_value,
     267  #endif
    219268  volatile uint32_t *fio_dir,
    220269  uint32_t fio_bit
    221270);
    222271
    223 static rtems_status_code lpc24xx_pin_set_function(
    224   volatile uint32_t *pinsel,
    225   uint32_t pinsel_mask,
    226   uint32_t pinsel_value,
     272static BSP_START_TEXT_SECTION __attribute__((flatten)) rtems_status_code
     273lpc24xx_pin_set_function(
     274  #ifdef ARM_MULTILIB_ARCH_V4
     275    volatile uint32_t *pinsel,
     276    uint32_t pinsel_mask,
     277    uint32_t pinsel_value,
     278  #endif
    227279  volatile uint32_t *fio_dir,
    228280  uint32_t fio_bit
    229281)
    230282{
    231   rtems_interrupt_level level;
    232 
    233   rtems_interrupt_disable(level);
    234   *pinsel = (*pinsel & ~pinsel_mask) | pinsel_value;
    235   rtems_interrupt_enable(level);
     283  #ifdef ARM_MULTILIB_ARCH_V4
     284    rtems_interrupt_level level;
     285
     286    rtems_interrupt_disable(level);
     287    *pinsel = (*pinsel & ~pinsel_mask) | pinsel_value;
     288    rtems_interrupt_enable(level);
     289  #endif
    236290
    237291  return RTEMS_SUCCESSFUL;
    238292}
    239293
    240 static rtems_status_code lpc24xx_pin_check_function(
    241   volatile uint32_t *pinsel,
    242   uint32_t pinsel_mask,
    243   uint32_t pinsel_value,
     294static BSP_START_TEXT_SECTION rtems_status_code lpc24xx_pin_check_function(
     295  #ifdef ARM_MULTILIB_ARCH_V4
     296    volatile uint32_t *pinsel,
     297    uint32_t pinsel_mask,
     298    uint32_t pinsel_value,
     299  #endif
    244300  volatile uint32_t *fio_dir,
    245301  uint32_t fio_bit
    246302)
    247303{
    248   if ((*pinsel & pinsel_mask) == pinsel_value) {
    249     return RTEMS_SUCCESSFUL;
    250   } else {
    251     return RTEMS_IO_ERROR;
    252   }
    253 }
    254 
    255 static rtems_status_code lpc24xx_pin_set_input(
    256   volatile uint32_t *pinsel,
    257   uint32_t pinsel_mask,
    258   uint32_t pinsel_value,
     304  #ifdef ARM_MULTILIB_ARCH_V4
     305    if ((*pinsel & pinsel_mask) == pinsel_value) {
     306      return RTEMS_SUCCESSFUL;
     307    } else {
     308      return RTEMS_IO_ERROR;
     309    }
     310  #endif
     311}
     312
     313static BSP_START_TEXT_SECTION __attribute__((flatten)) rtems_status_code
     314lpc24xx_pin_set_input(
     315  #ifdef ARM_MULTILIB_ARCH_V4
     316    volatile uint32_t *pinsel,
     317    uint32_t pinsel_mask,
     318    uint32_t pinsel_value,
     319  #endif
    259320  volatile uint32_t *fio_dir,
    260321  uint32_t fio_bit
    … …  
    265326  rtems_interrupt_disable(level);
    266327  *fio_dir &= ~fio_bit;
    267   *pinsel &= ~pinsel_mask;
     328  #ifdef ARM_MULTILIB_ARCH_V4
     329    *pinsel &= ~pinsel_mask;
     330  #endif
    268331  rtems_interrupt_enable(level);
    269332
    … …  
    271334}
    272335
    273 static rtems_status_code lpc24xx_pin_check_input(
    274   volatile uint32_t *pinsel,
    275   uint32_t pinsel_mask,
    276   uint32_t pinsel_value,
     336static BSP_START_TEXT_SECTION rtems_status_code lpc24xx_pin_check_input(
     337  #ifdef ARM_MULTILIB_ARCH_V4
     338    volatile uint32_t *pinsel,
     339    uint32_t pinsel_mask,
     340    uint32_t pinsel_value,
     341  #endif
    277342  volatile uint32_t *fio_dir,
    278343  uint32_t fio_bit
    279344)
    280345{
    281   if ((*pinsel & pinsel_mask) == 0 && (*fio_dir & fio_bit) == 0) {
    282     return RTEMS_SUCCESSFUL;
    283   } else {
    284     return RTEMS_IO_ERROR;
    285   }
    286 }
    287 
    288 static const lpc24xx_pin_visitor lpc24xx_pin_visitors [] = {
     346  rtems_status_code sc = RTEMS_IO_ERROR;
     347  bool is_input = (*fio_dir & fio_bit) == 0;
     348
     349  if (is_input) {
     350    #ifdef ARM_MULTILIB_ARCH_V4
     351      bool is_gpio = (*pinsel & pinsel_mask) == 0;
     352    #endif
     353
     354    if (is_gpio) {
     355      sc = RTEMS_SUCCESSFUL;
     356    }
     357  }
     358
     359  return sc;
     360}
     361
     362static BSP_START_DATA_SECTION const lpc24xx_pin_visitor
     363  lpc24xx_pin_visitors [] = {
    289364  [LPC24XX_PIN_SET_FUNCTION] = lpc24xx_pin_set_function,
    290365  [LPC24XX_PIN_CHECK_FUNCTION] = lpc24xx_pin_check_function,
    … …  
    293368};
    294369
    295 rtems_status_code lpc24xx_pin_config(
     370BSP_START_TEXT_SECTION rtems_status_code lpc24xx_pin_config(
    296371  const lpc24xx_pin_range *pins,
    297372  lpc24xx_pin_action action
    … …  
    303378    lpc24xx_pin_visitor visitor = lpc24xx_pin_visitors [action];
    304379    lpc24xx_pin_range terminal = LPC24XX_PIN_TERMINAL;
    305 
    306     while (sc == RTEMS_SUCCESSFUL && pins->value != terminal.value) {
    307       uint32_t port = pins->fields.port;
    308       uint32_t index = pins->fields.index_begin;
    309       uint32_t last = pins->fields.index_last;
    310       uint32_t function = pins->fields.function;
     380    lpc24xx_pin_range pin_range = *pins;
     381    uint32_t previous_port_bit = pin_range.fields.port_bit;
     382
     383    while (sc == RTEMS_SUCCESSFUL && pin_range.value != terminal.value) {
     384      uint32_t port = pin_range.fields.port;
     385      uint32_t port_bit = pin_range.fields.port_bit;
     386      uint32_t port_bit_last = port_bit;
     387      uint32_t range = pin_range.fields.range;
     388      #ifdef ARM_MULTILIB_ARCH_V4
     389        uint32_t function = pin_range.fields.function;
     390      #endif
    311391      volatile uint32_t *fio_dir = &LPC24XX_FIO [port].dir;
    312392
    313       while (sc == RTEMS_SUCCESSFUL && index <= last) {
    314         uint32_t pin = LPC24XX_IO_INDEX_BY_PORT(port, index);
    315         uint32_t select = LPC24XX_PIN_SELECT(pin);
    316         uint32_t shift = LPC24XX_PIN_SELECT_SHIFT(pin);
    317         volatile uint32_t *pinsel = &LPC24XX_PINSEL [select];
    318         uint32_t pinsel_mask = LPC24XX_PIN_SELECT_MASK << shift;
    319         uint32_t pinsel_value = (function & LPC24XX_PIN_SELECT_MASK) << shift;
    320         uint32_t fio_bit = 1U << index;
    321 
    322         sc = (*visitor)(pinsel, pinsel_mask, pinsel_value, fio_dir, fio_bit);
    323 
    324         ++index;
     393      if (range) {
     394        port_bit = previous_port_bit;
    325395      }
    326396
     397      while (sc == RTEMS_SUCCESSFUL && port_bit <= port_bit_last) {
     398        uint32_t index = LPC24XX_IO_INDEX_BY_PORT(port, port_bit);
     399        uint32_t fio_bit = 1U << port_bit;
     400        #ifdef ARM_MULTILIB_ARCH_V4
     401          uint32_t select = LPC24XX_PIN_SELECT(index);
     402          uint32_t shift = LPC24XX_PIN_SELECT_SHIFT(index);
     403          volatile uint32_t *pinsel = &LPC24XX_PINSEL [select];
     404          uint32_t pinsel_mask = LPC24XX_PIN_SELECT_MASK << shift;
     405          uint32_t pinsel_value = (function & LPC24XX_PIN_SELECT_MASK) << shift;
     406
     407          sc = (*visitor)(pinsel, pinsel_mask, pinsel_value, fio_dir, fio_bit);
     408        #endif
     409
     410        ++port_bit;
     411      }
     412
    327413      ++pins;
     414      previous_port_bit = port_bit;
     415      pin_range = *pins;
    328416    }
    329417  } else {

  • c/src/lib/libbsp/arm/lpc24xx/misc/lcd.c

    r4c622e5 r4a6cc2a  
    2525#include <bsp/lpc24xx.h>
    2626#include <bsp/lcd.h>
     27#include <bsp/lpc-lcd.h>
    2728#include <bsp/utility.h>
    2829#include <bsp/system-clocks.h>
    2930
    30 #define LCD_ENABLE BSP_BIT32(0)
     31#ifdef ARM_MULTILIB_ARCH_V4
     32  #define LCD_ENABLE BSP_BIT32(0)
     33#endif
    3134
    3235rtems_status_code lpc24xx_lcd_set_mode(
    … …  
    6265      assert(sc == RTEMS_SUCCESSFUL);
    6366
    64       PINSEL11 = BSP_FLD32(mode, 1, 3) | LCD_ENABLE;
     67      #ifdef ARM_MULTILIB_ARCH_V4
     68        PINSEL11 = BSP_FLD32(mode, 1, 3) | LCD_ENABLE;
     69      #endif
    6570
    6671      sc = lpc24xx_pin_config(pins, LPC24XX_PIN_SET_FUNCTION);
    … …  
    8489      assert(sc == RTEMS_SUCCESSFUL);
    8590
    86       PINSEL11 = 0;
     91      #ifdef ARM_MULTILIB_ARCH_V4
     92        PINSEL11 = 0;
     93      #endif
    8794
    8895      sc = lpc24xx_module_disable(LPC24XX_MODULE_LCD);
    … …  
    96103lpc24xx_lcd_mode lpc24xx_lcd_current_mode(void)
    97104{
    98   uint32_t pinsel11 = PINSEL11;
     105  #ifdef ARM_MULTILIB_ARCH_V4
     106    uint32_t pinsel11 = PINSEL11;
    99107
    100   if ((PCONP & BSP_BIT32(20)) != 0 && (pinsel11 & LCD_ENABLE) != 0) {
    101     return BSP_FLD32GET(pinsel11, 1, 3);
    102   } else {
    103     return LCD_MODE_DISABLED;
    104   }
     108    if ((PCONP & BSP_BIT32(20)) != 0 && (pinsel11 & LCD_ENABLE) != 0) {
     109      return BSP_FLD32GET(pinsel11, 1, 3);
     110    } else {
     111      return LCD_MODE_DISABLED;
     112    }
     113  #endif
    105114}

  • c/src/lib/libbsp/arm/lpc24xx/misc/restart.c

    r4c622e5 r4a6cc2a  
    2929void bsp_restart(void *addr)
    3030{
    31   ARM_SWITCH_REGISTERS;
    32   rtems_interrupt_level level;
     31  #ifdef ARM_MULTILIB_ARCH_V4
     32    ARM_SWITCH_REGISTERS;
     33    rtems_interrupt_level level;
    3334
    34   rtems_interrupt_disable(level);
     35    rtems_interrupt_disable(level);
    3536
    36   asm volatile (
    37     ARM_SWITCH_TO_ARM
    38     "mov pc, %[addr]\n"
    39     ARM_SWITCH_BACK
    40     : ARM_SWITCH_OUTPUT
    41     : [addr] "r" (addr)
    42   );
     37    asm volatile (
     38      ARM_SWITCH_TO_ARM
     39      "mov pc, %[addr]\n"
     40      ARM_SWITCH_BACK
     41      : ARM_SWITCH_OUTPUT
     42      : [addr] "r" (addr)
     43    );
     44  #endif
    4345}

  • c/src/lib/libbsp/arm/lpc24xx/misc/system-clocks.c

    r4c622e5 r4a6cc2a  
    88
    99/*
    10  * Copyright (c) 2008
    11  * Embedded Brains GmbH
    12  * Obere Lagerstr. 30
    13  * D-82178 Puchheim
    14  * Germany
    15  * rtems@embedded-brains.de
     10 * Copyright (c) 2008-2011 embedded brains GmbH.  All rights reserved.
    1611 *
    17  * The license and distribution terms for this file may be found in the file
    18  * LICENSE in this distribution or at http://www.rtems.com/license/LICENSE.
     12 *  embedded brains GmbH
     13 *  Obere Lagerstr. 30
     14 *  82178 Puchheim
     15 *  Germany
     16 *  <rtems@embedded-brains.de>
     17 *
     18 * The license and distribution terms for this file may be
     19 * found in the file LICENSE in this distribution or at
     20 * http://www.rtems.com/license/LICENSE.
     21 *
     22 * $Id$
    1923 */
    2024
    … …  
    6367{
    6468  unsigned start = lpc24xx_timer();
    65   unsigned delay = us * (LPC24XX_CCLK / 1000000);
     69  unsigned delay = us * (LPC24XX_PCLK / 1000000);
    6670  unsigned elapsed = 0;
    6771
    … …  
    7377unsigned lpc24xx_pllclk(void)
    7478{
    75   unsigned clksrc = GET_CLKSRCSEL_CLKSRC(CLKSRCSEL);
    76   unsigned pllinclk = 0;
    77   unsigned pllclk = 0;
     79  #ifdef ARM_MULTILIB_ARCH_V4
     80    unsigned clksrc = GET_CLKSRCSEL_CLKSRC(CLKSRCSEL);
     81    unsigned pllinclk = 0;
     82    unsigned pllclk = 0;
    7883
    79   /* Get PLL input frequency */
    80   switch (clksrc) {
    81     case 0:
    82       pllinclk = LPC24XX_OSCILLATOR_INTERNAL;
    83       break;
    84     case 1:
    85       pllinclk = LPC24XX_OSCILLATOR_MAIN;
    86       break;
    87     case 2:
    88       pllinclk = LPC24XX_OSCILLATOR_RTC;
    89       break;
    90     default:
    91       return 0;
    92   }
     84    /* Get PLL input frequency */
     85    switch (clksrc) {
     86      case 0:
     87        pllinclk = LPC24XX_OSCILLATOR_INTERNAL;
     88        break;
     89      case 1:
     90        pllinclk = LPC24XX_OSCILLATOR_MAIN;
     91        break;
     92      case 2:
     93        pllinclk = LPC24XX_OSCILLATOR_RTC;
     94        break;
     95      default:
     96        return 0;
     97    }
    9398
    94   /* Get PLL output frequency */
    95   if ((PLLSTAT & PLLSTAT_PLLC) != 0) {
    96     uint32_t pllcfg = PLLCFG;
    97     unsigned n = GET_PLLCFG_NSEL(pllcfg) + 1;
    98     unsigned m = GET_PLLCFG_MSEL(pllcfg) + 1;
     99    /* Get PLL output frequency */
     100    if ((PLLSTAT & PLLSTAT_PLLC) != 0) {
     101      uint32_t pllcfg = PLLCFG;
     102      unsigned n = GET_PLLCFG_NSEL(pllcfg) + 1;
     103      unsigned m = GET_PLLCFG_MSEL(pllcfg) + 1;
    99104
    100     pllclk = (pllinclk / n) * 2 * m;
    101   } else {
    102     pllclk = pllinclk;
    103   }
     105      pllclk = (pllinclk / n) * 2 * m;
     106    } else {
     107      pllclk = pllinclk;
     108    }
     109  #endif
    104110
    105111  return pllclk;
    … …  
    108114unsigned lpc24xx_cclk(void)
    109115{
    110   /* Get PLL output frequency */
    111   unsigned pllclk = lpc24xx_pllclk();
     116  #ifdef ARM_MULTILIB_ARCH_V4
     117    /* Get PLL output frequency */
     118    unsigned pllclk = lpc24xx_pllclk();
    112119
    113   /* Get CPU frequency */
    114   unsigned cclk = pllclk / (GET_CCLKCFG_CCLKSEL(CCLKCFG) + 1);
     120    /* Get CPU frequency */
     121    unsigned cclk = pllclk / (GET_CCLKCFG_CCLKSEL(CCLKCFG) + 1);
     122  #endif
    115123
    116124  return cclk;

  • c/src/lib/libbsp/arm/lpc24xx/preinstall.am

    r4c622e5 r4a6cc2a  
    122122PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/lcd.h
    123123
     124$(PROJECT_INCLUDE)/bsp/lpc17xx.h: include/lpc17xx.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
     125        $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/lpc17xx.h
     126PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/lpc17xx.h
     127
    124128$(PROJECT_INCLUDE)/bsp/lpc24xx.h: include/lpc24xx.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
    125129        $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/lpc24xx.h

  • c/src/lib/libbsp/arm/lpc24xx/ssp/ssp.c

    r4c622e5 r4a6cc2a  
    2626#include <bsp/system-clocks.h>
    2727#include <bsp/dma.h>
     28#include <bsp/io.h>
    2829
    2930#define RTEMS_STATUS_CHECKS_USE_PRINTK
    … …  
    182183  unsigned pre =
    183184    ((pclk + LPC24XX_SSP_BAUD_RATE - 1) / LPC24XX_SSP_BAUD_RATE + 1) & ~1U;
     185  lpc24xx_module module = LPC24XX_MODULE_SSP_0;
    184186  rtems_vector_number vector = UINT32_MAX;
    185187
    … …  
    214216  regs->cr1 = 0;
    215217
    216   /* Set clock select and get vector number */
    217218  switch ((uintptr_t) regs) {
    218219    case SSP0_BASE_ADDR:
    219       rtems_interrupt_disable(level);
    220       PCLKSEL1 = SET_PCLKSEL1_PCLK_SSP0(PCLKSEL1, 1);
    221       rtems_interrupt_enable(level);
    222 
     220      module = LPC24XX_MODULE_SSP_0;
    223221      vector = LPC24XX_IRQ_SPI_SSP_0;
    224222      break;
    225223    case SSP1_BASE_ADDR:
    226       rtems_interrupt_disable(level);
    227       PCLKSEL0 = SET_PCLKSEL0_PCLK_SSP1(PCLKSEL0, 1);
    228       rtems_interrupt_enable(level);
    229 
     224      module = LPC24XX_MODULE_SSP_1;
    230225      vector = LPC24XX_IRQ_SSP_1;
    231226      break;
    … …  
    233228      return RTEMS_IO_ERROR;
    234229  }
     230
     231  /* Set clock select */
     232  sc = lpc24xx_module_enable(module, LPC24XX_MODULE_PCLK_DEFAULT);
     233  RTEMS_CHECK_SC(sc, "enable module clock");
    235234
    236235  /* Set serial clock rate to save value */

  • c/src/lib/libbsp/arm/lpc24xx/startup/bspreset.c

    r4c622e5 r4a6cc2a  
    2323#include <bsp/bootcard.h>
    2424#include <bsp/lpc24xx.h>
     25#include <bsp/start.h>
    2526
    26 void bsp_reset(void)
     27BSP_START_TEXT_SECTION __attribute__((flatten)) void bsp_reset(void)
    2728{
    2829  rtems_interrupt_level level;
    … …  
    3031  rtems_interrupt_disable(level);
    3132
    32   /* Trigger watchdog reset */
    33   WDCLKSEL = 0;
    34   WDTC = 0xff;
    35   WDMOD = 0x3;
    36   WDFEED = 0xaa;
    37   WDFEED = 0x55;
     33  #ifdef ARM_MULTILIB_ARCH_V4
     34    /* Trigger watchdog reset */
     35    WDCLKSEL = 0;
     36    WDTC = 0xff;
     37    WDMOD = 0x3;
     38    WDFEED = 0xaa;
     39    WDFEED = 0x55;
     40  #endif
    3841
    3942  while (true) {

  • c/src/lib/libbsp/arm/lpc24xx/startup/bspstart.c

    r4c622e5 r4a6cc2a  
    7272    };
    7373
    74     lpc24xx_module_enable(LPC24XX_MODULE_UART_0, LPC24XX_MODULE_CCLK);
     74    lpc24xx_module_enable(LPC24XX_MODULE_UART_0, LPC24XX_MODULE_PCLK_DEFAULT);
    7575    lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION);
    7676    BSP_CONSOLE_UART_INIT(lpc24xx_cclk() / 16 / LPC24XX_UART_BAUD);
    … …  
    8181{
    8282  /* Initialize Timer 1 */
    83   lpc24xx_module_enable(LPC24XX_MODULE_TIMER_1, LPC24XX_MODULE_CCLK);
     83  lpc24xx_module_enable(LPC24XX_MODULE_TIMER_1, LPC24XX_MODULE_PCLK_DEFAULT);
    8484
    8585  /* Initialize standard timer */

  • c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c

    r4c622e5 r4a6cc2a  
    2323#include <stdbool.h>
    2424
     25#include <rtems/score/armv7m.h>
     26
    2527#include <bspopts.h>
     28#include <bsp/io.h>
    2629#include <bsp/start.h>
    27 #include <bsp/linker-symbols.h>
    2830#include <bsp/lpc24xx.h>
    2931#include <bsp/lpc-emc.h>
    3032#include <bsp/start-config.h>
    3133
    32 static void BSP_START_TEXT_SECTION lpc24xx_cpu_delay(unsigned ticks)
     34static BSP_START_TEXT_SECTION void lpc24xx_cpu_delay(unsigned ticks)
    3335{
    3436  unsigned i = 0;
    … …  
    4244}
    4345
    44 static void BSP_START_TEXT_SECTION lpc24xx_udelay(unsigned us)
     46static BSP_START_TEXT_SECTION void lpc24xx_udelay(unsigned us)
    4547{
    4648  lpc24xx_cpu_delay(us * (LPC24XX_CCLK / 1000000));
    4749}
    4850
    49 static void BSP_START_TEXT_SECTION lpc24xx_init_emc_pinsel(void)
    50 {
    51   bsp_start_memcpy(
    52     (int *) &PINSEL5,
    53     (const int *) &lpc24xx_start_config_pinsel_5_9,
    54     lpc24xx_start_config_pinsel_5_9_size
     51static BSP_START_TEXT_SECTION void lpc24xx_init_pinsel(void)
     52{
     53  lpc24xx_pin_config(
     54    &lpc24xx_start_config_pinsel [0],
     55    LPC24XX_PIN_SET_FUNCTION
    5556  );
    5657}
    5758
    58 static void BSP_START_TEXT_SECTION lpc24xx_init_emc_static(void)
     59static BSP_START_TEXT_SECTION void lpc24xx_init_emc_static(void)
    5960{
    6061  size_t i = 0;
    … …  
    8081}
    8182
    82 static void BSP_START_TEXT_SECTION lpc24xx_init_emc_memory_map(void)
    83 {
    84   /* Use normal memory map */
    85   EMC_CTRL &= ~0x2U;
    86 }
    87 
    88 static void BSP_START_TEXT_SECTION lpc24xx_init_emc_dynamic(void)
     83static BSP_START_TEXT_SECTION void lpc24xx_init_emc_dynamic(void)
    8984{
    9085  size_t chip_count = lpc24xx_start_config_emc_dynamic_chip_count;
    … …  
    160155      }
    161156
    162       emc->dynamiccontrol = dynamiccontrol;
    163     }
    164   }
    165 }
    166 
    167 static void BSP_START_TEXT_SECTION lpc24xx_pll_config(
     157      emc->dynamiccontrol = 0;
     158    }
     159  }
     160}
     161
     162static BSP_START_TEXT_SECTION void lpc24xx_init_main_oscillator(void)
     163{
     164  #ifdef ARM_MULTILIB_ARCH_V4
     165    if ((SCS & 0x40) == 0) {
     166      SCS |= 0x20;
     167      while ((SCS & 0x40) == 0) {
     168        /* Wait */
     169      }
     170    }
     171  #endif
     172}
     173
     174#ifdef ARM_MULTILIB_ARCH_V4
     175
     176static BSP_START_TEXT_SECTION void lpc24xx_pll_config(
    168177  uint32_t val
    169178)
    … …  
    188197 * from the PLL output.
    189198 */
    190 static void BSP_START_TEXT_SECTION lpc24xx_set_pll(
     199static BSP_START_TEXT_SECTION void lpc24xx_set_pll(
    191200  unsigned clksrc,
    192201  unsigned nsel,
    … …  
    244253}
    245254
    246 static void BSP_START_TEXT_SECTION lpc24xx_init_pll(void)
    247 {
    248   /* Enable main oscillator */
    249   if ((SCS & 0x40) == 0) {
    250     SCS |= 0x20;
    251     while ((SCS & 0x40) == 0) {
    252       /* Wait */
    253     }
    254   }
    255 
    256   /* Set PLL */
    257   #if LPC24XX_OSCILLATOR_MAIN == 12000000U
    258     #if LPC24XX_CCLK == 72000000U
    259       lpc24xx_set_pll(1, 0, 11, 3);
    260     #elif LPC24XX_CCLK == 51612800U
    261       lpc24xx_set_pll(1, 30, 399, 5);
     255#endif /* ARM_MULTILIB_ARCH_V4 */
     256
     257static BSP_START_TEXT_SECTION void lpc24xx_init_pll(void)
     258{
     259  #ifdef ARM_MULTILIB_ARCH_V4
     260    #if LPC24XX_OSCILLATOR_MAIN == 12000000U
     261      #if LPC24XX_CCLK == 72000000U
     262        lpc24xx_set_pll(1, 0, 11, 3);
     263      #elif LPC24XX_CCLK == 51612800U
     264        lpc24xx_set_pll(1, 30, 399, 5);
     265      #else
     266        #error "unexpected CCLK"
     267      #endif
     268    #elif LPC24XX_OSCILLATOR_MAIN == 3686400U
     269      #if LPC24XX_CCLK == 58982400U
     270        lpc24xx_set_pll(1, 0, 47, 5);
     271      #else
     272        #error "unexpected CCLK"
     273      #endif
    262274    #else
    263       #error "unexpected CCLK"
    264     #endif
    265   #elif LPC24XX_OSCILLATOR_MAIN == 3686400U
    266     #if LPC24XX_CCLK == 58982400U
    267       lpc24xx_set_pll(1, 0, 47, 5);
     275      #error "unexpected main oscillator frequency"
     276    #endif
     277  #endif
     278}
     279
     280static BSP_START_TEXT_SECTION void lpc24xx_init_memory_map(void)
     281{
     282  #ifdef ARM_MULTILIB_ARCH_V4
     283    /* Re-map interrupt vectors to internal RAM */
     284    MEMMAP = SET_MEMMAP_MAP(MEMMAP, 2);
     285  #endif
     286
     287  /* Use normal memory map */
     288  EMC_CTRL &= ~0x2U;
     289}
     290
     291static BSP_START_TEXT_SECTION void lpc24xx_init_memory_accelerator(void)
     292{
     293  #ifdef ARM_MULTILIB_ARCH_V4
     294    /* Fully enable memory accelerator module functions (MAM) */
     295    MAMCR = 0;
     296    #if LPC24XX_CCLK <= 20000000U
     297      MAMTIM = 0x1;
     298    #elif LPC24XX_CCLK <= 40000000U
     299      MAMTIM = 0x2;
     300    #elif LPC24XX_CCLK <= 60000000U
     301      MAMTIM = 0x3;
    268302    #else
    269       #error "unexpected CCLK"
    270     #endif
    271   #else
    272     #error "unexpected main oscillator frequency"
    273   #endif
    274 }
    275 
    276 static void BSP_START_TEXT_SECTION lpc24xx_clear_bss(void)
    277 {
    278   const int *end = (const int *) bsp_section_bss_end;
    279   int *out = (int *) bsp_section_bss_begin;
    280 
    281   /* Clear BSS */
    282   while (out != end) {
    283     *out = 0;
    284     ++out;
    285   }
    286 }
    287 
    288 void BSP_START_TEXT_SECTION bsp_start_hook_0(void)
    289 {
    290   lpc24xx_init_pll();
    291   lpc24xx_init_emc_pinsel();
    292   lpc24xx_init_emc_static();
    293 }
    294 
    295 void BSP_START_TEXT_SECTION bsp_start_hook_1(void)
    296 {
    297   /* Re-map interrupt vectors to internal RAM */
    298   MEMMAP = SET_MEMMAP_MAP(MEMMAP, 2);
    299 
    300   /* Fully enable memory accelerator module functions (MAM) */
    301   MAMCR = 0;
    302   #if LPC24XX_CCLK <= 20000000U
    303     MAMTIM = 0x1;
    304   #elif LPC24XX_CCLK <= 40000000U
    305     MAMTIM = 0x2;
    306   #elif LPC24XX_CCLK <= 60000000U
    307     MAMTIM = 0x3;
    308   #else
    309     MAMTIM = 0x4;
    310   #endif
    311   MAMCR = 0x2;
    312 
    313   /* Enable fast IO for ports 0 and 1 */
    314   SCS |= 0x1;
    315 
    316   /* Set fast IO */
    317   FIO0DIR = 0;
    318   FIO1DIR = 0;
    319   FIO2DIR = 0;
    320   FIO3DIR = 0;
    321   FIO4DIR = 0;
    322   FIO0CLR = 0xffffffff;
    323   FIO1CLR = 0xffffffff;
    324   FIO2CLR = 0xffffffff;
    325   FIO3CLR = 0xffffffff;
    326   FIO4CLR = 0xffffffff;
    327 
    328   lpc24xx_init_emc_memory_map();
    329   lpc24xx_init_emc_dynamic();
    330 
     303      MAMTIM = 0x4;
     304    #endif
     305    MAMCR = 0x2;
     306
     307    /* Enable fast IO for ports 0 and 1 */
     308    SCS |= 0x1;
     309  #endif
     310}
     311
     312static BSP_START_TEXT_SECTION void lpc24xx_stop_gpdma(void)
     313{
    331314  #ifdef LPC24XX_STOP_GPDMA
    332     if ((PCONP & PCONP_GPDMA) != 0) {
     315    #ifdef ARM_MULTILIB_ARCH_V4
     316      bool has_power = (PCONP & PCONP_GPDMA) != 0;
     317    #endif
     318
     319    if (has_power) {
    333320      GPDMA_CONFIG = 0;
    334       PCONP &= ~PCONP_GPDMA;
    335     }
    336   #endif
    337 
     321
     322      #ifdef ARM_MULTILIB_ARCH_V4
     323        PCONP &= ~PCONP_GPDMA;
     324      #endif
     325    }
     326  #endif
     327}
     328
     329static BSP_START_TEXT_SECTION void lpc24xx_stop_ethernet(void)
     330{
    338331  #ifdef LPC24XX_STOP_ETHERNET
    339     if ((PCONP & PCONP_ETHERNET) != 0) {
     332    #ifdef ARM_MULTILIB_ARCH_V4
     333      bool has_power = (PCONP & PCONP_ETHERNET) != 0;
     334    #endif
     335
     336    if (has_power) {
    340337      MAC_COMMAND = 0x38;
    341338      MAC_MAC1 = 0xcf00;
    342339      MAC_MAC1 = 0;
    343       PCONP &= ~PCONP_ETHERNET;
    344     }
    345   #endif
    346 
     340
     341      #ifdef ARM_MULTILIB_ARCH_V4
     342        PCONP &= ~PCONP_ETHERNET;
     343      #endif
     344    }
     345  #endif
     346}
     347
     348static BSP_START_TEXT_SECTION void lpc24xx_stop_usb(void)
     349{
    347350  #ifdef LPC24XX_STOP_USB
    348     if ((PCONP & PCONP_USB) != 0) {
     351    #ifdef ARM_MULTILIB_ARCH_V4
     352      bool has_power = (PCONP & PCONP_USB) != 0;
     353    #endif
     354
     355    if (has_power) {
    349356      OTG_CLK_CTRL = 0;
    350       PCONP &= ~PCONP_USB;
    351     }
    352   #endif
    353 
    354   /* Copy .text section */
    355   bsp_start_memcpy(
    356     (int *) bsp_section_text_begin,
    357     (const int *) bsp_section_text_load_begin,
    358     (size_t) bsp_section_text_size
    359   );
    360 
    361   /* Copy .rodata section */
    362   bsp_start_memcpy(
    363     (int *) bsp_section_rodata_begin,
    364     (const int *) bsp_section_rodata_load_begin,
    365     (size_t) bsp_section_rodata_size
    366   );
    367 
    368   /* Copy .data section */
    369   bsp_start_memcpy(
    370     (int *) bsp_section_data_begin,
    371     (const int *) bsp_section_data_load_begin,
    372     (size_t) bsp_section_data_size
    373   );
    374 
    375   /* Copy .fast_text section */
    376   bsp_start_memcpy(
    377     (int *) bsp_section_fast_text_begin,
    378     (const int *) bsp_section_fast_text_load_begin,
    379     (size_t) bsp_section_fast_text_size
    380   );
    381 
    382   /* Copy .fast_data section */
    383   bsp_start_memcpy(
    384     (int *) bsp_section_fast_data_begin,
    385     (const int *) bsp_section_fast_data_load_begin,
    386     (size_t) bsp_section_fast_data_size
    387   );
    388 
    389   /* Clear .bss section */
    390   lpc24xx_clear_bss();
     357
     358      #ifdef ARM_MULTILIB_ARCH_V4
     359        PCONP &= ~PCONP_USB;
     360      #endif
     361    }
     362  #endif
     363}
     364
     365BSP_START_TEXT_SECTION void bsp_start_hook_0(void)
     366{
     367  lpc24xx_init_main_oscillator();
     368  lpc24xx_init_pll();
     369  lpc24xx_init_pinsel();
     370  lpc24xx_init_emc_static();
     371}
     372
     373BSP_START_TEXT_SECTION void bsp_start_hook_1(void)
     374{
     375  lpc24xx_init_memory_map();
     376  lpc24xx_init_memory_accelerator();
     377  lpc24xx_init_emc_dynamic();
     378  lpc24xx_stop_gpdma();
     379  lpc24xx_stop_ethernet();
     380  lpc24xx_stop_usb();
     381  bsp_start_copy_sections();
    391382
    392383  /* At this point we can use objects outside the .start section */

  • c/src/lib/libbsp/arm/lpc24xx/startup/start-config-emc-dynamic.c

    r4c622e5 r4a6cc2a  
    2626#include <bsp/lpc24xx.h>
    2727
    28 const BSP_START_DATA_SECTION lpc24xx_emc_dynamic_config
     28BSP_START_DATA_SECTION const lpc24xx_emc_dynamic_config
    2929  lpc24xx_start_config_emc_dynamic [] = {
    30 #if defined(LPC24XX_EMC_MICRON)
     30#if defined(LPC24XX_EMC_MT48LC4M16A2)
    3131  /* Dynamic Memory 0: Micron M T48LC 4M16 A2 P 75 IT */
    3232  {
    … …  
    6868
    6969    /* Load mode register to active or refresh command period 2 tCK */
     70    .tmrd = 1
     71  }
     72#elif defined(LPC24XX_EMC_W9825G2JB75I)
     73  /* Dynamic Memory 0: Winbond W9825G2JB75I at 51612800Hz (tCK = 19.4ns) */
     74  {
     75    /* (n * 16) clock cycles -> 15.5us <= 15.6 us */
     76    .refresh = 50,
     77
     78    /* Use command delayed strategy */
     79    .readconfig = 1,
     80
     81    /* (n + 1) clock cycles -> 38.8ns >= 20ns */
     82    .trp = 1,
     83
     84    /* (n + 1) clock cycles -> 58.1ns >= 45ns */
     85    .tras = 2,
     86
     87    /* (n + 1) clock cycles -> 77.5ns >= 75ns (tXSR) */
     88    .tsrex = 3,
     89
     90    /* (n + 1) clock cycles -> 38.8ns >= 20ns (tRCD) */
     91    .tapr = 1,
     92
     93    /* n clock cycles -> 77.5ns >= tWR + tRP -> 2 * tCK + 20ns */
     94    .tdal = 4,
     95
     96    /* (n + 1) clock cycles == 2 * tCK */
     97    .twr = 1,
     98
     99    /* (n + 1) clock cycles = 77.5ns >= 65ns */
     100    .trc = 3,
     101
     102    /* (n + 1) clock cycles = 77.5ns >= 65ns (tRC) */
     103    .trfc = 3,
     104
     105    /* (n + 1) clock cycles = 77.5ns >= 75ns */
     106    .txsr = 3,
     107
     108    /* (n + 1) clock cycles == 2 * tCK */
     109    .trrd = 1,
     110
     111    /* (n + 1) clock cycles == 2 * tCK (tRSC)*/
    70112    .tmrd = 1
    71113  }
    … …  
    86128    .tmrd = 2
    87129  }
     130#elif defined(LPC24XX_EMC_IS42S32800B)
     131  #if LPC24XX_EMCCLK == 72000000U
     132    {
     133      /* tCK = 13.888ns at 72MHz */
     134
     135      /* (n * 16) clock cycles -> 15.556us <= 15.6us */
     136      .refresh = 70,
     137
     138      .readconfig = 1,
     139
     140      /* (n + 1) clock cycles -> 27.8ns >= 20ns */
     141      .trp = 1,
     142
     143      /* (n + 1) clock cycles -> 55.5ns >= 45ns */
     144      .tras = 3,
     145
     146      /* (n + 1) clock cycles -> 69.4ns >= 70ns (tRC) */
     147      .tsrex = 5,
     148
     149      /* (n + 1) clock cycles -> 41.7ns >= FIXME */
     150      .tapr = 2,
     151
     152      /* n clock cycles -> 55.5ns >= tWR + tRP = 47.8ns */
     153      .tdal = 4,
     154
     155      /* (n + 1) clock cycles == 2 * tCK */
     156      .twr = 1,
     157
     158      /* (n + 1) clock cycles -> 83.3ns >= 70ns */
     159      .trc = 5,
     160
     161      /* (n + 1) clock cycles -> 83.3ns >= 70ns */
     162      .trfc = 5,
     163
     164      /* (n + 1) clock cycles -> 69.4ns >= 70ns (tRC) */
     165      .txsr = 5,
     166
     167      /* (n + 1) clock cycles -> 27.8ns >= 14ns */
     168      .trrd = 1,
     169
     170      /* (n + 1) clock cycles == 2 * tCK */
     171      .tmrd = 1,
     172
     173      /* FIXME */
     174      .emcdlyctl = 0x1112
     175    }
     176  #elif LPC24XX_EMCCLK == 60000000U
     177    {
     178      .refresh = 0x3a,
     179      .readconfig = 1,
     180      .trp = 1,
     181      .tras = 3,
     182      .tsrex = 5,
     183      .tapr = 2,
     184      .tdal = 3,
     185      .twr = 1,
     186      .trc = 4,
     187      .trfc = 4,
     188      .txsr = 5,
     189      .trrd = 1,
     190      .tmrd = 1,
     191      .emcdlyctl = 0x1112
     192    }
     193  #else
     194    #error "unexpected EMCCLK"
     195  #endif
    88196#endif
    89197};
    90198
    91 const BSP_START_DATA_SECTION lpc24xx_emc_dynamic_chip_config
     199BSP_START_DATA_SECTION const lpc24xx_emc_dynamic_chip_config
    92200  lpc24xx_start_config_emc_dynamic_chip [] = {
    93 #if defined(LPC24XX_EMC_MICRON)
     201#if defined(LPC24XX_EMC_MT48LC4M16A2)
    94202  {
    95203    .chip_select = (volatile lpc_emc_dynamic *) &EMC_DYN_CFG0,
    … …  
    97205    /*
    98206     * Use SDRAM, 0 0 001 01 address mapping, disabled buffer, unprotected
    99      * writes.
     207     * writes.  4 banks, 12 row lines, 8 column lines.
    100208     */
    101209    .config = 0x280,
    … …  
    103211    .rascas = EMC_DYN_RASCAS_RAS(2) | EMC_DYN_RASCAS_CAS(2, 0),
    104212    .mode = 0xa0000000 | (0x23 << (1 + 2 + 8))
     213  }
     214#elif defined(LPC24XX_EMC_W9825G2JB75I)
     215  {
     216    .chip_select = (volatile lpc_emc_dynamic *) &EMC_DYN_CFG0,
     217
     218    /* 32-bit data bus, 4 banks, 12 row lines, 9 column lines, RBC */
     219    .config = 0x4280,
     220
     221    /* RAS based on tRCD = 20ns */
     222    .rascas = EMC_DYN_RASCAS_RAS(2) | EMC_DYN_RASCAS_CAS(2, 0),
     223
     224    /* CAS 2, burst length 8, */
     225    .mode = 0xa0000000 | (0x23 << (2 + 2 + 9))
    105226  }
    106227#elif defined(LPC24XX_EMC_K4S561632E)
    … …  
    111232    .mode = 0xa0000000 | (0x33 << 12)
    112233  }
     234#elif defined(LPC24XX_EMC_IS42S32800B)
     235  {
     236    .chip_select = (volatile lpc_emc_dynamic *) &EMC_DYN_CFG0,
     237
     238    /* 256MBit, 8Mx32, 4 banks, row = 12, column = 9, RBC */
     239    .config = 0x4480,
     240
     241    #if LPC24XX_EMCCLK == 72000000U
     242      .rascas = EMC_DYN_RASCAS_RAS(3) | EMC_DYN_RASCAS_CAS(3, 0),
     243      .mode = 0xa0000000 | (0x32 << (2 + 2 + 9))
     244    #elif LPC24XX_EMCCLK == 60000000U
     245      .rascas = EMC_DYN_RASCAS_RAS(2) | EMC_DYN_RASCAS_CAS(2, 0),
     246      .mode = 0xa0000000 | (0x22 << (2 + 2 + 9))
     247    #else
     248      #error "unexpected EMCCLK"
     249    #endif
     250  }
    113251#endif
    114252};
    115253
    116 const BSP_START_DATA_SECTION size_t
     254BSP_START_DATA_SECTION const size_t
    117255  lpc24xx_start_config_emc_dynamic_chip_count =
    118256    sizeof(lpc24xx_start_config_emc_dynamic_chip)

  • c/src/lib/libbsp/arm/lpc24xx/startup/start-config-emc-static.c

    r4c622e5 r4a6cc2a  
    2626#include <bsp/lpc24xx.h>
    2727
    28 const BSP_START_DATA_SECTION lpc24xx_emc_static_chip_config
     28BSP_START_DATA_SECTION const lpc24xx_emc_static_chip_config
    2929   lpc24xx_start_config_emc_static_chip [] = {
    30 #ifdef LPC24XX_EMC_NUMONYX
     30#if defined(LPC24XX_EMC_NUMONYX_M29W160E)
    3131  /*
    3232   * Static Memory 1: Numonyx M29W160EB
    … …  
    6767    }
    6868  }
    69 #endif /* LPC24XX_EMC_NUMONYX */
     69#elif defined(LPC24XX_EMC_SST39VF3201)
     70  /* Static Memory 1: SST SST39VF3201 at 51612800Hz (tCK = 19.4ns) */
     71  {
     72    .chip_select = (volatile lpc_emc_static *) EMC_STA_BASE_0,
     73    .config = {
     74      /*
     75       * 16 bit, page mode disabled, active LOW chip select, extended wait
     76       * disabled, writes not protected, byte lane state LOW/LOW.
     77       */
     78      .config = 0x81,
     79
     80      /* (n + 1) clock cycles -> 19.4ns >= 0ns (tCS, tAS) */
     81      .waitwen = 0,
     82
     83      /* (n + 1) clock cycles -> 19.4ns >= 0ns (tOES) */
     84      .waitoen = 0,
     85
     86      /* (n + 1) clock cycles -> 77.5ns >= 70ns (tRC) */
     87      .waitrd = 2,
     88
     89      /* (n + 1) clock cycles -> 77.5ns >= 70ns (tRC) */
     90      .waitpage = 2,
     91
     92      /* (n + 2) clock cycles -> 38.8ns >= 20ns (tCHZ, TOHZ) */
     93      .waitwr = 0,
     94
     95      /* (n + 1) clock cycles -> 38.8ns >= 20ns (tCHZ, TOHZ) */
     96      .waitrun = 1
     97    }
     98  }
     99#endif
    70100};
    71101
    72 const BSP_START_DATA_SECTION size_t
     102BSP_START_DATA_SECTION const size_t
    73103  lpc24xx_start_config_emc_static_chip_count =
    74104    sizeof(lpc24xx_start_config_emc_static_chip)

  • c/src/lib/libbsp/arm/lpc24xx/startup/start-config-pinsel.c

    r4c622e5 r4a6cc2a  
    2525#include <bsp/start-config.h>
    2626
    27 const BSP_START_DATA_SECTION uint32_t lpc24xx_start_config_pinsel_5_9 [] = {
    28 #if defined(LPC24XX_EMC_MICRON) \
    29   || defined(LPC24XX_EMC_K4S561632E) \
    30   || defined(LPC24XX_EMC_NUMONYX)
    31   0x05010115,
    32   0x55555555,
    33   0x0,
    34   #ifdef LPC24XX_EMC_K4S561632E
    35     0x15555555,
    36     0x0a040000
    37   #else
    38     0x55555555,
    39     0x40050155
    40   #endif
     27BSP_START_DATA_SECTION const lpc24xx_pin_range
     28  lpc24xx_start_config_pinsel [] = {
     29#if defined(LPC24XX_EMC_MT48LC4M16A2) \
     30  && defined(LPC24XX_EMC_NUMONYX_M29W160E)
     31  LPC24XX_PIN_EMC_A_0_20,
     32  LPC24XX_PIN_EMC_D_0_15,
     33  LPC24XX_PIN_EMC_RAS,
     34  LPC24XX_PIN_EMC_CAS,
     35  LPC24XX_PIN_EMC_WE,
     36  LPC24XX_PIN_EMC_DYCS_0,
     37  LPC24XX_PIN_EMC_CLK_0,
     38  LPC24XX_PIN_EMC_CKE_0,
     39  LPC24XX_PIN_EMC_DQM_0,
     40  LPC24XX_PIN_EMC_DQM_1,
     41  LPC24XX_PIN_EMC_OE,
     42  LPC24XX_PIN_EMC_CS_1,
    4143#endif
     44#if defined(LPC24XX_EMC_W9825G2JB75I) \
     45  && defined(LPC24XX_EMC_SST39VF3201)
     46  LPC24XX_PIN_EMC_A_0_22,
     47  LPC24XX_PIN_EMC_D_0_31,
     48  LPC24XX_PIN_EMC_RAS,
     49  LPC24XX_PIN_EMC_CAS,
     50  LPC24XX_PIN_EMC_WE,
     51  LPC24XX_PIN_EMC_DYCS_0,
     52  LPC24XX_PIN_EMC_CLK_0,
     53  LPC24XX_PIN_EMC_CKE_0,
     54  LPC24XX_PIN_EMC_DQM_0,
     55  LPC24XX_PIN_EMC_DQM_1,
     56  LPC24XX_PIN_EMC_DQM_2,
     57  LPC24XX_PIN_EMC_DQM_3,
     58  LPC24XX_PIN_EMC_OE,
     59  LPC24XX_PIN_EMC_CS_0,
     60#endif
     61#if defined(LPC24XX_EMC_IS42S32800B)
     62  LPC24XX_PIN_EMC_A_0_14,
     63  LPC24XX_PIN_EMC_D_0_31,
     64  LPC24XX_PIN_EMC_RAS,
     65  LPC24XX_PIN_EMC_CAS,
     66  LPC24XX_PIN_EMC_WE,
     67  LPC24XX_PIN_EMC_DYCS_0,
     68  LPC24XX_PIN_EMC_CLK_0,
     69  LPC24XX_PIN_EMC_CKE_0,
     70  LPC24XX_PIN_EMC_DQM_0,
     71  LPC24XX_PIN_EMC_DQM_1,
     72  LPC24XX_PIN_EMC_DQM_2,
     73  LPC24XX_PIN_EMC_DQM_3,
     74#endif
     75  LPC24XX_PIN_TERMINAL
    4276};
    43 
    44 const BSP_START_DATA_SECTION size_t
    45   lpc24xx_start_config_pinsel_5_9_size =
    46     sizeof(lpc24xx_start_config_pinsel_5_9);
Note: See TracChangeset for help on using the changeset viewer.