Changeset 4a4201c in rtems


Ignore:
Timestamp:
Nov 10, 2009, 6:51:52 AM (10 years ago)
Author:
Till Straumann <strauman@…>
Branches:
4.10, 4.11, master
Children:
b02f4cc1
Parents:
70f6ff7
Message:

2009-11-10 Till Straumann <strauman@…>

  • pc386/make/custom/pc586-sse.cfg, pc386/start/start.S, shared/irq/irq_asm.S: Added experimental SSE support.
Location:
c/src/lib/libbsp/i386
Files:
1 added
3 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/i386/ChangeLog

    r70f6ff7 r4a4201c  
     12009-11-10      Till Straumann <strauman@slac.stanford.edu>
     2
     3        * pc386/make/custom/pc586-sse.cfg, pc386/start/start.S,
     4        shared/irq/irq_asm.S: Added experimental SSE support.
     5
    162009-10-29      Till Straumann <strauman@slac.stanford.edu>
    27
  • c/src/lib/libbsp/i386/pc386/start/start.S

    r70f6ff7 r4a4201c  
    7070        EXTERN (checkCPUtypeSetCr0)
    7171        EXTERN (BSP_console_select)
     72        EXTERN (printk)
     73#ifdef __SSE__
     74        EXTERN (x86_capability)
     75#ifdef __SSE3__
     76        EXTERN (x86_capability_x)
     77#endif
     78#endif
    7279
    7380/*
     
    143150         * try printk and a getchar in polling mode ASAP
    144151         */
    145         pushl   $welcome_msg
     152        movl    $welcome_msg, 0(esp)
    146153        call    printk
    147154        addl    $4, esp
     
    208215        call SYM(BSP_console_select)
    209216
     217#ifdef __SSE__
     218/*--------------------------------------------------------------------+
     219 | Enable SSE; we really only care about fxsave/fxrstor and leave
     220 | The only feature *we* (as an OS) use is fxsave/fxrstor.
     221 | But as a courtesy we make sure we don't execute on hardware
     222 | that doesn't support features possibly used by the compiler.
     223+---------------------------------------------------------------------*/
     224        movl    SYM (x86_capability), eax
     225        testl   $0x01000000, eax
     226        jne     1f
     227        movl    $SYM (no_fxsave_msg), 0(esp)
     228        jmp     SYM(_sse_panic)
     2291:
     230        testl   $0x02000000, eax
     231        jne     1f
     232        movl    $SYM (no_sse_msg), 0(esp)
     233        jmp     SYM(_sse_panic)
     2341:     
     235#ifdef __SSE2__
     236        testl   $0x04000000, eax
     237        jne     1f
     238        movl    $SYM (no_sse2_msg), 0(esp)
     239        jmp     SYM(_sse_panic)
     2401:
     241#endif
     242#ifdef __SSE3__
     243        movl    SYM (x86_capability_x), eax
     244        testl   $1, eax
     245        jne     1f
     246        movl    $SYM (no_sse3_msg), 0(esp)
     247        jmp     SYM(_sse_panic)
     2481:
     249#endif
     250        mov     cr4, eax                # OK to enable now
     251        or      $0x600, eax
     252        mov     eax, cr4
     253#endif
     254
    210255/*---------------------------------------------------------------------+
    211256| Transfer control to User's Board Support Package
     
    228273
    229274        jmp     SYM (_return_to_monitor)
     275
     276#ifdef __SSE__
     277SYM(_sse_panic):
     278        call SYM(printk)
     2791:      hlt
     280        jmp 1b
     281#endif
    230282
    231283END_CODE
     
    271323#endif
    272324
     325#ifdef __SSE__
     326SYM (no_fxsave_msg) :
     327        .string "PANIC: compiled for SSE but CPU seems to have no FXSAVE/FXRSTOR support (which I need)\n"
     328SYM (no_sse_msg) :
     329        .string "PANIC: compiled for SSE but your CPU seems to have no SSE support\n"
     330#ifdef __SSE2__
     331SYM (no_sse2_msg) :
     332        .string "PANIC: compiled for SSE2 but your CPU seems to have no SSE2 support\n"
     333#endif
     334#ifdef __SSE3__
     335SYM (no_sse3_msg) :
     336        .string "PANIC: compiled for SSE3 but your CPU seems to have no SSE3 support\n"
     337#endif
     338#endif
     339
    273340END_DATA
    274341
  • c/src/lib/libbsp/i386/shared/irq/irq_asm.S

    r70f6ff7 r4a4201c  
    2525#define EBP_OFF 8        /* code restoring ebp/esp relies on */
    2626#define ESP_OFF 12       /* esp being on top of ebp!         */
     27#ifdef __SSE__
     28#define FRM_SIZ (16+512)
     29#define SSE_OFF 16
     30#else
    2731#define FRM_SIZ 16
     32#endif
    2833
    2934        BEGIN_CODE
     
    7075        movl      eax, ESP_OFF(esp)
    7176        movl      ebp, EBP_OFF(esp)
     77
     78#ifdef __SSE__
     79        /* NOTE: SSE only is supported if the BSP enables fxsave/fxrstor
     80         * to save/restore SSE context! This is so far only implemented
     81         * for pc386!.
     82         */
     83
     84        /* We save SSE here (on the task stack) because we possibly
     85         * call other C-code (besides the ISR, namely _Thread_Dispatch()
     86         * or _ThreadProcessSignalsFromIrq()).
     87         */
     88    /*  don't wait here; a possible exception condition will eventually be
     89     *  detected when the task resumes control and executes a FP instruction
     90        fwait
     91     */
     92        fxsave SSE_OFF(esp)
     93        fninit                          /* clean-slate FPU                */
     94        movl   $0x1f80, ARG_OFF(esp)    /* use ARG_OFF as scratch space   */
     95        ldmxcsr ARG_OFF(esp)            /* clean-slate MXCSR              */
     96#endif
     97
    7298
    7399        /*
     
    198224         */
    199225.exit:
     226
     227#ifdef __SSE__
     228        fwait
     229        fxrstor   SSE_OFF(esp)
     230#endif
     231
    200232        /* restore ebp and original esp */
    201233        addl      $EBP_OFF, esp
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