Changeset 487c4f62 in rtems


Ignore:
Timestamp:
Jul 10, 1997, 7:09:16 PM (24 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, 5, master
Children:
bf3a7a5a
Parents:
900a3ab1
Message:

Strip the trace bit from the SR register when dispatching a thread when
exiting from an ISR. This allows the trace bit to be set on a per task
basis and tracing to be limited to that task.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • c/src/exec/score/cpu/m68k/cpu_asm.s

    r900a3ab1 r487c4f62  
    203203#else
    204204
    205         movew   a7@(16+SR_OFFSET),sr
    206         jsr     SYM (_Thread_Dispatch)
    207 
     205| filter out the trace bit to stop single step debugging breaking
     206        movew   a7@(16+SR_OFFSET),d0
     207        andw    #0x7FFF,d0
     208        movew   d0,sr
     209        jsr SYM (_Thread_Dispatch)
    208210#endif
    209211
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