Changeset 48449a8 in rtems


Ignore:
Timestamp:
10/06/11 16:46:36 (11 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.11, 5, master
Children:
71d093f0
Parents:
b7d3a2ca
Message:

2011-10-06 Gedare Bloom <giddyup44@…>

PR 1920/bsp

  • shared/helenos/kernel/sparc64/src/sun4u/takemmu.S, shared/start/start.S, shared/startup/bspgetworkarea.c, shared/startup/linkcmds: Fix BSP memory use to support more than 4 MB of RAM.
Location:
c/src/lib/libbsp/sparc64
Files:
5 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/sparc64/ChangeLog

    rb7d3a2ca r48449a8  
     12011-10-06      Gedare Bloom <giddyup44@yahoo.com>
     2
     3        PR 1920/bsp
     4        * shared/helenos/kernel/sparc64/src/sun4u/takemmu.S,
     5        shared/start/start.S, shared/startup/bspgetworkarea.c,
     6        shared/startup/linkcmds: Fix BSP memory use to support more than 4 MB
     7        of RAM.
     8
    192011-10-06      Gedare Bloom <giddyup44@yahoo.com>
    210
  • c/src/lib/libbsp/sparc64/shared/helenos/kernel/sparc64/src/sun4u/takemmu.S

    rb7d3a2ca r48449a8  
    179179        membar #Sync
    180180*/
    181 #define SET_TLB_TAG(r1, context) \
    182         set VMA | (context << TLB_TAG_ACCESS_CONTEXT_SHIFT), %r1
     181#define SET_TLB_TAG(xVMA, r1, context) \
     182        set xVMA | (context << TLB_TAG_ACCESS_CONTEXT_SHIFT), %r1
    183183
    184184        ! write DTLB tag
    185         SET_TLB_TAG(g1, MEM_CONTEXT_KERNEL)
     185        SET_TLB_TAG(0x4000, g1, MEM_CONTEXT_KERNEL)
    186186        stxa %g1, [VA_DMMU_TAG_ACCESS] %asi                     
    187187        membar #Sync
     
    272272*/
    273273        ! write ITLB tag of context 0
    274         SET_TLB_TAG(g1, MEM_CONTEXT_KERNEL)
     274        SET_TLB_TAG(0x4000, g1, MEM_CONTEXT_KERNEL)
    275275        mov VA_DMMU_TAG_ACCESS, %g2
    276276        stxa %g1, [%g2] ASI_IMMU
     
    281281        stxa %g1, [%g0] ASI_ITLB_DATA_IN_REG           
    282282        flush %g5
     283
     284  ! GAB: add more mappings for dmmu in 4 MB chunks
     285  SET_TLB_TAG(0x404000, g1, MEM_CONTEXT_KERNEL)
     286  stxa %g1, [VA_DMMU_TAG_ACCESS] %asi
     287  membar #Sync
     288  set 0x400000, %g1
     289  add %g1, %l5, %l5
     290  SET_TLB_DATA(g1, g2, TTE_L | TTE_W)
     291  stxa %g1, [%g0] ASI_DTLB_DATA_IN_REG
     292  membar #Sync
     293
     294  SET_TLB_TAG(0x804000, g1, MEM_CONTEXT_KERNEL)
     295  stxa %g1, [VA_DMMU_TAG_ACCESS] %asi
     296  membar #Sync
     297  set 0x400000, %g1
     298  add %g1, %l5, %l5
     299  SET_TLB_DATA(g1, g2, TTE_L | TTE_W)
     300  stxa %g1, [%g0] ASI_DTLB_DATA_IN_REG
     301  membar #Sync
     302
     303  SET_TLB_TAG(0xc04000, g1, MEM_CONTEXT_KERNEL)
     304  stxa %g1, [VA_DMMU_TAG_ACCESS] %asi
     305  membar #Sync
     306  set 0x400000, %g1
     307  add %g1, %l5, %l5
     308  SET_TLB_DATA(g1, g2, TTE_L | TTE_W)
     309  stxa %g1, [%g0] ASI_DTLB_DATA_IN_REG
     310  membar #Sync
     311
     312
    283313/*
    284314        ! enter nucleus - using context 0
  • c/src/lib/libbsp/sparc64/shared/start/start.S

    rb7d3a2ca r48449a8  
    124124        add %sp, -STACK_BIAS, %sp
    125125
     126  /* BSP-specific pre-bootcard initializations */
     127  call SYM(_BSP_init)
     128  nop
     129
    126130        setx ofw_cif, %l0, %l1
    127131 
     
    132136  nop
    133137
    134   /* BSP-specific pre-bootcard initializations */
    135   call SYM(_BSP_init)
    136   nop
    137138
    138139  /* Set up ISR handler for interrupt enable/disable */
  • c/src/lib/libbsp/sparc64/shared/startup/bspgetworkarea.c

    rb7d3a2ca r48449a8  
    6060
    6161  *work_area_start = WorkAreaBase;
    62   *work_area_size  = ram_end - (uintptr_t) WorkAreaBase;
     62  *work_area_size  = (uintptr_t) HeapSize;
    6363  *heap_start      = (void*) HeapBase;
    6464  *heap_size       = (uintptr_t) HeapSize;
  • c/src/lib/libbsp/sparc64/shared/startup/linkcmds

    rb7d3a2ca r48449a8  
    1414 */
    1515RamBase = DEFINED(RamBase) ? RamBase : 0x0;
    16 RamSize = DEFINED(RamSize) ? RamSize : 16M;
    17 HeapSize = DEFINED(HeapSize) ? HeapSize : 256k;
    18 StackSize = DEFINED(StackSize) ? StackSize : 256k;
     16RamSize = DEFINED(RamSize) ? RamSize : 12M;
     17HeapSize = DEFINED(HeapSize) ? HeapSize : 1M;
     18StackSize = DEFINED(StackSize) ? StackSize : 1M;
    1919
    2020RAM_END = RamBase + RamSize;
     
    2626MEMORY
    2727        {
    28                 ram : ORIGIN = 0x0, LENGTH = 16M
     28                ram : ORIGIN = 0x0, LENGTH = 12M
    2929        }
    3030
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