Changeset 47a61aa1 in rtems

Timestamp:

10/07/11 14:35:03 (11 years ago)

Author:

Joel Sherrill <joel.sherrill@…>

Branches:

4.11, 5, master

Children:

764e0a75

Parents:

8f582bc

Message:

2011-10-07 Daniel Hellstrom <daniel@…>

PR 1933/cpukit

• shared/irq_asm.S: From code inspection I have found the following issues (most SMP), and some improvements in irq_asm.S. I would need a long test with interrupts to verify the interrupt handler better, however I can not see that these patches hurt. Please see comment per hunk below, One should go through the file to indent delay-slots correctly, I have fixed some in the patch areas. An extra space is added in front of delay slots to indicate a delay slot.

Location:

c/src/lib/libbsp/sparc

Files:

• ChangeLog (modified) (1 diff)
• shared/irq_asm.S (modified) (8 diffs)

c/src/lib/libbsp/sparc/ChangeLog

@@ +1 @@
+2011-10-07      Daniel Hellstrom <daniel@gaisler.com>
+
+        PR 1933/cpukit
+        * shared/irq_asm.S: From code inspection I have found the following
+        issues (most SMP), and some improvements in irq_asm.S. I would need a
+        long test with interrupts to verify the interrupt handler better,
+        however I can not see that these patches hurt. Please see comment per
+        hunk below, One should go through the file to indent delay-slots
+        correctly, I have fixed some in the patch areas. An extra space is
+        added in front of delay slots to indicate a delay slot.
+
 2011-07-28      Jennifer Averett <Jennifer.Averett@OARcorp.com>
 

c/src/lib/libbsp/sparc/shared/irq_asm.S

@@ -268 +268 @@
     #endif
         ld       [%l5], %l5     /* l5 = pointer to per CPU */
-        nop
-        nop
 
         /*
@@ -278 +276 @@
          *  outermost interrupt, then we need to switch stacks.
          */
-        mov      %sp, %fp
         call    SYM(_ISR_SMP_Enter), 0
-        nop                             ! delay slot
+         mov      %sp, %fp              ! delay slot
         cmp     %o0, 0
 #else
@@ -322 +319 @@
          *  Do we need to switch to the interrupt stack?
          */
-        bnz      dont_switch_stacks      ! No, then do not switch stacks
-        ld       [%l5 + PER_CPU_INTERRUPT_STACK_HIGH], %sp
+        beq,a    dont_switch_stacks      ! No, then do not switch stacks
+         ld      [%l5 + PER_CPU_INTERRUPT_STACK_HIGH], %sp
 
 dont_switch_stacks:
@@ -359 +356 @@
         cmp     %o0, 0
         bz      simple_return
+         nop
 #else
         !sethi    %hi(SYM(_Thread_Dispatch_disable_level)), %l4
@@ -406 +404 @@
         orcc     %l7, %g0, %g0   ! Is this thread already doing an ISR?
         bnz      simple_return   ! Yes, then do a "simple" exit
-        nop
+         nop
 
         /*
@@ -414 +412 @@
 
         ldub     [%l5 + PER_CPU_DISPATCH_NEEDED], %l5
-        nop
-        nop
-
         orcc     %l5, %g0, %g0   ! Is thread switch necessary?
         bz       simple_return   ! No, then return
+         nop
 #endif
         /*
@@ -480 +476 @@
     #endif
         ld       [%l5], %l5     /* l5 = pointer to per CPU */
-        nop
-        nop
 #else
         sethi    %hi(_Per_CPU_Information), %l5
@@ -487 +481 @@
 #endif
         ldub     [%l5 + PER_CPU_DISPATCH_NEEDED], %l5
-        nop
-        nop
-
         orcc     %l5, %g0, %g0   ! Is thread switch necessary?
         bz       allow_nest_again