Changeset 47a61aa1 in rtems


Ignore:
Timestamp:
10/07/11 14:35:03 (11 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.11, 5, master
Children:
764e0a75
Parents:
8f582bc
Message:

2011-10-07 Daniel Hellstrom <daniel@…>

PR 1933/cpukit

  • shared/irq_asm.S: From code inspection I have found the following issues (most SMP), and some improvements in irq_asm.S. I would need a long test with interrupts to verify the interrupt handler better, however I can not see that these patches hurt. Please see comment per hunk below, One should go through the file to indent delay-slots correctly, I have fixed some in the patch areas. An extra space is added in front of delay slots to indicate a delay slot.
Location:
c/src/lib/libbsp/sparc
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/sparc/ChangeLog

    r8f582bc r47a61aa1  
     12011-10-07      Daniel Hellstrom <daniel@gaisler.com>
     2
     3        PR 1933/cpukit
     4        * shared/irq_asm.S: From code inspection I have found the following
     5        issues (most SMP), and some improvements in irq_asm.S. I would need a
     6        long test with interrupts to verify the interrupt handler better,
     7        however I can not see that these patches hurt. Please see comment per
     8        hunk below, One should go through the file to indent delay-slots
     9        correctly, I have fixed some in the patch areas. An extra space is
     10        added in front of delay slots to indicate a delay slot.
     11
    1122011-07-28      Jennifer Averett <Jennifer.Averett@OARcorp.com>
    213
  • c/src/lib/libbsp/sparc/shared/irq_asm.S

    r8f582bc r47a61aa1  
    268268    #endif
    269269        ld       [%l5], %l5     /* l5 = pointer to per CPU */
    270         nop
    271         nop
    272270
    273271        /*
     
    278276         *  outermost interrupt, then we need to switch stacks.
    279277         */
    280         mov      %sp, %fp
    281278        call    SYM(_ISR_SMP_Enter), 0
    282         nop                             ! delay slot
     279         mov      %sp, %fp              ! delay slot
    283280        cmp     %o0, 0
    284281#else
     
    322319         *  Do we need to switch to the interrupt stack?
    323320         */
    324         bnz      dont_switch_stacks      ! No, then do not switch stacks
    325         ld       [%l5 + PER_CPU_INTERRUPT_STACK_HIGH], %sp
     321        beq,a    dont_switch_stacks      ! No, then do not switch stacks
     322         ld      [%l5 + PER_CPU_INTERRUPT_STACK_HIGH], %sp
    326323
    327324dont_switch_stacks:
     
    359356        cmp     %o0, 0
    360357        bz      simple_return
     358         nop
    361359#else
    362360        !sethi    %hi(SYM(_Thread_Dispatch_disable_level)), %l4
     
    406404        orcc     %l7, %g0, %g0   ! Is this thread already doing an ISR?
    407405        bnz      simple_return   ! Yes, then do a "simple" exit
    408         nop
     406         nop
    409407
    410408        /*
     
    414412
    415413        ldub     [%l5 + PER_CPU_DISPATCH_NEEDED], %l5
    416         nop
    417         nop
    418 
    419414        orcc     %l5, %g0, %g0   ! Is thread switch necessary?
    420415        bz       simple_return   ! No, then return
     416         nop
    421417#endif
    422418        /*
     
    480476    #endif
    481477        ld       [%l5], %l5     /* l5 = pointer to per CPU */
    482         nop
    483         nop
    484478#else
    485479        sethi    %hi(_Per_CPU_Information), %l5
     
    487481#endif
    488482        ldub     [%l5 + PER_CPU_DISPATCH_NEEDED], %l5
    489         nop
    490         nop
    491 
    492483        orcc     %l5, %g0, %g0   ! Is thread switch necessary?
    493484        bz       allow_nest_again
Note: See TracChangeset for help on using the changeset viewer.