Changeset 46c1096 in rtems


Ignore:
Timestamp:
Jan 16, 2002, 10:33:34 PM (18 years ago)
Author:
Joel Sherrill <joel.sherrill@…>
Branches:
4.10, 4.11, 4.8, 4.9, master
Children:
cf42e735
Parents:
be1c6bcd
Message:

2001-01-16 Eric Valette <valette@…>

  • vector/vector.S, irq/irq_asm.S: Make sure vectors work properly in RAM and Flash based code. The code executed for the Flash version runs in both cases (code in Flash/code in RAM) but as it is less efficient than the one optimized for RAM, it put it inside ifdef. A compilation error is generated if code is linked in Flash with the correct ifdef set...
Location:
c/src/lib/libbsp/powerpc/mbx8xx
Files:
3 edited

Legend:

Unmodified
Added
Removed
  • c/src/lib/libbsp/powerpc/mbx8xx/ChangeLog

    rbe1c6bcd r46c1096  
     12001-01-16      Eric Valette <valette@crt.canon.fr>
     2
     3        * vector/vector.S, irq/irq_asm.S: Make sure vectors work properly
     4        in RAM and Flash based code.  The code executed for the Flash
     5        version runs in both cases (code in Flash/code in RAM) but as it
     6        is less efficient than the one optimized for RAM, it put it inside
     7        ifdef.  A compilation error is generated if code is linked in Flash
     8        with the correct ifdef set...
     9
    1102001-01-16      Eric Valette <valette@crt.canon.fr>
    211
  • c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S

    rbe1c6bcd r46c1096  
    3636        stwu    r1, - (EXCEPTION_FRAME_END)(r1)
    3737        stw     r4, GPR4_OFFSET(r1)
     38#ifdef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE
     39        /*
     40         * save link register
     41         */
     42        mflr    r4
     43        stw     r4,  EXC_LR_OFFSET(r1)
     44        /*
     45         * make link register contain shared_raw_irq_code_entry
     46         * address
     47         */
     48        lis     r4,shared_raw_irq_code_entry@h
     49        ori     r4,r4,shared_raw_irq_code_entry@l
     50        mtlr    r4
     51       
     52        li      r4, ASM_DEC_VECTOR
     53        blr
     54#else
    3855        li      r4, ASM_DEC_VECTOR
    3956        ba      shared_raw_irq_code_entry
     57#endif                 
    4058
    4159        PUBLIC_VAR (decrementer_exception_vector_prolog_code_size)
     
    5169        stwu    r1, - (EXCEPTION_FRAME_END)(r1)
    5270        stw     r4, GPR4_OFFSET(r1)
     71#ifdef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE
     72        /*
     73         * save link register
     74         */
     75        mflr    r4
     76        stw     r4,  EXC_LR_OFFSET(r1)
     77        /*
     78         * make link register contain shared_raw_irq_code_entry
     79         * address
     80         */
     81        lis     r4,shared_raw_irq_code_entry@h
     82        ori     r4,r4,shared_raw_irq_code_entry@l
     83        mtlr    r4
     84
     85        li      r4, ASM_EXT_VECTOR
     86        blr
     87#else
    5388        li      r4, ASM_EXT_VECTOR
    5489        ba      shared_raw_irq_code_entry
    55 
     90#endif
     91       
    5692        PUBLIC_VAR (external_exception_vector_prolog_code_size)
    5793       
     
    117153        mfctr   r6
    118154        mfxer   r7
     155#ifndef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE
    119156        mflr    r8
    120        
     157#endif
     158               
    121159        stw     r5,  EXC_CR_OFFSET(r1)
    122160        stw     r6,  EXC_CTR_OFFSET(r1)
    123161        stw     r7,  EXC_XER_OFFSET(r1)
     162#ifndef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE
    124163        stw     r8,  EXC_LR_OFFSET(r1)
    125 
     164#endif
     165               
    126166        /*
    127167         * Add some non volatile registers to store information
  • c/src/lib/libbsp/powerpc/mbx8xx/vectors/vectors.S

    rbe1c6bcd r46c1096  
    4444         */
    4545        srwi    r3,r3,8
     46#ifdef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE 
     47        lis     r2,push_normalized_frame@h
     48        ori     r2,r2,push_normalized_frame@l
     49        mtlr    r2
     50        blr
     51#else
    4652        ba      push_normalized_frame
     53#endif         
    4754       
    4855        PUBLIC_VAR (default_exception_vector_code_prolog_size)
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